From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 837DAFD377B for ; Wed, 25 Feb 2026 18:47:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3FCEB10E7ED; Wed, 25 Feb 2026 18:47:38 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="ismY96jt"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2297910E7ED for ; Wed, 25 Feb 2026 18:47:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1772045241; x=1803581241; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=0WjH46qAt/gQDi4vpzLuwrdxnh36Epz2S1e2378CEHg=; b=ismY96jteYGQqUpMofOMgNqjG54DViXL0GcCua6NhbBzDrxKS1e44+zA eJzDjR7yxBr4763jQnuXk+mdIAI7HWBmnvEtiDuGR6uz/USEo6slNu5Eg WuxLlSsqFNIrqAGTXRaJPGEAvBQzFgOHG5BBFnXEx202MjeAlLc8Xdkml hXRDtlHNkb5toNgocUareC/lhG2ruXzGHd7JX9akqPMtO9WartfUVvSaN gZlBynDAD0gSDh+mHsEoZwTnAtw4Zm4cZdSdQzU9jOv9TfHr7NBpoSlaV b4Ao9naMaqjyRj5/rM/iDXnBu8KX06ZBjFnHc1itkAKL/KFPu+84vfrVG w==; X-CSE-ConnectionGUID: U1o8csCgTOqQLu5l5dtwTw== X-CSE-MsgGUID: cwVQ2sENRxWVGU7rNq6UTA== X-IronPort-AV: E=McAfee;i="6800,10657,11712"; a="76700328" X-IronPort-AV: E=Sophos;i="6.21,311,1763452800"; d="scan'208";a="76700328" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Feb 2026 10:47:20 -0800 X-CSE-ConnectionGUID: JNyCZMMuQayqwBB5PdYKdA== X-CSE-MsgGUID: B3omfZLCSdK69djnnwKsSQ== X-ExtLoop1: 1 Received: from lstrano-desk.jf.intel.com ([10.54.39.91]) by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Feb 2026 10:47:19 -0800 From: Matthew Brost To: intel-xe@lists.freedesktop.org Cc: stuart.summers@intel.com, arvind.yadav@intel.com, himal.prasad.ghimiray@intel.com, thomas.hellstrom@linux.intel.com, francois.dugast@intel.com Subject: [PATCH v2 07/12] drm/xe: Track pagefault worker runtime Date: Wed, 25 Feb 2026 10:47:08 -0800 Message-Id: <20260225184713.2606772-8-matthew.brost@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260225184713.2606772-1-matthew.brost@intel.com> References: <20260225184713.2606772-1-matthew.brost@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" Add a GT stat measuring total time spent servicing pagefault workqueue iterations. The counter accumulates the runtime of the pagefault worker in microseconds, allowing correlation of fault storms and chaining behavior with CPU time spent in the fault handler. Signed-off-by: Matthew Brost --- drivers/gpu/drm/xe/xe_gt_stats.c | 1 + drivers/gpu/drm/xe/xe_gt_stats_types.h | 1 + drivers/gpu/drm/xe/xe_pagefault.c | 8 ++++++++ 3 files changed, 10 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_gt_stats.c b/drivers/gpu/drm/xe/xe_gt_stats.c index 81cec441b449..c1af3ecb429b 100644 --- a/drivers/gpu/drm/xe/xe_gt_stats.c +++ b/drivers/gpu/drm/xe/xe_gt_stats.c @@ -60,6 +60,7 @@ static const char *const stat_description[__XE_GT_STATS_NUM_IDS] = { DEF_STAT_STR(SVM_TLB_INVAL_US, "svm_tlb_inval_us"), DEF_STAT_STR(VMA_PAGEFAULT_COUNT, "vma_pagefault_count"), DEF_STAT_STR(VMA_PAGEFAULT_KB, "vma_pagefault_kb"), + DEF_STAT_STR(PAGEFAULT_US, "pagefault_us"), DEF_STAT_STR(INVALID_PREFETCH_PAGEFAULT_COUNT, "invalid_prefetch_pagefault_count"), DEF_STAT_STR(SVM_4K_PAGEFAULT_COUNT, "svm_4K_pagefault_count"), DEF_STAT_STR(SVM_64K_PAGEFAULT_COUNT, "svm_64K_pagefault_count"), diff --git a/drivers/gpu/drm/xe/xe_gt_stats_types.h b/drivers/gpu/drm/xe/xe_gt_stats_types.h index b6081c312474..129260bfdfe6 100644 --- a/drivers/gpu/drm/xe/xe_gt_stats_types.h +++ b/drivers/gpu/drm/xe/xe_gt_stats_types.h @@ -15,6 +15,7 @@ enum xe_gt_stats_id { XE_GT_STATS_ID_SVM_TLB_INVAL_US, XE_GT_STATS_ID_VMA_PAGEFAULT_COUNT, XE_GT_STATS_ID_VMA_PAGEFAULT_KB, + XE_GT_STATS_ID_PAGEFAULT_US, XE_GT_STATS_ID_INVALID_PREFETCH_PAGEFAULT_COUNT, XE_GT_STATS_ID_SVM_4K_PAGEFAULT_COUNT, XE_GT_STATS_ID_SVM_64K_PAGEFAULT_COUNT, diff --git a/drivers/gpu/drm/xe/xe_pagefault.c b/drivers/gpu/drm/xe/xe_pagefault.c index a6fa790774c5..030452923ab9 100644 --- a/drivers/gpu/drm/xe/xe_pagefault.c +++ b/drivers/gpu/drm/xe/xe_pagefault.c @@ -277,6 +277,8 @@ static void xe_pagefault_queue_work(struct work_struct *w) struct xe_device *xe = pf_work->xe; struct xe_pagefault_queue *pf_queue = &xe->usm.pf_queue; struct xe_pagefault pf; + ktime_t start = xe_gt_stats_ktime_get(); + struct xe_gt *gt = NULL; unsigned long threshold; #define USM_QUEUE_MAX_RUNTIME_MS 20 @@ -288,6 +290,7 @@ static void xe_pagefault_queue_work(struct work_struct *w) if (!pf.gt) /* Fault squashed during reset */ continue; + gt = pf.gt; err = xe_pagefault_service(&pf); if (err == -EAGAIN) { @@ -314,6 +317,11 @@ static void xe_pagefault_queue_work(struct work_struct *w) } } #undef USM_QUEUE_MAX_RUNTIME_MS + + if (gt) + xe_gt_stats_incr(xe_root_mmio_gt(gt_to_xe(gt)), + XE_GT_STATS_ID_PAGEFAULT_US, + xe_gt_stats_ktime_us_delta(start)); } static int xe_pagefault_queue_init(struct xe_device *xe, -- 2.34.1