From: Soham Purkait <soham.purkait@intel.com>
To: intel-xe@lists.freedesktop.org, riana.tauro@intel.com,
anshuman.gupta@intel.com, aravind.iddamsetty@linux.intel.com,
badal.nilawar@intel.com, raag.jadav@intel.com,
ravi.kishore.koppuravuri@intel.com, mallesh.koujalagi@intel.com
Cc: soham.purkait@intel.com, anoop.c.vijay@intel.com
Subject: [PATCH 3/3] drm/xe/xe_ras: Add RAS support for GPU health indicator
Date: Mon, 9 Mar 2026 10:47:05 +0530 [thread overview]
Message-ID: <20260309051705.980155-4-soham.purkait@intel.com> (raw)
In-Reply-To: <20260309051705.980155-1-soham.purkait@intel.com>
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GPU health indicator exposes a single sysfs interface (gpu_health),
placed in the device level that allows administrators and user-space
tools to both query and modify the GPU health status.
Signed-off-by: Soham Purkait <soham.purkait@intel.com>
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/xe_device.c | 3 +
drivers/gpu/drm/xe/xe_ras.c | 166 +++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_ras.h | 13 +++
4 files changed, 183 insertions(+)
create mode 100644 drivers/gpu/drm/xe/xe_ras.c
create mode 100644 drivers/gpu/drm/xe/xe_ras.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 1890bbd1b28d..ee18638f73c3 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -110,6 +110,7 @@ xe-y += xe_bb.o \
xe_pxp_debugfs.o \
xe_pxp_submit.o \
xe_query.o \
+ xe_ras.o \
xe_range_fence.o \
xe_reg_sr.o \
xe_reg_whitelist.o \
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 1d61bb504e9b..2283a18e1034 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -60,6 +60,7 @@
#include "xe_psmi.h"
#include "xe_pxp.h"
#include "xe_query.h"
+#include "xe_ras.h"
#include "xe_shrinker.h"
#include "xe_soc_remapper.h"
#include "xe_survivability_mode.h"
@@ -1009,6 +1010,8 @@ int xe_device_probe(struct xe_device *xe)
xe_vsec_init(xe);
+ xe_ras_init(xe);
+
err = xe_sriov_init_late(xe);
if (err)
goto err_unregister_display;
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
new file mode 100644
index 000000000000..44324fe3273b
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -0,0 +1,166 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include "xe_device.h"
+#include "xe_device_types.h"
+#include "xe_printk.h"
+#include "xe_ras.h"
+#include "xe_ras_types.h"
+#include "xe_sysctrl_mailbox.h"
+#include "xe_sysctrl_mailbox_types.h"
+
+static const char * const gpu_health_states[] = { "ok", "warning", "critical" };
+static const char * const gpu_health_fmt[] = {
+ "[%s] %s %s\n",
+ "%s [%s] %s\n",
+ "%s %s [%s]\n",
+};
+
+static void prepare_sysctrl_command(struct xe_sysctrl_mailbox_command *command,
+ u32 cmd_mask, void *request, size_t request_len,
+ void *response, size_t response_len)
+{
+ struct xe_sysctrl_app_msg_hdr hdr = {0};
+ u32 req_hdr;
+
+ req_hdr = FIELD_PREP(APP_HDR_GROUP_ID_MASK, XE_SYSCTRL_GROUP_GFSP) |
+ FIELD_PREP(APP_HDR_COMMAND_MASK, cmd_mask);
+
+ hdr.data = req_hdr;
+ command->header = hdr;
+ command->data_in = request;
+ command->data_in_len = request_len;
+ command->data_out = response;
+ command->data_out_len = response_len;
+}
+
+static ssize_t gpu_health_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct xe_device *xe = kdev_to_xe_device(dev);
+ struct xe_sysctrl_mailbox_command command = {0};
+ struct xe_ras_health_get_response response = {0};
+ struct xe_ras_health_get_input request = {0};
+ u8 health;
+ int ret;
+ size_t rlen = 0;
+
+ prepare_sysctrl_command(&command, XE_SYSCTRL_CMD_GET_HEALTH, &request,
+ sizeof(request), &response, sizeof(response));
+ ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+ if (ret) {
+ xe_err(xe, "[RAS]: Sysctrl error ret %d\n", ret);
+ return -EIO;
+ }
+ if (rlen != sizeof(response)) {
+ xe_err(xe,
+ "[RAS]: invalid Sysctrl response length %zu (expected %zu)\n",
+ rlen, sizeof(response));
+ return -EIO;
+ }
+ if (response.current_health >= ARRAY_SIZE(gpu_health_states)) {
+ xe_err(xe, "[RAS]: invalid health state %u from Sysctrl\n",
+ response.current_health);
+ return -EIO;
+ }
+
+ health = response.current_health;
+
+ xe_dbg(xe, "[RAS]: %s state = %d (%s)\n",
+ __func__, health, gpu_health_states[health]);
+
+ return sysfs_emit(buf, gpu_health_fmt[health],
+ gpu_health_states[0],
+ gpu_health_states[1],
+ gpu_health_states[2]);
+}
+
+static ssize_t gpu_health_store(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct xe_device *xe = kdev_to_xe_device(dev);
+ struct xe_sysctrl_mailbox_command command = {0};
+ struct xe_ras_health_set_input request = {0};
+ struct xe_ras_health_set_response response = {0};
+ u8 health;
+ int ret;
+ size_t rlen = 0;
+ int state;
+
+ state = __sysfs_match_string(gpu_health_states,
+ ARRAY_SIZE(gpu_health_states),
+ buf);
+ if (state < 0)
+ return -EINVAL;
+
+ request.new_health = (xe_ras_health_status_t)state;
+
+ prepare_sysctrl_command(&command, XE_SYSCTRL_CMD_SET_HEALTH, &request,
+ sizeof(request), &response, sizeof(response));
+ ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+ if (ret) {
+ xe_err(xe, "[RAS]: Sysctrl error ret %d\n", ret);
+ return -EIO;
+ }
+ if (rlen != sizeof(response)) {
+ xe_err(xe,
+ "[RAS]: invalid Sysctrl response length %zu (expected %zu)\n",
+ rlen, sizeof(response));
+ return -EIO;
+ }
+ if (response.current_health >= ARRAY_SIZE(gpu_health_states)) {
+ xe_err(xe, "[RAS]: invalid health state %u from Sysctrl\n",
+ response.current_health);
+ return -EIO;
+ }
+
+ health = response.current_health;
+
+ xe_dbg(xe, "[RAS]: %s state=%d (%s)\n",
+ __func__, health, gpu_health_states[health]);
+
+ return count;
+}
+
+static DEVICE_ATTR_ADMIN_RW(gpu_health);
+
+static void gpu_health_sysfs_fini(void *arg)
+{
+ struct device *dev = arg;
+
+ device_remove_file(dev, &dev_attr_gpu_health);
+}
+
+static void gpu_health_indicator_sysfs_init(struct xe_device *xe)
+{
+ struct device *dev = xe->drm.dev;
+ int err;
+
+ err = device_create_file(dev, &dev_attr_gpu_health);
+ if (err)
+ goto err;
+
+ err = devm_add_action_or_reset(dev, gpu_health_sysfs_fini, dev);
+ if (err)
+ goto err;
+
+ return;
+
+err:
+ xe_err(xe, "[RAS]: failed to initialize GPU health sysfs, err=%d\n", err);
+}
+
+/**
+ * xe_ras_init - Initialize Xe RAS
+ * @xe: xe device instance
+ *
+ * Initialize Xe RAS
+ */
+void xe_ras_init(struct xe_device *xe)
+{
+ if (!xe->info.has_sysctrl)
+ return;
+
+ gpu_health_indicator_sysfs_init(xe);
+}
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
new file mode 100644
index 000000000000..14cb973603e7
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_RAS_H_
+#define _XE_RAS_H_
+
+struct xe_device;
+
+void xe_ras_init(struct xe_device *xe);
+
+#endif
--
2.43.0
next prev parent reply other threads:[~2026-03-09 5:23 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-09 5:17 [PATCH 0/3] drm/xe: Add support for GPU health indicator Soham Purkait
2026-03-09 5:17 ` [PATCH 1/3] From: Anoop Vijay <anoop.c.vijay@intel.com> Soham Purkait
2026-03-09 5:17 ` [PATCH 2/3] drm/xe/xe_ras: Add structures and commands for RAS GPU health indicator Soham Purkait
2026-03-09 5:17 ` Soham Purkait [this message]
2026-04-08 11:49 ` [PATCH 3/3] drm/xe/xe_ras: Add RAS support for " Nilawar, Badal
2026-04-14 11:16 ` Purkait, Soham
2026-03-09 5:28 ` ✗ CI.checkpatch: warning for drm/xe: Add " Patchwork
2026-03-09 5:30 ` ✓ CI.KUnit: success " Patchwork
2026-03-09 6:36 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-09 8:31 ` ✗ Xe.CI.FULL: failure " Patchwork
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