[PATCH 00/10] drm/i915/color: Enable SDR plane color pipeline

[PATCH 00/10] drm/i915/color: Enable SDR plane color pipeline

[Chaitanya Kumar Borah]

This series adds color pipeline support for SDR planes in i915 and
exposes the functionality to userspace through the DRM colorop
framework.

In contrast to HDR planes, SDR planes have LUTs with smaller sizes
and a fixed function CSC block in contrast to a programmable CTM.

The series first introduces a new DRM colorop type,
DRM_COLOROP_CSC_FF, which represents fixed-function CSC blocks where
userspace selects predefined hardware conversion modes instead of
programming arbitrary matrices.

With that, the SDR plane color pipeline looks like.

[1D LUT] -> [CSC_FF] -> [1D LUT]

The series also fixes an issue in HDR pre-CSC LUT programming where the
loop condition prevented the last entries from being programmed.

Chaitanya Kumar Borah (5):
  drm/colorop: Add DRM_COLOROP_CSC_FF
  drm/i915/color: Add CSC on SDR plane color pipeline
  drm/i915/color: Program fixed-function CSC on SDR planes
  drm/i915/color: Add support for 1D LUT in SDR planes
  drm/i915/color: Add color pipeline support for SDR planes

Pranay Samala (5):
  drm/i915/color: Fix HDR pre-CSC LUT programming loop
  drm/i915/color: Extract HDR pre-CSC LUT programming to helper function
  drm/i915/color: Program Pre-CSC registers for SDR
  drm/i915/color: Extract HDR post-CSC LUT programming to helper
    function
  drm/i915/color: Program Plane Post CSC registers for SDR planes

 drivers/gpu/drm/drm_atomic.c                  |   4 +
 drivers/gpu/drm/drm_atomic_uapi.c             |   4 +
 drivers/gpu/drm/drm_colorop.c                 | 105 +++++++
 drivers/gpu/drm/i915/display/intel_color.c    | 288 +++++++++++++-----
 .../drm/i915/display/intel_color_pipeline.c   |  37 ++-
 .../drm/i915/display/intel_display_limits.h   |   1 +
 .../drm/i915/display/intel_display_types.h    |   2 +
 drivers/gpu/drm/i915/display/intel_plane.c    |  12 +-
 .../drm/i915/display/skl_universal_plane.c    |  30 ++
 include/drm/drm_colorop.h                     |  72 +++++
 include/uapi/drm/drm_mode.h                   |  13 +
 11 files changed, 475 insertions(+), 93 deletions(-)

-- 
2.25.1

[PATCH 01/10] drm/colorop: Add DRM_COLOROP_CSC_FF

[Chaitanya Kumar Borah]

Introduce DRM_COLOROP_CSC_FF, a new colorop type representing a
fixed-function Color Space Conversion (CSC) block.

Unlike CTM-based colorops, this block does not expose programmable
coefficients. Instead, userspace selects one of the predefined
hardware modes via a new CSC_FF_TYPE enum property. Supported modes
include common YUV->RGB and RGB709->RGB2020 conversions.

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
 drivers/gpu/drm/drm_atomic.c      |   4 ++
 drivers/gpu/drm/drm_atomic_uapi.c |   4 ++
 drivers/gpu/drm/drm_colorop.c     | 105 ++++++++++++++++++++++++++++++
 include/drm/drm_colorop.h         |  72 ++++++++++++++++++++
 include/uapi/drm/drm_mode.h       |  13 ++++
 5 files changed, 198 insertions(+)

diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 04925166df98..7296b844e3fd 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -844,6 +844,10 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p,
 			   drm_get_colorop_lut3d_interpolation_name(colorop->lut3d_interpolation));
 		drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
 		break;
+	case DRM_COLOROP_CSC_FF:
+		drm_printf(p, "\tcsc_ff_type=%s\n",
+			   drm_get_colorop_csc_ff_type_name(state->csc_ff_type));
+		break;
 	default:
 		break;
 	}
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
index 87de41fb4459..9af73325aa93 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -757,6 +757,8 @@ static int drm_atomic_colorop_set_property(struct drm_colorop *colorop,
 	} else if (property == colorop->data_property) {
 		return drm_atomic_color_set_data_property(colorop, state,
 							  property, val);
+	} else if (property == colorop->csc_ff_type_property) {
+		state->csc_ff_type = val;
 	} else {
 		drm_dbg_atomic(colorop->dev,
 			       "[COLOROP:%d:%d] unknown property [PROP:%d:%s]\n",
@@ -789,6 +791,8 @@ drm_atomic_colorop_get_property(struct drm_colorop *colorop,
 		*val = colorop->lut3d_interpolation;
 	else if (property == colorop->data_property)
 		*val = (state->data) ? state->data->base.id : 0;
+	else if (property == colorop->csc_ff_type_property)
+		*val = state->csc_ff_type;
 	else
 		return -EINVAL;
 
diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
index f421c623b3f0..49422c625f4d 100644
--- a/drivers/gpu/drm/drm_colorop.c
+++ b/drivers/gpu/drm/drm_colorop.c
@@ -68,6 +68,7 @@ static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = {
 	{ DRM_COLOROP_CTM_3X4, "3x4 Matrix"},
 	{ DRM_COLOROP_MULTIPLIER, "Multiplier"},
 	{ DRM_COLOROP_3D_LUT, "3D LUT"},
+	{ DRM_COLOROP_CSC_FF, "CSC Fixed-Function"},
 };
 
 static const char * const colorop_curve_1d_type_names[] = {
@@ -90,6 +91,13 @@ static const struct drm_prop_enum_list drm_colorop_lut3d_interpolation_list[] =
 	{ DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL, "Tetrahedral" },
 };
 
+static const char * const colorop_csc_ff_type_names[] = {
+	[DRM_COLOROP_CSC_FF_YUV601_RGB601]   = "YUV601 to RGB601",
+	[DRM_COLOROP_CSC_FF_YUV709_RGB709]   = "YUV709 to RGB709",
+	[DRM_COLOROP_CSC_FF_YUV2020_RGB2020] = "YUV2020 to RGB2020",
+	[DRM_COLOROP_CSC_FF_RGB709_RGB2020]  = "RGB709 to RGB2020",
+};
+
 /* Init Helpers */
 
 static int drm_plane_colorop_init(struct drm_device *dev, struct drm_colorop *colorop,
@@ -459,6 +467,80 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
 }
 EXPORT_SYMBOL(drm_plane_colorop_3dlut_init);
 
+/**
+ * drm_plane_colorop_csc_ff_init - Initialize a DRM_COLOROP_CSC_FF
+ *
+ * @dev: DRM device
+ * @colorop: The drm_colorop object to initialize
+ * @plane: The associated drm_plane
+ * @funcs: control functions for the new colorop
+ * @supported_csc_ff: A bitfield of supported drm_plane_colorop_csc_ff_type enum values,
+ *                    created using BIT(csc_ff_type) and combined with the OR '|'
+ *                    operator.
+ * @flags: bitmask of misc, see DRM_COLOROP_FLAG_* defines.
+ * @return zero on success, -E value on failure
+ */
+int drm_plane_colorop_csc_ff_init(struct drm_device *dev, struct drm_colorop *colorop,
+				  struct drm_plane *plane, const struct drm_colorop_funcs *funcs,
+				  u64 supported_csc_ff, uint32_t flags)
+{
+	struct drm_prop_enum_list enum_list[DRM_COLOROP_CSC_FF_COUNT];
+	int i, len;
+
+	struct drm_property *prop;
+	int ret;
+
+	if (!supported_csc_ff) {
+		drm_err(dev,
+			"No supported CSC op for new CSC FF colorop on [PLANE:%d:%s]\n",
+			plane->base.id, plane->name);
+		return -EINVAL;
+	}
+
+	if ((supported_csc_ff & -BIT(DRM_COLOROP_CSC_FF_COUNT)) != 0) {
+		drm_err(dev, "Unknown CSC provided on [PLANE:%d:%s]\n",
+			plane->base.id, plane->name);
+		return -EINVAL;
+	}
+
+	ret = drm_plane_colorop_init(dev, colorop, plane, funcs, DRM_COLOROP_CSC_FF, flags);
+	if (ret)
+		return ret;
+
+	len = 0;
+	for (i = 0; i < DRM_COLOROP_CSC_FF_COUNT; i++) {
+		if ((supported_csc_ff & BIT(i)) == 0)
+			continue;
+
+		enum_list[len].type = i;
+		enum_list[len].name = colorop_csc_ff_type_names[i];
+		len++;
+	}
+
+	if (WARN_ON(len <= 0))
+		return -EINVAL;
+
+	prop = drm_property_create_enum(dev, DRM_MODE_PROP_ATOMIC, "CSC_FF_TYPE",
+					enum_list, len);
+
+	if (!prop)
+		return -ENOMEM;
+
+	colorop->csc_ff_type_property = prop;
+	/*
+	 * Default to the first supported CSC mode as provided by the driver.
+	 * Intuitively this should be something that keeps the colorop in pixel bypass
+	 * mode but that is already handled via the standard colorop bypass
+	 * property.
+	 */
+	drm_object_attach_property(&colorop->base, colorop->csc_ff_type_property,
+				   enum_list[0].type);
+	drm_colorop_reset(colorop);
+
+	return 0;
+}
+EXPORT_SYMBOL(drm_plane_colorop_csc_ff_init);
+
 static void __drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop,
 							struct drm_colorop_state *state)
 {
@@ -513,6 +595,13 @@ static void __drm_colorop_state_reset(struct drm_colorop_state *colorop_state,
 						      &val);
 		colorop_state->curve_1d_type = val;
 	}
+
+	if (colorop->csc_ff_type_property) {
+		drm_object_property_get_default_value(&colorop->base,
+						      colorop->csc_ff_type_property,
+						      &val);
+		colorop_state->csc_ff_type = val;
+	}
 }
 
 /**
@@ -551,6 +640,7 @@ static const char * const colorop_type_name[] = {
 	[DRM_COLOROP_CTM_3X4] = "3x4 Matrix",
 	[DRM_COLOROP_MULTIPLIER] = "Multiplier",
 	[DRM_COLOROP_3D_LUT] = "3D LUT",
+	[DRM_COLOROP_CSC_FF] = "CSC Fixed-Function",
 };
 
 static const char * const colorop_lu3d_interpolation_name[] = {
@@ -607,6 +697,21 @@ const char *drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_inte
 	return colorop_lu3d_interpolation_name[type];
 }
 
+/**
+ * drm_get_colorop_csc_ff_type_name: return a string for interpolation type
+ * @type: csc ff type to compute name of
+ *
+ * In contrast to the other drm_get_*_name functions this one here returns a
+ * const pointer and hence is threadsafe.
+ */
+const char *drm_get_colorop_csc_ff_type_name(enum drm_colorop_csc_ff_type type)
+{
+	if (WARN_ON(type >= ARRAY_SIZE(colorop_csc_ff_type_names)))
+		return "unknown";
+
+	return colorop_csc_ff_type_names[type];
+}
+
 /**
  * drm_colorop_set_next_property - sets the next pointer
  * @colorop: drm colorop
diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
index bd082854ca74..2cd8e0779c2a 100644
--- a/include/drm/drm_colorop.h
+++ b/include/drm/drm_colorop.h
@@ -134,6 +134,60 @@ enum drm_colorop_curve_1d_type {
 	DRM_COLOROP_1D_CURVE_COUNT
 };
 
+/**
+ * enum drm_colorop_csc_ff_type - type of CSC Fixed-Function
+ *
+ * Describes a CSC operation to be applied by the DRM_COLOROP_CSC_FF colorop.
+ */
+enum drm_colorop_csc_ff_type {
+	/**
+	 * @DRM_COLOROP_CSC_FF_YUV601_RGB601
+	 *
+	 * enum string "YUV601 to RGB601"
+	 *
+	 * Selects the fixed-function CSC preset that converts YUV
+	 * (BT.601) colorimetry to RGB (BT.601).
+	 */
+	DRM_COLOROP_CSC_FF_YUV601_RGB601,
+
+	/**
+	 * @DRM_COLOROP_CSC_FF_YUV709_RGB709:
+	 *
+	 * enum string "YUV709 to RGB709"
+	 *
+	 * Selects the fixed-function CSC preset that converts YUV
+	 * (BT.709) colorimetry to RGB (BT.709).
+	 */
+	DRM_COLOROP_CSC_FF_YUV709_RGB709,
+
+	/**
+	 * @DRM_COLOROP_CSC_FF_YUV2020_RGB2020:
+	 *
+	 * enum string "YUV2020 to RGB2020"
+	 *
+	 * Selects the fixed-function CSC preset that converts YUV
+	 * (BT.2020) colorimetry to RGB (BT.2020).
+	 */
+	DRM_COLOROP_CSC_FF_YUV2020_RGB2020,
+
+	/**
+	 * @DRM_COLOROP_CSC_FF_RGB709_RGB2020:
+	 *
+	 * enum string "RGB709 to RGB2020"
+	 *
+	 * Selects the fixed-function CSC preset that converts RGB
+	 * (BT.709) colorimetry to RGB (BT.2020).
+	 */
+	DRM_COLOROP_CSC_FF_RGB709_RGB2020,
+
+	/**
+	 * @DRM_COLOROP_CSC_FF_COUNT:
+	 *
+	 * enum value denoting the size of the enum
+	 */
+	DRM_COLOROP_CSC_FF_COUNT
+};
+
 /**
  * struct drm_colorop_state - mutable colorop state
  */
@@ -183,6 +237,13 @@ struct drm_colorop_state {
 	 */
 	struct drm_property_blob *data;
 
+	/**
+	 * @csc_ff_type:
+	 *
+	 * Type of Fixed function CSC.
+	 */
+	enum drm_colorop_csc_ff_type csc_ff_type;
+
 	/** @state: backpointer to global drm_atomic_state */
 	struct drm_atomic_state *state;
 };
@@ -368,6 +429,13 @@ struct drm_colorop {
 	 */
 	struct drm_property *data_property;
 
+	/**
+	 * @csc_ff_type_property:
+	 *
+	 * Sub-type for DRM_COLOROP_CSC_FF type.
+	 */
+	struct drm_property *csc_ff_type_property;
+
 	/**
 	 * @next_property:
 	 *
@@ -424,6 +492,9 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
 				 uint32_t lut_size,
 				 enum drm_colorop_lut3d_interpolation_type interpolation,
 				 uint32_t flags);
+int drm_plane_colorop_csc_ff_init(struct drm_device *dev, struct drm_colorop *colorop,
+				  struct drm_plane *plane, const struct drm_colorop_funcs *funcs,
+				  u64 supported_csc_ff, uint32_t flags);
 
 struct drm_colorop_state *
 drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop);
@@ -480,6 +551,7 @@ drm_get_colorop_lut1d_interpolation_name(enum drm_colorop_lut1d_interpolation_ty
 
 const char *
 drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_interpolation_type type);
+const char *drm_get_colorop_csc_ff_type_name(enum drm_colorop_csc_ff_type type);
 
 void drm_colorop_set_next_property(struct drm_colorop *colorop, struct drm_colorop *next);
 
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index 3693d82b5279..f7808e7ea984 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -968,6 +968,19 @@ enum drm_colorop_type {
 	 *         color = lut3d[index]
 	 */
 	DRM_COLOROP_3D_LUT,
+
+	/**
+	 * @DRM_COLOROP_CSC_FF:
+	 *
+	 * enum string "CSC Fixed-Function"
+	 *
+	 * A fixed-function Color Space Conversion block where the coefficients
+	 * are not programmable but selected from predefined hardware modes via
+	 * the CSC_FF_TYPE enum property. The driver advertises the supported
+	 * CSC modes through this property.
+	 */
+	DRM_COLOROP_CSC_FF,
+
 };
 
 /**
-- 
2.25.1

Re: [PATCH 01/10] drm/colorop: Add DRM_COLOROP_CSC_FF

[Pekka Paalanen]

[-- Attachment #1: Type: text/plain, Size: 14413 bytes --]

On Fri,  6 Mar 2026 22:22:58 +0530
Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> wrote:

> Introduce DRM_COLOROP_CSC_FF, a new colorop type representing a
> fixed-function Color Space Conversion (CSC) block.
> 
> Unlike CTM-based colorops, this block does not expose programmable
> coefficients. Instead, userspace selects one of the predefined
> hardware modes via a new CSC_FF_TYPE enum property. Supported modes
> include common YUV->RGB and RGB709->RGB2020 conversions.
> 
> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> ---
>  drivers/gpu/drm/drm_atomic.c      |   4 ++
>  drivers/gpu/drm/drm_atomic_uapi.c |   4 ++
>  drivers/gpu/drm/drm_colorop.c     | 105 ++++++++++++++++++++++++++++++
>  include/drm/drm_colorop.h         |  72 ++++++++++++++++++++
>  include/uapi/drm/drm_mode.h       |  13 ++++
>  5 files changed, 198 insertions(+)
> 
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 04925166df98..7296b844e3fd 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -844,6 +844,10 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p,
>  			   drm_get_colorop_lut3d_interpolation_name(colorop->lut3d_interpolation));
>  		drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
>  		break;
> +	case DRM_COLOROP_CSC_FF:
> +		drm_printf(p, "\tcsc_ff_type=%s\n",
> +			   drm_get_colorop_csc_ff_type_name(state->csc_ff_type));
> +		break;
>  	default:
>  		break;
>  	}
> diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
> index 87de41fb4459..9af73325aa93 100644
> --- a/drivers/gpu/drm/drm_atomic_uapi.c
> +++ b/drivers/gpu/drm/drm_atomic_uapi.c
> @@ -757,6 +757,8 @@ static int drm_atomic_colorop_set_property(struct drm_colorop *colorop,
>  	} else if (property == colorop->data_property) {
>  		return drm_atomic_color_set_data_property(colorop, state,
>  							  property, val);
> +	} else if (property == colorop->csc_ff_type_property) {
> +		state->csc_ff_type = val;
>  	} else {
>  		drm_dbg_atomic(colorop->dev,
>  			       "[COLOROP:%d:%d] unknown property [PROP:%d:%s]\n",
> @@ -789,6 +791,8 @@ drm_atomic_colorop_get_property(struct drm_colorop *colorop,
>  		*val = colorop->lut3d_interpolation;
>  	else if (property == colorop->data_property)
>  		*val = (state->data) ? state->data->base.id : 0;
> +	else if (property == colorop->csc_ff_type_property)
> +		*val = state->csc_ff_type;
>  	else
>  		return -EINVAL;
>  
> diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
> index f421c623b3f0..49422c625f4d 100644
> --- a/drivers/gpu/drm/drm_colorop.c
> +++ b/drivers/gpu/drm/drm_colorop.c
> @@ -68,6 +68,7 @@ static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = {
>  	{ DRM_COLOROP_CTM_3X4, "3x4 Matrix"},
>  	{ DRM_COLOROP_MULTIPLIER, "Multiplier"},
>  	{ DRM_COLOROP_3D_LUT, "3D LUT"},
> +	{ DRM_COLOROP_CSC_FF, "CSC Fixed-Function"},

Hi,

the fundamental idea seems fine to me, but I have a lot to say about the
nomenclature.

What would you think of a more readable name DRM_COLOROP_FIXED_MATRIX
"Fixed Matrix"?

Alternatively DRM_COLOROP_ENUM_MATRIX "Enumerated Matrix".

>  };
>  
>  static const char * const colorop_curve_1d_type_names[] = {
> @@ -90,6 +91,13 @@ static const struct drm_prop_enum_list drm_colorop_lut3d_interpolation_list[] =
>  	{ DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL, "Tetrahedral" },
>  };
>  
> +static const char * const colorop_csc_ff_type_names[] = {
> +	[DRM_COLOROP_CSC_FF_YUV601_RGB601]   = "YUV601 to RGB601",
> +	[DRM_COLOROP_CSC_FF_YUV709_RGB709]   = "YUV709 to RGB709",
> +	[DRM_COLOROP_CSC_FF_YUV2020_RGB2020] = "YUV2020 to RGB2020",
> +	[DRM_COLOROP_CSC_FF_RGB709_RGB2020]  = "RGB709 to RGB2020",

I'd suggest names:

"YCbCr 601 to RGB"
"YCbCr 709 to RGB"
"YCbCr 2020 NC to RGB"
"RGB709 to RGB2020"

or something in that direction.

The relevant ITU-R BT specifications use YCbCr nomenclature IIRC. Wrt.
YCbCr-to-RGB conversion, there is no RGB601, RGB709 or RGB2020. There
is only some RGB, and which primaries it uses is not always tied to
which YCbCr conversion was used.

For YCbCr 2020 I feel it's nice to remember, that there are two
different conversions in the specification: the simple matrix one
called "non-constant luminance", and the complex one called "constant
luminance". Hence "NC".

It's also good to recall that YCbCr-RGB conversions are done in an
electrical space, while RGB709-to-RGB2020 conversion must be done in the
optical space. It is up to the userspace to arrange the neighbouring
colorops to use the fixed matrix right.

> +};
> +
>  /* Init Helpers */
>  
>  static int drm_plane_colorop_init(struct drm_device *dev, struct drm_colorop *colorop,
> @@ -459,6 +467,80 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
>  }
>  EXPORT_SYMBOL(drm_plane_colorop_3dlut_init);
>  
> +/**
> + * drm_plane_colorop_csc_ff_init - Initialize a DRM_COLOROP_CSC_FF
> + *
> + * @dev: DRM device
> + * @colorop: The drm_colorop object to initialize
> + * @plane: The associated drm_plane
> + * @funcs: control functions for the new colorop
> + * @supported_csc_ff: A bitfield of supported drm_plane_colorop_csc_ff_type enum values,
> + *                    created using BIT(csc_ff_type) and combined with the OR '|'
> + *                    operator.
> + * @flags: bitmask of misc, see DRM_COLOROP_FLAG_* defines.
> + * @return zero on success, -E value on failure
> + */
> +int drm_plane_colorop_csc_ff_init(struct drm_device *dev, struct drm_colorop *colorop,
> +				  struct drm_plane *plane, const struct drm_colorop_funcs *funcs,
> +				  u64 supported_csc_ff, uint32_t flags)
> +{
> +	struct drm_prop_enum_list enum_list[DRM_COLOROP_CSC_FF_COUNT];
> +	int i, len;
> +
> +	struct drm_property *prop;
> +	int ret;
> +
> +	if (!supported_csc_ff) {
> +		drm_err(dev,
> +			"No supported CSC op for new CSC FF colorop on [PLANE:%d:%s]\n",
> +			plane->base.id, plane->name);
> +		return -EINVAL;
> +	}
> +
> +	if ((supported_csc_ff & -BIT(DRM_COLOROP_CSC_FF_COUNT)) != 0) {
> +		drm_err(dev, "Unknown CSC provided on [PLANE:%d:%s]\n",
> +			plane->base.id, plane->name);
> +		return -EINVAL;
> +	}
> +
> +	ret = drm_plane_colorop_init(dev, colorop, plane, funcs, DRM_COLOROP_CSC_FF, flags);
> +	if (ret)
> +		return ret;
> +
> +	len = 0;
> +	for (i = 0; i < DRM_COLOROP_CSC_FF_COUNT; i++) {
> +		if ((supported_csc_ff & BIT(i)) == 0)
> +			continue;
> +
> +		enum_list[len].type = i;
> +		enum_list[len].name = colorop_csc_ff_type_names[i];
> +		len++;
> +	}
> +
> +	if (WARN_ON(len <= 0))
> +		return -EINVAL;
> +
> +	prop = drm_property_create_enum(dev, DRM_MODE_PROP_ATOMIC, "CSC_FF_TYPE",
> +					enum_list, len);

The Color Space Conversion Fixed-Function type is always "fixed
matrix", right?

The name for the colorop property to choose one of the supported
matrices could be... "matrix"? "choice"?

Does the property name need to be unique over all colorop types?

> +
> +	if (!prop)
> +		return -ENOMEM;
> +
> +	colorop->csc_ff_type_property = prop;
> +	/*
> +	 * Default to the first supported CSC mode as provided by the driver.
> +	 * Intuitively this should be something that keeps the colorop in pixel bypass
> +	 * mode but that is already handled via the standard colorop bypass
> +	 * property.
> +	 */
> +	drm_object_attach_property(&colorop->base, colorop->csc_ff_type_property,
> +				   enum_list[0].type);
> +	drm_colorop_reset(colorop);
> +
> +	return 0;
> +}
> +EXPORT_SYMBOL(drm_plane_colorop_csc_ff_init);
> +
>  static void __drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop,
>  							struct drm_colorop_state *state)
>  {
> @@ -513,6 +595,13 @@ static void __drm_colorop_state_reset(struct drm_colorop_state *colorop_state,
>  						      &val);
>  		colorop_state->curve_1d_type = val;
>  	}
> +
> +	if (colorop->csc_ff_type_property) {
> +		drm_object_property_get_default_value(&colorop->base,
> +						      colorop->csc_ff_type_property,
> +						      &val);
> +		colorop_state->csc_ff_type = val;
> +	}
>  }
>  
>  /**
> @@ -551,6 +640,7 @@ static const char * const colorop_type_name[] = {
>  	[DRM_COLOROP_CTM_3X4] = "3x4 Matrix",
>  	[DRM_COLOROP_MULTIPLIER] = "Multiplier",
>  	[DRM_COLOROP_3D_LUT] = "3D LUT",
> +	[DRM_COLOROP_CSC_FF] = "CSC Fixed-Function",
>  };

Why are there two arrays with the same DRM_COLOROP_* = name association?
drm_colorop_type_enum_list is the first one.

>  
>  static const char * const colorop_lu3d_interpolation_name[] = {
> @@ -607,6 +697,21 @@ const char *drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_inte
>  	return colorop_lu3d_interpolation_name[type];
>  }
>  
> +/**
> + * drm_get_colorop_csc_ff_type_name: return a string for interpolation type
> + * @type: csc ff type to compute name of
> + *
> + * In contrast to the other drm_get_*_name functions this one here returns a
> + * const pointer and hence is threadsafe.
> + */
> +const char *drm_get_colorop_csc_ff_type_name(enum drm_colorop_csc_ff_type type)
> +{
> +	if (WARN_ON(type >= ARRAY_SIZE(colorop_csc_ff_type_names)))
> +		return "unknown";
> +
> +	return colorop_csc_ff_type_names[type];
> +}
> +
>  /**
>   * drm_colorop_set_next_property - sets the next pointer
>   * @colorop: drm colorop
> diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
> index bd082854ca74..2cd8e0779c2a 100644
> --- a/include/drm/drm_colorop.h
> +++ b/include/drm/drm_colorop.h
> @@ -134,6 +134,60 @@ enum drm_colorop_curve_1d_type {
>  	DRM_COLOROP_1D_CURVE_COUNT
>  };
>  
> +/**
> + * enum drm_colorop_csc_ff_type - type of CSC Fixed-Function
> + *
> + * Describes a CSC operation to be applied by the DRM_COLOROP_CSC_FF colorop.

It's a matrix operation. It seems to me that "CSC operation" is more
specific and does not fit the YCbCr-to-RGB conversion.

> + */
> +enum drm_colorop_csc_ff_type {
> +	/**
> +	 * @DRM_COLOROP_CSC_FF_YUV601_RGB601
> +	 *
> +	 * enum string "YUV601 to RGB601"
> +	 *
> +	 * Selects the fixed-function CSC preset that converts YUV
> +	 * (BT.601) colorimetry to RGB (BT.601).

This selects the matrix that converts YCbCr into RGB
according to the BT.601 coefficients.

> +	 */
> +	DRM_COLOROP_CSC_FF_YUV601_RGB601,
> +
> +	/**
> +	 * @DRM_COLOROP_CSC_FF_YUV709_RGB709:
> +	 *
> +	 * enum string "YUV709 to RGB709"
> +	 *
> +	 * Selects the fixed-function CSC preset that converts YUV
> +	 * (BT.709) colorimetry to RGB (BT.709).

This selects the matrix that converts YCbCr into RGB
according to the BT.709 coefficients.

> +	 */
> +	DRM_COLOROP_CSC_FF_YUV709_RGB709,
> +
> +	/**
> +	 * @DRM_COLOROP_CSC_FF_YUV2020_RGB2020:
> +	 *
> +	 * enum string "YUV2020 to RGB2020"
> +	 *
> +	 * Selects the fixed-function CSC preset that converts YUV
> +	 * (BT.2020) colorimetry to RGB (BT.2020).

This selects the matrix that converts YCbCr into RGB
according to the BT.2020 non-constant luminance coefficients.

> +	 */
> +	DRM_COLOROP_CSC_FF_YUV2020_RGB2020,
> +
> +	/**
> +	 * @DRM_COLOROP_CSC_FF_RGB709_RGB2020:
> +	 *
> +	 * enum string "RGB709 to RGB2020"
> +	 *
> +	 * Selects the fixed-function CSC preset that converts RGB
> +	 * (BT.709) colorimetry to RGB (BT.2020).

This selects the matrix that converts optical RGB from BT.709 primaries
to BT.2020 primaries.

> +	 */
> +	DRM_COLOROP_CSC_FF_RGB709_RGB2020,
> +
> +	/**
> +	 * @DRM_COLOROP_CSC_FF_COUNT:
> +	 *
> +	 * enum value denoting the size of the enum
> +	 */
> +	DRM_COLOROP_CSC_FF_COUNT
> +};
> +
>  /**
>   * struct drm_colorop_state - mutable colorop state
>   */
> @@ -183,6 +237,13 @@ struct drm_colorop_state {
>  	 */
>  	struct drm_property_blob *data;
>  
> +	/**
> +	 * @csc_ff_type:
> +	 *
> +	 * Type of Fixed function CSC.
> +	 */
> +	enum drm_colorop_csc_ff_type csc_ff_type;
> +
>  	/** @state: backpointer to global drm_atomic_state */
>  	struct drm_atomic_state *state;
>  };
> @@ -368,6 +429,13 @@ struct drm_colorop {
>  	 */
>  	struct drm_property *data_property;
>  
> +	/**
> +	 * @csc_ff_type_property:
> +	 *
> +	 * Sub-type for DRM_COLOROP_CSC_FF type.
> +	 */
> +	struct drm_property *csc_ff_type_property;
> +
>  	/**
>  	 * @next_property:
>  	 *
> @@ -424,6 +492,9 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
>  				 uint32_t lut_size,
>  				 enum drm_colorop_lut3d_interpolation_type interpolation,
>  				 uint32_t flags);
> +int drm_plane_colorop_csc_ff_init(struct drm_device *dev, struct drm_colorop *colorop,
> +				  struct drm_plane *plane, const struct drm_colorop_funcs *funcs,
> +				  u64 supported_csc_ff, uint32_t flags);
>  
>  struct drm_colorop_state *
>  drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop);
> @@ -480,6 +551,7 @@ drm_get_colorop_lut1d_interpolation_name(enum drm_colorop_lut1d_interpolation_ty
>  
>  const char *
>  drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_interpolation_type type);
> +const char *drm_get_colorop_csc_ff_type_name(enum drm_colorop_csc_ff_type type);
>  
>  void drm_colorop_set_next_property(struct drm_colorop *colorop, struct drm_colorop *next);
>  
> diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
> index 3693d82b5279..f7808e7ea984 100644
> --- a/include/uapi/drm/drm_mode.h
> +++ b/include/uapi/drm/drm_mode.h
> @@ -968,6 +968,19 @@ enum drm_colorop_type {
>  	 *         color = lut3d[index]
>  	 */
>  	DRM_COLOROP_3D_LUT,
> +
> +	/**
> +	 * @DRM_COLOROP_CSC_FF:
> +	 *
> +	 * enum string "CSC Fixed-Function"
> +	 *
> +	 * A fixed-function Color Space Conversion block where the coefficients
> +	 * are not programmable but selected from predefined hardware modes via
> +	 * the CSC_FF_TYPE enum property. The driver advertises the supported
> +	 * CSC modes through this property.

This would be a lot more obvious if it was called a "fixed matrix"
operation or such. The current wording never mentions "matrix".

> +	 */
> +	DRM_COLOROP_CSC_FF,
> +
>  };
>  
>  /**

Thanks,
pq

[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

Re: [PATCH 01/10] drm/colorop: Add DRM_COLOROP_CSC_FF

[Borah, Chaitanya Kumar]

Hi Pekka,

Thank you for looking into the patch.

On 3/10/2026 8:02 PM, Pekka Paalanen wrote:
> On Fri,  6 Mar 2026 22:22:58 +0530
> Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> wrote:
> 
>> Introduce DRM_COLOROP_CSC_FF, a new colorop type representing a
>> fixed-function Color Space Conversion (CSC) block.
>>
>> Unlike CTM-based colorops, this block does not expose programmable
>> coefficients. Instead, userspace selects one of the predefined
>> hardware modes via a new CSC_FF_TYPE enum property. Supported modes
>> include common YUV->RGB and RGB709->RGB2020 conversions.
>>
>> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
>> ---
>>   drivers/gpu/drm/drm_atomic.c      |   4 ++
>>   drivers/gpu/drm/drm_atomic_uapi.c |   4 ++
>>   drivers/gpu/drm/drm_colorop.c     | 105 ++++++++++++++++++++++++++++++
>>   include/drm/drm_colorop.h         |  72 ++++++++++++++++++++
>>   include/uapi/drm/drm_mode.h       |  13 ++++
>>   5 files changed, 198 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
>> index 04925166df98..7296b844e3fd 100644
>> --- a/drivers/gpu/drm/drm_atomic.c
>> +++ b/drivers/gpu/drm/drm_atomic.c
>> @@ -844,6 +844,10 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p,
>>   			   drm_get_colorop_lut3d_interpolation_name(colorop->lut3d_interpolation));
>>   		drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
>>   		break;
>> +	case DRM_COLOROP_CSC_FF:
>> +		drm_printf(p, "\tcsc_ff_type=%s\n",
>> +			   drm_get_colorop_csc_ff_type_name(state->csc_ff_type));
>> +		break;
>>   	default:
>>   		break;
>>   	}
>> diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
>> index 87de41fb4459..9af73325aa93 100644
>> --- a/drivers/gpu/drm/drm_atomic_uapi.c
>> +++ b/drivers/gpu/drm/drm_atomic_uapi.c
>> @@ -757,6 +757,8 @@ static int drm_atomic_colorop_set_property(struct drm_colorop *colorop,
>>   	} else if (property == colorop->data_property) {
>>   		return drm_atomic_color_set_data_property(colorop, state,
>>   							  property, val);
>> +	} else if (property == colorop->csc_ff_type_property) {
>> +		state->csc_ff_type = val;
>>   	} else {
>>   		drm_dbg_atomic(colorop->dev,
>>   			       "[COLOROP:%d:%d] unknown property [PROP:%d:%s]\n",
>> @@ -789,6 +791,8 @@ drm_atomic_colorop_get_property(struct drm_colorop *colorop,
>>   		*val = colorop->lut3d_interpolation;
>>   	else if (property == colorop->data_property)
>>   		*val = (state->data) ? state->data->base.id : 0;
>> +	else if (property == colorop->csc_ff_type_property)
>> +		*val = state->csc_ff_type;
>>   	else
>>   		return -EINVAL;
>>   
>> diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
>> index f421c623b3f0..49422c625f4d 100644
>> --- a/drivers/gpu/drm/drm_colorop.c
>> +++ b/drivers/gpu/drm/drm_colorop.c
>> @@ -68,6 +68,7 @@ static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = {
>>   	{ DRM_COLOROP_CTM_3X4, "3x4 Matrix"},
>>   	{ DRM_COLOROP_MULTIPLIER, "Multiplier"},
>>   	{ DRM_COLOROP_3D_LUT, "3D LUT"},
>> +	{ DRM_COLOROP_CSC_FF, "CSC Fixed-Function"},
> 
> Hi,
> 
> the fundamental idea seems fine to me, but I have a lot to say about the
> nomenclature.
> 
> What would you think of a more readable name DRM_COLOROP_FIXED_MATRIX
> "Fixed Matrix"?
> 
> Alternatively DRM_COLOROP_ENUM_MATRIX "Enumerated Matrix".
> 

I was intentionally staying away from the word matrix because there was 
no programmable matrix but it would make sense to name it something like
DRM_COLOROP_FIXED_MATRIX (or *_PRESET_MATRIX for that matter).

>>   };
>>   
>>   static const char * const colorop_curve_1d_type_names[] = {
>> @@ -90,6 +91,13 @@ static const struct drm_prop_enum_list drm_colorop_lut3d_interpolation_list[] =
>>   	{ DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL, "Tetrahedral" },
>>   };
>>   
>> +static const char * const colorop_csc_ff_type_names[] = {
>> +	[DRM_COLOROP_CSC_FF_YUV601_RGB601]   = "YUV601 to RGB601",
>> +	[DRM_COLOROP_CSC_FF_YUV709_RGB709]   = "YUV709 to RGB709",
>> +	[DRM_COLOROP_CSC_FF_YUV2020_RGB2020] = "YUV2020 to RGB2020",
>> +	[DRM_COLOROP_CSC_FF_RGB709_RGB2020]  = "RGB709 to RGB2020",
> 
> I'd suggest names:
> 
> "YCbCr 601 to RGB"
> "YCbCr 709 to RGB"
> "YCbCr 2020 NC to RGB"
> "RGB709 to RGB2020"
> 
> or something in that direction.
> 
> The relevant ITU-R BT specifications use YCbCr nomenclature IIRC. Wrt.
> YCbCr-to-RGB conversion, there is no RGB601, RGB709 or RGB2020. There
> is only some RGB, and which primaries it uses is not always tied to
> which YCbCr conversion was used.
>

What I understand from this is that the BT.709(et al.) only defines the 
matrix that is used for YCbCr->RGB, "what" RGB it is defined by the 
primaries (which comes with metadata?).

I will read up on why our HW names these bits as such.

> For YCbCr 2020 I feel it's nice to remember, that there are two
> different conversions in the specification: the simple matrix one
> called "non-constant luminance", and the complex one called "constant
> luminance". Hence "NC".
> 
> It's also good to recall that YCbCr-RGB conversions are done in an
> electrical space, while RGB709-to-RGB2020 conversion must be done in the
> optical space. It is up to the userspace to arrange the neighbouring
> colorops to use the fixed matrix right.
> 

Ack on the above.

>> +};
>> +
>>   /* Init Helpers */
>>   
>>   static int drm_plane_colorop_init(struct drm_device *dev, struct drm_colorop *colorop,
>> @@ -459,6 +467,80 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
>>   }
>>   EXPORT_SYMBOL(drm_plane_colorop_3dlut_init);
>>   
>> +/**
>> + * drm_plane_colorop_csc_ff_init - Initialize a DRM_COLOROP_CSC_FF
>> + *
>> + * @dev: DRM device
>> + * @colorop: The drm_colorop object to initialize
>> + * @plane: The associated drm_plane
>> + * @funcs: control functions for the new colorop
>> + * @supported_csc_ff: A bitfield of supported drm_plane_colorop_csc_ff_type enum values,
>> + *                    created using BIT(csc_ff_type) and combined with the OR '|'
>> + *                    operator.
>> + * @flags: bitmask of misc, see DRM_COLOROP_FLAG_* defines.
>> + * @return zero on success, -E value on failure
>> + */
>> +int drm_plane_colorop_csc_ff_init(struct drm_device *dev, struct drm_colorop *colorop,
>> +				  struct drm_plane *plane, const struct drm_colorop_funcs *funcs,
>> +				  u64 supported_csc_ff, uint32_t flags)
>> +{
>> +	struct drm_prop_enum_list enum_list[DRM_COLOROP_CSC_FF_COUNT];
>> +	int i, len;
>> +
>> +	struct drm_property *prop;
>> +	int ret;
>> +
>> +	if (!supported_csc_ff) {
>> +		drm_err(dev,
>> +			"No supported CSC op for new CSC FF colorop on [PLANE:%d:%s]\n",
>> +			plane->base.id, plane->name);
>> +		return -EINVAL;
>> +	}
>> +
>> +	if ((supported_csc_ff & -BIT(DRM_COLOROP_CSC_FF_COUNT)) != 0) {
>> +		drm_err(dev, "Unknown CSC provided on [PLANE:%d:%s]\n",
>> +			plane->base.id, plane->name);
>> +		return -EINVAL;
>> +	}
>> +
>> +	ret = drm_plane_colorop_init(dev, colorop, plane, funcs, DRM_COLOROP_CSC_FF, flags);
>> +	if (ret)
>> +		return ret;
>> +
>> +	len = 0;
>> +	for (i = 0; i < DRM_COLOROP_CSC_FF_COUNT; i++) {
>> +		if ((supported_csc_ff & BIT(i)) == 0)
>> +			continue;
>> +
>> +		enum_list[len].type = i;
>> +		enum_list[len].name = colorop_csc_ff_type_names[i];
>> +		len++;
>> +	}
>> +
>> +	if (WARN_ON(len <= 0))
>> +		return -EINVAL;
>> +
>> +	prop = drm_property_create_enum(dev, DRM_MODE_PROP_ATOMIC, "CSC_FF_TYPE",
>> +					enum_list, len);
> 
> The Color Space Conversion Fixed-Function type is always "fixed
> matrix", right?
> 
> The name for the colorop property to choose one of the supported
> matrices could be... "matrix"? "choice"?

Ack.

> 
> Does the property name need to be unique over all colorop types?
> 

I am not sure if I understand your question. Could you please elaborate?

>> +
>> +	if (!prop)
>> +		return -ENOMEM;
>> +
>> +	colorop->csc_ff_type_property = prop;
>> +	/*
>> +	 * Default to the first supported CSC mode as provided by the driver.
>> +	 * Intuitively this should be something that keeps the colorop in pixel bypass
>> +	 * mode but that is already handled via the standard colorop bypass
>> +	 * property.
>> +	 */
>> +	drm_object_attach_property(&colorop->base, colorop->csc_ff_type_property,
>> +				   enum_list[0].type);
>> +	drm_colorop_reset(colorop);
>> +
>> +	return 0;
>> +}
>> +EXPORT_SYMBOL(drm_plane_colorop_csc_ff_init);
>> +
>>   static void __drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop,
>>   							struct drm_colorop_state *state)
>>   {
>> @@ -513,6 +595,13 @@ static void __drm_colorop_state_reset(struct drm_colorop_state *colorop_state,
>>   						      &val);
>>   		colorop_state->curve_1d_type = val;
>>   	}
>> +
>> +	if (colorop->csc_ff_type_property) {
>> +		drm_object_property_get_default_value(&colorop->base,
>> +						      colorop->csc_ff_type_property,
>> +						      &val);
>> +		colorop_state->csc_ff_type = val;
>> +	}
>>   }
>>   
>>   /**
>> @@ -551,6 +640,7 @@ static const char * const colorop_type_name[] = {
>>   	[DRM_COLOROP_CTM_3X4] = "3x4 Matrix",
>>   	[DRM_COLOROP_MULTIPLIER] = "Multiplier",
>>   	[DRM_COLOROP_3D_LUT] = "3D LUT",
>> +	[DRM_COLOROP_CSC_FF] = "CSC Fixed-Function",
>>   };
> 
> Why are there two arrays with the same DRM_COLOROP_* = name association?
> drm_colorop_type_enum_list is the first one.
> 

This array is explicitly used by drm_get_colorop_type_name(). Connectors 
use an enum list for a similar purpose, so colorops could also reuse an 
enum list here, provided that the enum array index remains in sync with 
the corresponding enum value.

>>   
>>   static const char * const colorop_lu3d_interpolation_name[] = {
>> @@ -607,6 +697,21 @@ const char *drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_inte
>>   	return colorop_lu3d_interpolation_name[type];
>>   }
>>   
>> +/**
>> + * drm_get_colorop_csc_ff_type_name: return a string for interpolation type
>> + * @type: csc ff type to compute name of
>> + *
>> + * In contrast to the other drm_get_*_name functions this one here returns a
>> + * const pointer and hence is threadsafe.
>> + */
>> +const char *drm_get_colorop_csc_ff_type_name(enum drm_colorop_csc_ff_type type)
>> +{
>> +	if (WARN_ON(type >= ARRAY_SIZE(colorop_csc_ff_type_names)))
>> +		return "unknown";
>> +
>> +	return colorop_csc_ff_type_names[type];
>> +}
>> +
>>   /**
>>    * drm_colorop_set_next_property - sets the next pointer
>>    * @colorop: drm colorop
>> diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
>> index bd082854ca74..2cd8e0779c2a 100644
>> --- a/include/drm/drm_colorop.h
>> +++ b/include/drm/drm_colorop.h
>> @@ -134,6 +134,60 @@ enum drm_colorop_curve_1d_type {
>>   	DRM_COLOROP_1D_CURVE_COUNT
>>   };
>>   
>> +/**
>> + * enum drm_colorop_csc_ff_type - type of CSC Fixed-Function
>> + *
>> + * Describes a CSC operation to be applied by the DRM_COLOROP_CSC_FF colorop.
> 
> It's a matrix operation. It seems to me that "CSC operation" is more
> specific and does not fit the YCbCr-to-RGB conversion.
> 

Yes makes sense, matrix would be a more generic term.

>> + */
>> +enum drm_colorop_csc_ff_type {
>> +	/**
>> +	 * @DRM_COLOROP_CSC_FF_YUV601_RGB601
>> +	 *
>> +	 * enum string "YUV601 to RGB601"
>> +	 *
>> +	 * Selects the fixed-function CSC preset that converts YUV
>> +	 * (BT.601) colorimetry to RGB (BT.601).
> 
> This selects the matrix that converts YCbCr into RGB
> according to the BT.601 coefficients.
> 
>> +	 */
>> +	DRM_COLOROP_CSC_FF_YUV601_RGB601,
>> +
>> +	/**
>> +	 * @DRM_COLOROP_CSC_FF_YUV709_RGB709:
>> +	 *
>> +	 * enum string "YUV709 to RGB709"
>> +	 *
>> +	 * Selects the fixed-function CSC preset that converts YUV
>> +	 * (BT.709) colorimetry to RGB (BT.709).
> 
> This selects the matrix that converts YCbCr into RGB
> according to the BT.709 coefficients.
> 
>> +	 */
>> +	DRM_COLOROP_CSC_FF_YUV709_RGB709,
>> +
>> +	/**
>> +	 * @DRM_COLOROP_CSC_FF_YUV2020_RGB2020:
>> +	 *
>> +	 * enum string "YUV2020 to RGB2020"
>> +	 *
>> +	 * Selects the fixed-function CSC preset that converts YUV
>> +	 * (BT.2020) colorimetry to RGB (BT.2020).
> 
> This selects the matrix that converts YCbCr into RGB
> according to the BT.2020 non-constant luminance coefficients.
> 
>> +	 */
>> +	DRM_COLOROP_CSC_FF_YUV2020_RGB2020,
>> +
>> +	/**
>> +	 * @DRM_COLOROP_CSC_FF_RGB709_RGB2020:
>> +	 *
>> +	 * enum string "RGB709 to RGB2020"
>> +	 *
>> +	 * Selects the fixed-function CSC preset that converts RGB
>> +	 * (BT.709) colorimetry to RGB (BT.2020).
> 
> This selects the matrix that converts optical RGB from BT.709 primaries
> to BT.2020 primaries.
> 

Ack on the documentation.

>> +	 */
>> +	DRM_COLOROP_CSC_FF_RGB709_RGB2020,
>> +
>> +	/**
>> +	 * @DRM_COLOROP_CSC_FF_COUNT:
>> +	 *
>> +	 * enum value denoting the size of the enum
>> +	 */
>> +	DRM_COLOROP_CSC_FF_COUNT
>> +};
>> +
>>   /**
>>    * struct drm_colorop_state - mutable colorop state
>>    */
>> @@ -183,6 +237,13 @@ struct drm_colorop_state {
>>   	 */
>>   	struct drm_property_blob *data;
>>   
>> +	/**
>> +	 * @csc_ff_type:
>> +	 *
>> +	 * Type of Fixed function CSC.
>> +	 */
>> +	enum drm_colorop_csc_ff_type csc_ff_type;
>> +
>>   	/** @state: backpointer to global drm_atomic_state */
>>   	struct drm_atomic_state *state;
>>   };
>> @@ -368,6 +429,13 @@ struct drm_colorop {
>>   	 */
>>   	struct drm_property *data_property;
>>   
>> +	/**
>> +	 * @csc_ff_type_property:
>> +	 *
>> +	 * Sub-type for DRM_COLOROP_CSC_FF type.
>> +	 */
>> +	struct drm_property *csc_ff_type_property;
>> +
>>   	/**
>>   	 * @next_property:
>>   	 *
>> @@ -424,6 +492,9 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
>>   				 uint32_t lut_size,
>>   				 enum drm_colorop_lut3d_interpolation_type interpolation,
>>   				 uint32_t flags);
>> +int drm_plane_colorop_csc_ff_init(struct drm_device *dev, struct drm_colorop *colorop,
>> +				  struct drm_plane *plane, const struct drm_colorop_funcs *funcs,
>> +				  u64 supported_csc_ff, uint32_t flags);
>>   
>>   struct drm_colorop_state *
>>   drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop);
>> @@ -480,6 +551,7 @@ drm_get_colorop_lut1d_interpolation_name(enum drm_colorop_lut1d_interpolation_ty
>>   
>>   const char *
>>   drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_interpolation_type type);
>> +const char *drm_get_colorop_csc_ff_type_name(enum drm_colorop_csc_ff_type type);
>>   
>>   void drm_colorop_set_next_property(struct drm_colorop *colorop, struct drm_colorop *next);
>>   
>> diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
>> index 3693d82b5279..f7808e7ea984 100644
>> --- a/include/uapi/drm/drm_mode.h
>> +++ b/include/uapi/drm/drm_mode.h
>> @@ -968,6 +968,19 @@ enum drm_colorop_type {
>>   	 *         color = lut3d[index]
>>   	 */
>>   	DRM_COLOROP_3D_LUT,
>> +
>> +	/**
>> +	 * @DRM_COLOROP_CSC_FF:
>> +	 *
>> +	 * enum string "CSC Fixed-Function"
>> +	 *
>> +	 * A fixed-function Color Space Conversion block where the coefficients
>> +	 * are not programmable but selected from predefined hardware modes via
>> +	 * the CSC_FF_TYPE enum property. The driver advertises the supported
>> +	 * CSC modes through this property.
> 
> This would be a lot more obvious if it was called a "fixed matrix"
> operation or such. The current wording never mentions "matrix".
> 

Ack.

I also wanted throw this question out there. Since we have introduced 
YUV to RGB conversion colorop which essentially replaces the color 
encoding property, would this also be the right time to bring in 
something to replace the color range property.

I recall Harry mentioning in the cover letter of the original series 
that he was working on something along those lines.

==
Chaitanya

>> +	 */
>> +	DRM_COLOROP_CSC_FF,
>> +
>>   };
>>   
>>   /**
> 
> Thanks,
> pq

Re: [PATCH 01/10] drm/colorop: Add DRM_COLOROP_CSC_FF

[Pekka Paalanen]

[-- Attachment #1: Type: text/plain, Size: 19027 bytes --]

On Mon, 16 Mar 2026 12:46:39 +0530
"Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com> wrote:

> Hi Pekka,
> 
> Thank you for looking into the patch.

Hi Chaitanya!

Replies inline below.

> 
> On 3/10/2026 8:02 PM, Pekka Paalanen wrote:
> > On Fri,  6 Mar 2026 22:22:58 +0530
> > Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> wrote:
> >   
> >> Introduce DRM_COLOROP_CSC_FF, a new colorop type representing a
> >> fixed-function Color Space Conversion (CSC) block.
> >>
> >> Unlike CTM-based colorops, this block does not expose programmable
> >> coefficients. Instead, userspace selects one of the predefined
> >> hardware modes via a new CSC_FF_TYPE enum property. Supported modes
> >> include common YUV->RGB and RGB709->RGB2020 conversions.
> >>
> >> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> >> ---
> >>   drivers/gpu/drm/drm_atomic.c      |   4 ++
> >>   drivers/gpu/drm/drm_atomic_uapi.c |   4 ++
> >>   drivers/gpu/drm/drm_colorop.c     | 105 ++++++++++++++++++++++++++++++
> >>   include/drm/drm_colorop.h         |  72 ++++++++++++++++++++
> >>   include/uapi/drm/drm_mode.h       |  13 ++++
> >>   5 files changed, 198 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> >> index 04925166df98..7296b844e3fd 100644
> >> --- a/drivers/gpu/drm/drm_atomic.c
> >> +++ b/drivers/gpu/drm/drm_atomic.c
> >> @@ -844,6 +844,10 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p,
> >>   			   drm_get_colorop_lut3d_interpolation_name(colorop->lut3d_interpolation));
> >>   		drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
> >>   		break;
> >> +	case DRM_COLOROP_CSC_FF:
> >> +		drm_printf(p, "\tcsc_ff_type=%s\n",
> >> +			   drm_get_colorop_csc_ff_type_name(state->csc_ff_type));
> >> +		break;
> >>   	default:
> >>   		break;
> >>   	}
> >> diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
> >> index 87de41fb4459..9af73325aa93 100644
> >> --- a/drivers/gpu/drm/drm_atomic_uapi.c
> >> +++ b/drivers/gpu/drm/drm_atomic_uapi.c
> >> @@ -757,6 +757,8 @@ static int drm_atomic_colorop_set_property(struct drm_colorop *colorop,
> >>   	} else if (property == colorop->data_property) {
> >>   		return drm_atomic_color_set_data_property(colorop, state,
> >>   							  property, val);
> >> +	} else if (property == colorop->csc_ff_type_property) {
> >> +		state->csc_ff_type = val;
> >>   	} else {
> >>   		drm_dbg_atomic(colorop->dev,
> >>   			       "[COLOROP:%d:%d] unknown property [PROP:%d:%s]\n",
> >> @@ -789,6 +791,8 @@ drm_atomic_colorop_get_property(struct drm_colorop *colorop,
> >>   		*val = colorop->lut3d_interpolation;
> >>   	else if (property == colorop->data_property)
> >>   		*val = (state->data) ? state->data->base.id : 0;
> >> +	else if (property == colorop->csc_ff_type_property)
> >> +		*val = state->csc_ff_type;
> >>   	else
> >>   		return -EINVAL;
> >>   
> >> diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
> >> index f421c623b3f0..49422c625f4d 100644
> >> --- a/drivers/gpu/drm/drm_colorop.c
> >> +++ b/drivers/gpu/drm/drm_colorop.c
> >> @@ -68,6 +68,7 @@ static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = {
> >>   	{ DRM_COLOROP_CTM_3X4, "3x4 Matrix"},
> >>   	{ DRM_COLOROP_MULTIPLIER, "Multiplier"},
> >>   	{ DRM_COLOROP_3D_LUT, "3D LUT"},
> >> +	{ DRM_COLOROP_CSC_FF, "CSC Fixed-Function"},  
> > 
> > Hi,
> > 
> > the fundamental idea seems fine to me, but I have a lot to say about the
> > nomenclature.
> > 
> > What would you think of a more readable name DRM_COLOROP_FIXED_MATRIX
> > "Fixed Matrix"?
> > 
> > Alternatively DRM_COLOROP_ENUM_MATRIX "Enumerated Matrix".
> >   
> 
> I was intentionally staying away from the word matrix because there was 
> no programmable matrix but it would make sense to name it something like
> DRM_COLOROP_FIXED_MATRIX (or *_PRESET_MATRIX for that matter).
> 
> >>   };
> >>   
> >>   static const char * const colorop_curve_1d_type_names[] = {
> >> @@ -90,6 +91,13 @@ static const struct drm_prop_enum_list drm_colorop_lut3d_interpolation_list[] =
> >>   	{ DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL, "Tetrahedral" },
> >>   };
> >>   
> >> +static const char * const colorop_csc_ff_type_names[] = {
> >> +	[DRM_COLOROP_CSC_FF_YUV601_RGB601]   = "YUV601 to RGB601",
> >> +	[DRM_COLOROP_CSC_FF_YUV709_RGB709]   = "YUV709 to RGB709",
> >> +	[DRM_COLOROP_CSC_FF_YUV2020_RGB2020] = "YUV2020 to RGB2020",
> >> +	[DRM_COLOROP_CSC_FF_RGB709_RGB2020]  = "RGB709 to RGB2020",  
> > 
> > I'd suggest names:
> > 
> > "YCbCr 601 to RGB"
> > "YCbCr 709 to RGB"
> > "YCbCr 2020 NC to RGB"
> > "RGB709 to RGB2020"
> > 
> > or something in that direction.
> > 
> > The relevant ITU-R BT specifications use YCbCr nomenclature IIRC. Wrt.
> > YCbCr-to-RGB conversion, there is no RGB601, RGB709 or RGB2020. There
> > is only some RGB, and which primaries it uses is not always tied to
> > which YCbCr conversion was used.
> >  
> 
> What I understand from this is that the BT.709(et al.) only defines the 
> matrix that is used for YCbCr->RGB, "what" RGB it is defined by the 
> primaries (which comes with metadata?).

Unfortunately, BT.601, BT.709 and BT.2020 define two separate things each:
- the YCbCr<->RGB conversion, and
- the colorspace primaries (and white point, but that is the same for
  them all).

BT.601 actually has two different sets of primaries. Bt.2020 defines
two different YCbCr conversions. BT.709 uses the same primaries as
sRGB, but is different from sRGB on all other aspects.

Therefore, when you refer to any one of these, you also need to be
clear whether you are referring to the YCbCr conversion or to the
primaries.

> I will read up on why our HW names these bits as such.

Sure, but keep in mind that your hardware naming is irrelevant for the
UAPI design.

> > For YCbCr 2020 I feel it's nice to remember, that there are two
> > different conversions in the specification: the simple matrix one
> > called "non-constant luminance", and the complex one called "constant
> > luminance". Hence "NC".
> > 
> > It's also good to recall that YCbCr-RGB conversions are done in an
> > electrical space, while RGB709-to-RGB2020 conversion must be done in the
> > optical space. It is up to the userspace to arrange the neighbouring
> > colorops to use the fixed matrix right.
> >   
> 
> Ack on the above.
> 
> >> +};
> >> +
> >>   /* Init Helpers */
> >>   
> >>   static int drm_plane_colorop_init(struct drm_device *dev, struct drm_colorop *colorop,
> >> @@ -459,6 +467,80 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
> >>   }
> >>   EXPORT_SYMBOL(drm_plane_colorop_3dlut_init);
> >>   
> >> +/**
> >> + * drm_plane_colorop_csc_ff_init - Initialize a DRM_COLOROP_CSC_FF
> >> + *
> >> + * @dev: DRM device
> >> + * @colorop: The drm_colorop object to initialize
> >> + * @plane: The associated drm_plane
> >> + * @funcs: control functions for the new colorop
> >> + * @supported_csc_ff: A bitfield of supported drm_plane_colorop_csc_ff_type enum values,
> >> + *                    created using BIT(csc_ff_type) and combined with the OR '|'
> >> + *                    operator.
> >> + * @flags: bitmask of misc, see DRM_COLOROP_FLAG_* defines.
> >> + * @return zero on success, -E value on failure
> >> + */
> >> +int drm_plane_colorop_csc_ff_init(struct drm_device *dev, struct drm_colorop *colorop,
> >> +				  struct drm_plane *plane, const struct drm_colorop_funcs *funcs,
> >> +				  u64 supported_csc_ff, uint32_t flags)
> >> +{
> >> +	struct drm_prop_enum_list enum_list[DRM_COLOROP_CSC_FF_COUNT];
> >> +	int i, len;
> >> +
> >> +	struct drm_property *prop;
> >> +	int ret;
> >> +
> >> +	if (!supported_csc_ff) {
> >> +		drm_err(dev,
> >> +			"No supported CSC op for new CSC FF colorop on [PLANE:%d:%s]\n",
> >> +			plane->base.id, plane->name);
> >> +		return -EINVAL;
> >> +	}
> >> +
> >> +	if ((supported_csc_ff & -BIT(DRM_COLOROP_CSC_FF_COUNT)) != 0) {
> >> +		drm_err(dev, "Unknown CSC provided on [PLANE:%d:%s]\n",
> >> +			plane->base.id, plane->name);
> >> +		return -EINVAL;
> >> +	}
> >> +
> >> +	ret = drm_plane_colorop_init(dev, colorop, plane, funcs, DRM_COLOROP_CSC_FF, flags);
> >> +	if (ret)
> >> +		return ret;
> >> +
> >> +	len = 0;
> >> +	for (i = 0; i < DRM_COLOROP_CSC_FF_COUNT; i++) {
> >> +		if ((supported_csc_ff & BIT(i)) == 0)
> >> +			continue;
> >> +
> >> +		enum_list[len].type = i;
> >> +		enum_list[len].name = colorop_csc_ff_type_names[i];
> >> +		len++;
> >> +	}
> >> +
> >> +	if (WARN_ON(len <= 0))
> >> +		return -EINVAL;
> >> +
> >> +	prop = drm_property_create_enum(dev, DRM_MODE_PROP_ATOMIC, "CSC_FF_TYPE",
> >> +					enum_list, len);  
> > 
> > The Color Space Conversion Fixed-Function type is always "fixed
> > matrix", right?
> > 
> > The name for the colorop property to choose one of the supported
> > matrices could be... "matrix"? "choice"?  
> 
> Ack.
> 
> > 
> > Does the property name need to be unique over all colorop types?
> >   
> 
> I am not sure if I understand your question. Could you please elaborate?

Let's say we have two colorop types: MATRIX implements an arbitrary
programmable matrix, and FIXED_MATRIX where you pick the matrix from an
enum.

MATRIX needs a property for the matrix data, I think there is a
colorop property named DATA that takes a blob id and is used by several
colorop types for different kinds of data - they all take a blob id
though.

Ok, so there is no strict requirement for the property to be unique
over all colorop types. But are there any design guidelines here?

Hmm, maybe not.

> >> +
> >> +	if (!prop)
> >> +		return -ENOMEM;
> >> +
> >> +	colorop->csc_ff_type_property = prop;
> >> +	/*
> >> +	 * Default to the first supported CSC mode as provided by the driver.
> >> +	 * Intuitively this should be something that keeps the colorop in pixel bypass
> >> +	 * mode but that is already handled via the standard colorop bypass
> >> +	 * property.
> >> +	 */
> >> +	drm_object_attach_property(&colorop->base, colorop->csc_ff_type_property,
> >> +				   enum_list[0].type);
> >> +	drm_colorop_reset(colorop);
> >> +
> >> +	return 0;
> >> +}
> >> +EXPORT_SYMBOL(drm_plane_colorop_csc_ff_init);
> >> +
> >>   static void __drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop,
> >>   							struct drm_colorop_state *state)
> >>   {
> >> @@ -513,6 +595,13 @@ static void __drm_colorop_state_reset(struct drm_colorop_state *colorop_state,
> >>   						      &val);
> >>   		colorop_state->curve_1d_type = val;
> >>   	}
> >> +
> >> +	if (colorop->csc_ff_type_property) {
> >> +		drm_object_property_get_default_value(&colorop->base,
> >> +						      colorop->csc_ff_type_property,
> >> +						      &val);
> >> +		colorop_state->csc_ff_type = val;
> >> +	}
> >>   }
> >>   
> >>   /**
> >> @@ -551,6 +640,7 @@ static const char * const colorop_type_name[] = {
> >>   	[DRM_COLOROP_CTM_3X4] = "3x4 Matrix",
> >>   	[DRM_COLOROP_MULTIPLIER] = "Multiplier",
> >>   	[DRM_COLOROP_3D_LUT] = "3D LUT",
> >> +	[DRM_COLOROP_CSC_FF] = "CSC Fixed-Function",
> >>   };  
> > 
> > Why are there two arrays with the same DRM_COLOROP_* = name association?
> > drm_colorop_type_enum_list is the first one.
> >   
> 
> This array is explicitly used by drm_get_colorop_type_name(). Connectors 
> use an enum list for a similar purpose, so colorops could also reuse an 
> enum list here, provided that the enum array index remains in sync with 
> the corresponding enum value.
> 
> >>   
> >>   static const char * const colorop_lu3d_interpolation_name[] = {
> >> @@ -607,6 +697,21 @@ const char *drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_inte
> >>   	return colorop_lu3d_interpolation_name[type];
> >>   }
> >>   
> >> +/**
> >> + * drm_get_colorop_csc_ff_type_name: return a string for interpolation type
> >> + * @type: csc ff type to compute name of
> >> + *
> >> + * In contrast to the other drm_get_*_name functions this one here returns a
> >> + * const pointer and hence is threadsafe.
> >> + */
> >> +const char *drm_get_colorop_csc_ff_type_name(enum drm_colorop_csc_ff_type type)
> >> +{
> >> +	if (WARN_ON(type >= ARRAY_SIZE(colorop_csc_ff_type_names)))
> >> +		return "unknown";
> >> +
> >> +	return colorop_csc_ff_type_names[type];
> >> +}
> >> +
> >>   /**
> >>    * drm_colorop_set_next_property - sets the next pointer
> >>    * @colorop: drm colorop
> >> diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
> >> index bd082854ca74..2cd8e0779c2a 100644
> >> --- a/include/drm/drm_colorop.h
> >> +++ b/include/drm/drm_colorop.h
> >> @@ -134,6 +134,60 @@ enum drm_colorop_curve_1d_type {
> >>   	DRM_COLOROP_1D_CURVE_COUNT
> >>   };
> >>   
> >> +/**
> >> + * enum drm_colorop_csc_ff_type - type of CSC Fixed-Function
> >> + *
> >> + * Describes a CSC operation to be applied by the DRM_COLOROP_CSC_FF colorop.  
> > 
> > It's a matrix operation. It seems to me that "CSC operation" is more
> > specific and does not fit the YCbCr-to-RGB conversion.
> >   
> 
> Yes makes sense, matrix would be a more generic term.
> 
> >> + */
> >> +enum drm_colorop_csc_ff_type {
> >> +	/**
> >> +	 * @DRM_COLOROP_CSC_FF_YUV601_RGB601
> >> +	 *
> >> +	 * enum string "YUV601 to RGB601"
> >> +	 *
> >> +	 * Selects the fixed-function CSC preset that converts YUV
> >> +	 * (BT.601) colorimetry to RGB (BT.601).  
> > 
> > This selects the matrix that converts YCbCr into RGB
> > according to the BT.601 coefficients.
> >   
> >> +	 */
> >> +	DRM_COLOROP_CSC_FF_YUV601_RGB601,
> >> +
> >> +	/**
> >> +	 * @DRM_COLOROP_CSC_FF_YUV709_RGB709:
> >> +	 *
> >> +	 * enum string "YUV709 to RGB709"
> >> +	 *
> >> +	 * Selects the fixed-function CSC preset that converts YUV
> >> +	 * (BT.709) colorimetry to RGB (BT.709).  
> > 
> > This selects the matrix that converts YCbCr into RGB
> > according to the BT.709 coefficients.
> >   
> >> +	 */
> >> +	DRM_COLOROP_CSC_FF_YUV709_RGB709,
> >> +
> >> +	/**
> >> +	 * @DRM_COLOROP_CSC_FF_YUV2020_RGB2020:
> >> +	 *
> >> +	 * enum string "YUV2020 to RGB2020"
> >> +	 *
> >> +	 * Selects the fixed-function CSC preset that converts YUV
> >> +	 * (BT.2020) colorimetry to RGB (BT.2020).  
> > 
> > This selects the matrix that converts YCbCr into RGB
> > according to the BT.2020 non-constant luminance coefficients.
> >   
> >> +	 */
> >> +	DRM_COLOROP_CSC_FF_YUV2020_RGB2020,
> >> +
> >> +	/**
> >> +	 * @DRM_COLOROP_CSC_FF_RGB709_RGB2020:
> >> +	 *
> >> +	 * enum string "RGB709 to RGB2020"
> >> +	 *
> >> +	 * Selects the fixed-function CSC preset that converts RGB
> >> +	 * (BT.709) colorimetry to RGB (BT.2020).  
> > 
> > This selects the matrix that converts optical RGB from BT.709 primaries
> > to BT.2020 primaries.
> >   
> 
> Ack on the documentation.
> 
> >> +	 */
> >> +	DRM_COLOROP_CSC_FF_RGB709_RGB2020,
> >> +
> >> +	/**
> >> +	 * @DRM_COLOROP_CSC_FF_COUNT:
> >> +	 *
> >> +	 * enum value denoting the size of the enum
> >> +	 */
> >> +	DRM_COLOROP_CSC_FF_COUNT
> >> +};
> >> +
> >>   /**
> >>    * struct drm_colorop_state - mutable colorop state
> >>    */
> >> @@ -183,6 +237,13 @@ struct drm_colorop_state {
> >>   	 */
> >>   	struct drm_property_blob *data;
> >>   
> >> +	/**
> >> +	 * @csc_ff_type:
> >> +	 *
> >> +	 * Type of Fixed function CSC.
> >> +	 */
> >> +	enum drm_colorop_csc_ff_type csc_ff_type;
> >> +
> >>   	/** @state: backpointer to global drm_atomic_state */
> >>   	struct drm_atomic_state *state;
> >>   };
> >> @@ -368,6 +429,13 @@ struct drm_colorop {
> >>   	 */
> >>   	struct drm_property *data_property;
> >>   
> >> +	/**
> >> +	 * @csc_ff_type_property:
> >> +	 *
> >> +	 * Sub-type for DRM_COLOROP_CSC_FF type.
> >> +	 */
> >> +	struct drm_property *csc_ff_type_property;
> >> +
> >>   	/**
> >>   	 * @next_property:
> >>   	 *
> >> @@ -424,6 +492,9 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
> >>   				 uint32_t lut_size,
> >>   				 enum drm_colorop_lut3d_interpolation_type interpolation,
> >>   				 uint32_t flags);
> >> +int drm_plane_colorop_csc_ff_init(struct drm_device *dev, struct drm_colorop *colorop,
> >> +				  struct drm_plane *plane, const struct drm_colorop_funcs *funcs,
> >> +				  u64 supported_csc_ff, uint32_t flags);
> >>   
> >>   struct drm_colorop_state *
> >>   drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop);
> >> @@ -480,6 +551,7 @@ drm_get_colorop_lut1d_interpolation_name(enum drm_colorop_lut1d_interpolation_ty
> >>   
> >>   const char *
> >>   drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_interpolation_type type);
> >> +const char *drm_get_colorop_csc_ff_type_name(enum drm_colorop_csc_ff_type type);
> >>   
> >>   void drm_colorop_set_next_property(struct drm_colorop *colorop, struct drm_colorop *next);
> >>   
> >> diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
> >> index 3693d82b5279..f7808e7ea984 100644
> >> --- a/include/uapi/drm/drm_mode.h
> >> +++ b/include/uapi/drm/drm_mode.h
> >> @@ -968,6 +968,19 @@ enum drm_colorop_type {
> >>   	 *         color = lut3d[index]
> >>   	 */
> >>   	DRM_COLOROP_3D_LUT,
> >> +
> >> +	/**
> >> +	 * @DRM_COLOROP_CSC_FF:
> >> +	 *
> >> +	 * enum string "CSC Fixed-Function"
> >> +	 *
> >> +	 * A fixed-function Color Space Conversion block where the coefficients
> >> +	 * are not programmable but selected from predefined hardware modes via
> >> +	 * the CSC_FF_TYPE enum property. The driver advertises the supported
> >> +	 * CSC modes through this property.  
> > 
> > This would be a lot more obvious if it was called a "fixed matrix"
> > operation or such. The current wording never mentions "matrix".
> >   
> 
> Ack.
> 
> I also wanted throw this question out there. Since we have introduced 
> YUV to RGB conversion colorop which essentially replaces the color 
> encoding property, would this also be the right time to bring in 
> something to replace the color range property.

Yes.

> I recall Harry mentioning in the cover letter of the original series 
> that he was working on something along those lines.

Reading Harry's latest blog post it sounds he has done similar work as
you.

Harry's blog link seems dead, but the post is available at
https://planet.freedesktop.org/
titled "Harry Wentland: Plane Color Pipeline, CSC, 3D LUT, and KWin"
with links to patches.


Thanks,
pq

> 
> ==
> Chaitanya
> 
> >> +	 */
> >> +	DRM_COLOROP_CSC_FF,
> >> +
> >>   };
> >>   
> >>   /**  
> > 
> > Thanks,
> > pq  
> 


[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

Re: [PATCH 01/10] drm/colorop: Add DRM_COLOROP_CSC_FF

[Borah, Chaitanya Kumar]

On 3/16/2026 2:27 PM, Pekka Paalanen wrote:
> On Mon, 16 Mar 2026 12:46:39 +0530
> "Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com> wrote:
> 
>> Hi Pekka,
>>
>> Thank you for looking into the patch.
> 
> Hi Chaitanya!
> 
> Replies inline below.
> 
>>
>> On 3/10/2026 8:02 PM, Pekka Paalanen wrote:
>>> On Fri,  6 Mar 2026 22:22:58 +0530
>>> Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> wrote:
>>>    
>>>> Introduce DRM_COLOROP_CSC_FF, a new colorop type representing a
>>>> fixed-function Color Space Conversion (CSC) block.
>>>>
>>>> Unlike CTM-based colorops, this block does not expose programmable
>>>> coefficients. Instead, userspace selects one of the predefined
>>>> hardware modes via a new CSC_FF_TYPE enum property. Supported modes
>>>> include common YUV->RGB and RGB709->RGB2020 conversions.
>>>>
>>>> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
>>>> ---
>>>>    drivers/gpu/drm/drm_atomic.c      |   4 ++
>>>>    drivers/gpu/drm/drm_atomic_uapi.c |   4 ++
>>>>    drivers/gpu/drm/drm_colorop.c     | 105 ++++++++++++++++++++++++++++++
>>>>    include/drm/drm_colorop.h         |  72 ++++++++++++++++++++
>>>>    include/uapi/drm/drm_mode.h       |  13 ++++
>>>>    5 files changed, 198 insertions(+)
>>>>
>>>> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
>>>> index 04925166df98..7296b844e3fd 100644
>>>> --- a/drivers/gpu/drm/drm_atomic.c
>>>> +++ b/drivers/gpu/drm/drm_atomic.c
>>>> @@ -844,6 +844,10 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p,
>>>>    			   drm_get_colorop_lut3d_interpolation_name(colorop->lut3d_interpolation));
>>>>    		drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
>>>>    		break;
>>>> +	case DRM_COLOROP_CSC_FF:
>>>> +		drm_printf(p, "\tcsc_ff_type=%s\n",
>>>> +			   drm_get_colorop_csc_ff_type_name(state->csc_ff_type));
>>>> +		break;
>>>>    	default:
>>>>    		break;
>>>>    	}
>>>> diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
>>>> index 87de41fb4459..9af73325aa93 100644
>>>> --- a/drivers/gpu/drm/drm_atomic_uapi.c
>>>> +++ b/drivers/gpu/drm/drm_atomic_uapi.c
>>>> @@ -757,6 +757,8 @@ static int drm_atomic_colorop_set_property(struct drm_colorop *colorop,
>>>>    	} else if (property == colorop->data_property) {
>>>>    		return drm_atomic_color_set_data_property(colorop, state,
>>>>    							  property, val);
>>>> +	} else if (property == colorop->csc_ff_type_property) {
>>>> +		state->csc_ff_type = val;
>>>>    	} else {
>>>>    		drm_dbg_atomic(colorop->dev,
>>>>    			       "[COLOROP:%d:%d] unknown property [PROP:%d:%s]\n",
>>>> @@ -789,6 +791,8 @@ drm_atomic_colorop_get_property(struct drm_colorop *colorop,
>>>>    		*val = colorop->lut3d_interpolation;
>>>>    	else if (property == colorop->data_property)
>>>>    		*val = (state->data) ? state->data->base.id : 0;
>>>> +	else if (property == colorop->csc_ff_type_property)
>>>> +		*val = state->csc_ff_type;
>>>>    	else
>>>>    		return -EINVAL;
>>>>    
>>>> diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
>>>> index f421c623b3f0..49422c625f4d 100644
>>>> --- a/drivers/gpu/drm/drm_colorop.c
>>>> +++ b/drivers/gpu/drm/drm_colorop.c
>>>> @@ -68,6 +68,7 @@ static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = {
>>>>    	{ DRM_COLOROP_CTM_3X4, "3x4 Matrix"},
>>>>    	{ DRM_COLOROP_MULTIPLIER, "Multiplier"},
>>>>    	{ DRM_COLOROP_3D_LUT, "3D LUT"},
>>>> +	{ DRM_COLOROP_CSC_FF, "CSC Fixed-Function"},
>>>
>>> Hi,
>>>
>>> the fundamental idea seems fine to me, but I have a lot to say about the
>>> nomenclature.
>>>
>>> What would you think of a more readable name DRM_COLOROP_FIXED_MATRIX
>>> "Fixed Matrix"?
>>>
>>> Alternatively DRM_COLOROP_ENUM_MATRIX "Enumerated Matrix".
>>>    
>>
>> I was intentionally staying away from the word matrix because there was
>> no programmable matrix but it would make sense to name it something like
>> DRM_COLOROP_FIXED_MATRIX (or *_PRESET_MATRIX for that matter).
>>
>>>>    };
>>>>    
>>>>    static const char * const colorop_curve_1d_type_names[] = {
>>>> @@ -90,6 +91,13 @@ static const struct drm_prop_enum_list drm_colorop_lut3d_interpolation_list[] =
>>>>    	{ DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL, "Tetrahedral" },
>>>>    };
>>>>    
>>>> +static const char * const colorop_csc_ff_type_names[] = {
>>>> +	[DRM_COLOROP_CSC_FF_YUV601_RGB601]   = "YUV601 to RGB601",
>>>> +	[DRM_COLOROP_CSC_FF_YUV709_RGB709]   = "YUV709 to RGB709",
>>>> +	[DRM_COLOROP_CSC_FF_YUV2020_RGB2020] = "YUV2020 to RGB2020",
>>>> +	[DRM_COLOROP_CSC_FF_RGB709_RGB2020]  = "RGB709 to RGB2020",
>>>
>>> I'd suggest names:
>>>
>>> "YCbCr 601 to RGB"
>>> "YCbCr 709 to RGB"
>>> "YCbCr 2020 NC to RGB"
>>> "RGB709 to RGB2020"
>>>
>>> or something in that direction.
>>>
>>> The relevant ITU-R BT specifications use YCbCr nomenclature IIRC. Wrt.
>>> YCbCr-to-RGB conversion, there is no RGB601, RGB709 or RGB2020. There
>>> is only some RGB, and which primaries it uses is not always tied to
>>> which YCbCr conversion was used.
>>>   
>>
>> What I understand from this is that the BT.709(et al.) only defines the
>> matrix that is used for YCbCr->RGB, "what" RGB it is defined by the
>> primaries (which comes with metadata?).
> 
> Unfortunately, BT.601, BT.709 and BT.2020 define two separate things each:
> - the YCbCr<->RGB conversion, and
> - the colorspace primaries (and white point, but that is the same for
>    them all).
> 
> BT.601 actually has two different sets of primaries. Bt.2020 defines
> two different YCbCr conversions. BT.709 uses the same primaries as
> sRGB, but is different from sRGB on all other aspects.
> 
> Therefore, when you refer to any one of these, you also need to be
> clear whether you are referring to the YCbCr conversion or to the
> primaries.
> 

In that case, if the HW block says that it does YCbCr to RGB conversion 
using rec BT.709, the resultant RGB follows the primaries as described 
by BT.709 or mathematically it does not really matter?

>> I will read up on why our HW names these bits as such.
> 
> Sure, but keep in mind that your hardware naming is irrelevant for the
> UAPI design.

Understood, I just want to make sure that the HW does exactly what we 
will advertise through the UAPI.

> 
>>> For YCbCr 2020 I feel it's nice to remember, that there are two
>>> different conversions in the specification: the simple matrix one
>>> called "non-constant luminance", and the complex one called "constant
>>> luminance". Hence "NC".
>>>
>>> It's also good to recall that YCbCr-RGB conversions are done in an
>>> electrical space, while RGB709-to-RGB2020 conversion must be done in the
>>> optical space. It is up to the userspace to arrange the neighbouring
>>> colorops to use the fixed matrix right.
>>>    
>>
>> Ack on the above.
>>
>>>> +};
>>>> +
>>>>    /* Init Helpers */
>>>>    
>>>>    static int drm_plane_colorop_init(struct drm_device *dev, struct drm_colorop *colorop,
>>>> @@ -459,6 +467,80 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
>>>>    }
>>>>    EXPORT_SYMBOL(drm_plane_colorop_3dlut_init);
>>>>    
>>>> +/**
>>>> + * drm_plane_colorop_csc_ff_init - Initialize a DRM_COLOROP_CSC_FF
>>>> + *
>>>> + * @dev: DRM device
>>>> + * @colorop: The drm_colorop object to initialize
>>>> + * @plane: The associated drm_plane
>>>> + * @funcs: control functions for the new colorop
>>>> + * @supported_csc_ff: A bitfield of supported drm_plane_colorop_csc_ff_type enum values,
>>>> + *                    created using BIT(csc_ff_type) and combined with the OR '|'
>>>> + *                    operator.
>>>> + * @flags: bitmask of misc, see DRM_COLOROP_FLAG_* defines.
>>>> + * @return zero on success, -E value on failure
>>>> + */
>>>> +int drm_plane_colorop_csc_ff_init(struct drm_device *dev, struct drm_colorop *colorop,
>>>> +				  struct drm_plane *plane, const struct drm_colorop_funcs *funcs,
>>>> +				  u64 supported_csc_ff, uint32_t flags)
>>>> +{
>>>> +	struct drm_prop_enum_list enum_list[DRM_COLOROP_CSC_FF_COUNT];
>>>> +	int i, len;
>>>> +
>>>> +	struct drm_property *prop;
>>>> +	int ret;
>>>> +
>>>> +	if (!supported_csc_ff) {
>>>> +		drm_err(dev,
>>>> +			"No supported CSC op for new CSC FF colorop on [PLANE:%d:%s]\n",
>>>> +			plane->base.id, plane->name);
>>>> +		return -EINVAL;
>>>> +	}
>>>> +
>>>> +	if ((supported_csc_ff & -BIT(DRM_COLOROP_CSC_FF_COUNT)) != 0) {
>>>> +		drm_err(dev, "Unknown CSC provided on [PLANE:%d:%s]\n",
>>>> +			plane->base.id, plane->name);
>>>> +		return -EINVAL;
>>>> +	}
>>>> +
>>>> +	ret = drm_plane_colorop_init(dev, colorop, plane, funcs, DRM_COLOROP_CSC_FF, flags);
>>>> +	if (ret)
>>>> +		return ret;
>>>> +
>>>> +	len = 0;
>>>> +	for (i = 0; i < DRM_COLOROP_CSC_FF_COUNT; i++) {
>>>> +		if ((supported_csc_ff & BIT(i)) == 0)
>>>> +			continue;
>>>> +
>>>> +		enum_list[len].type = i;
>>>> +		enum_list[len].name = colorop_csc_ff_type_names[i];
>>>> +		len++;
>>>> +	}
>>>> +
>>>> +	if (WARN_ON(len <= 0))
>>>> +		return -EINVAL;
>>>> +
>>>> +	prop = drm_property_create_enum(dev, DRM_MODE_PROP_ATOMIC, "CSC_FF_TYPE",
>>>> +					enum_list, len);
>>>
>>> The Color Space Conversion Fixed-Function type is always "fixed
>>> matrix", right?
>>>
>>> The name for the colorop property to choose one of the supported
>>> matrices could be... "matrix"? "choice"?
>>
>> Ack.
>>
>>>
>>> Does the property name need to be unique over all colorop types?
>>>    
>>
>> I am not sure if I understand your question. Could you please elaborate?
> 
> Let's say we have two colorop types: MATRIX implements an arbitrary
> programmable matrix, and FIXED_MATRIX where you pick the matrix from an
> enum.
> 
> MATRIX needs a property for the matrix data, I think there is a
> colorop property named DATA that takes a blob id and is used by several
> colorop types for different kinds of data - they all take a blob id
> though.
> 

Yes, I think that is what [1] does.

[1] 
https://lore.kernel.org/dri-devel/20251223-mtk-ovl-pre-blend-colorops-v1-9-0cb99bd0ab33@collabora.com/.

> Ok, so there is no strict requirement for the property to be unique
> over all colorop types. But are there any design guidelines here?
> 
> Hmm, maybe not.
> 

Yeah I don't think there is any such design guideline.

In theory, we could have re-used the enum property "CURVE_1D_TYPE" 
(after renaming it, ofcourse) and assign meaning to the property based 
on the type of the colorop it is attached to, like we do with "DATA" but 
I think that ship has sailed(?).

But in hindsight that would have been a better approach so as to not 
bloat the colorop object with properties.

>>>> +
>>>> +	if (!prop)
>>>> +		return -ENOMEM;
>>>> +
>>>> +	colorop->csc_ff_type_property = prop;
>>>> +	/*
>>>> +	 * Default to the first supported CSC mode as provided by the driver.
>>>> +	 * Intuitively this should be something that keeps the colorop in pixel bypass
>>>> +	 * mode but that is already handled via the standard colorop bypass
>>>> +	 * property.
>>>> +	 */
>>>> +	drm_object_attach_property(&colorop->base, colorop->csc_ff_type_property,
>>>> +				   enum_list[0].type);
>>>> +	drm_colorop_reset(colorop);
>>>> +
>>>> +	return 0;
>>>> +}
>>>> +EXPORT_SYMBOL(drm_plane_colorop_csc_ff_init);
>>>> +
>>>>    static void __drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop,
>>>>    							struct drm_colorop_state *state)
>>>>    {
>>>> @@ -513,6 +595,13 @@ static void __drm_colorop_state_reset(struct drm_colorop_state *colorop_state,
>>>>    						      &val);
>>>>    		colorop_state->curve_1d_type = val;
>>>>    	}
>>>> +
>>>> +	if (colorop->csc_ff_type_property) {
>>>> +		drm_object_property_get_default_value(&colorop->base,
>>>> +						      colorop->csc_ff_type_property,
>>>> +						      &val);
>>>> +		colorop_state->csc_ff_type = val;
>>>> +	}
>>>>    }
>>>>    
>>>>    /**
>>>> @@ -551,6 +640,7 @@ static const char * const colorop_type_name[] = {
>>>>    	[DRM_COLOROP_CTM_3X4] = "3x4 Matrix",
>>>>    	[DRM_COLOROP_MULTIPLIER] = "Multiplier",
>>>>    	[DRM_COLOROP_3D_LUT] = "3D LUT",
>>>> +	[DRM_COLOROP_CSC_FF] = "CSC Fixed-Function",
>>>>    };
>>>
>>> Why are there two arrays with the same DRM_COLOROP_* = name association?
>>> drm_colorop_type_enum_list is the first one.
>>>    
>>
>> This array is explicitly used by drm_get_colorop_type_name(). Connectors
>> use an enum list for a similar purpose, so colorops could also reuse an
>> enum list here, provided that the enum array index remains in sync with
>> the corresponding enum value.
>>
>>>>    
>>>>    static const char * const colorop_lu3d_interpolation_name[] = {
>>>> @@ -607,6 +697,21 @@ const char *drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_inte
>>>>    	return colorop_lu3d_interpolation_name[type];
>>>>    }
>>>>    
>>>> +/**
>>>> + * drm_get_colorop_csc_ff_type_name: return a string for interpolation type
>>>> + * @type: csc ff type to compute name of
>>>> + *
>>>> + * In contrast to the other drm_get_*_name functions this one here returns a
>>>> + * const pointer and hence is threadsafe.
>>>> + */
>>>> +const char *drm_get_colorop_csc_ff_type_name(enum drm_colorop_csc_ff_type type)
>>>> +{
>>>> +	if (WARN_ON(type >= ARRAY_SIZE(colorop_csc_ff_type_names)))
>>>> +		return "unknown";
>>>> +
>>>> +	return colorop_csc_ff_type_names[type];
>>>> +}
>>>> +
>>>>    /**
>>>>     * drm_colorop_set_next_property - sets the next pointer
>>>>     * @colorop: drm colorop
>>>> diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
>>>> index bd082854ca74..2cd8e0779c2a 100644
>>>> --- a/include/drm/drm_colorop.h
>>>> +++ b/include/drm/drm_colorop.h
>>>> @@ -134,6 +134,60 @@ enum drm_colorop_curve_1d_type {
>>>>    	DRM_COLOROP_1D_CURVE_COUNT
>>>>    };
>>>>    
>>>> +/**
>>>> + * enum drm_colorop_csc_ff_type - type of CSC Fixed-Function
>>>> + *
>>>> + * Describes a CSC operation to be applied by the DRM_COLOROP_CSC_FF colorop.
>>>
>>> It's a matrix operation. It seems to me that "CSC operation" is more
>>> specific and does not fit the YCbCr-to-RGB conversion.
>>>    
>>
>> Yes makes sense, matrix would be a more generic term.
>>
>>>> + */
>>>> +enum drm_colorop_csc_ff_type {
>>>> +	/**
>>>> +	 * @DRM_COLOROP_CSC_FF_YUV601_RGB601
>>>> +	 *
>>>> +	 * enum string "YUV601 to RGB601"
>>>> +	 *
>>>> +	 * Selects the fixed-function CSC preset that converts YUV
>>>> +	 * (BT.601) colorimetry to RGB (BT.601).
>>>
>>> This selects the matrix that converts YCbCr into RGB
>>> according to the BT.601 coefficients.
>>>    
>>>> +	 */
>>>> +	DRM_COLOROP_CSC_FF_YUV601_RGB601,
>>>> +
>>>> +	/**
>>>> +	 * @DRM_COLOROP_CSC_FF_YUV709_RGB709:
>>>> +	 *
>>>> +	 * enum string "YUV709 to RGB709"
>>>> +	 *
>>>> +	 * Selects the fixed-function CSC preset that converts YUV
>>>> +	 * (BT.709) colorimetry to RGB (BT.709).
>>>
>>> This selects the matrix that converts YCbCr into RGB
>>> according to the BT.709 coefficients.
>>>    
>>>> +	 */
>>>> +	DRM_COLOROP_CSC_FF_YUV709_RGB709,
>>>> +
>>>> +	/**
>>>> +	 * @DRM_COLOROP_CSC_FF_YUV2020_RGB2020:
>>>> +	 *
>>>> +	 * enum string "YUV2020 to RGB2020"
>>>> +	 *
>>>> +	 * Selects the fixed-function CSC preset that converts YUV
>>>> +	 * (BT.2020) colorimetry to RGB (BT.2020).
>>>
>>> This selects the matrix that converts YCbCr into RGB
>>> according to the BT.2020 non-constant luminance coefficients.
>>>    
>>>> +	 */
>>>> +	DRM_COLOROP_CSC_FF_YUV2020_RGB2020,
>>>> +
>>>> +	/**
>>>> +	 * @DRM_COLOROP_CSC_FF_RGB709_RGB2020:
>>>> +	 *
>>>> +	 * enum string "RGB709 to RGB2020"
>>>> +	 *
>>>> +	 * Selects the fixed-function CSC preset that converts RGB
>>>> +	 * (BT.709) colorimetry to RGB (BT.2020).
>>>
>>> This selects the matrix that converts optical RGB from BT.709 primaries
>>> to BT.2020 primaries.
>>>    
>>
>> Ack on the documentation.
>>
>>>> +	 */
>>>> +	DRM_COLOROP_CSC_FF_RGB709_RGB2020,
>>>> +
>>>> +	/**
>>>> +	 * @DRM_COLOROP_CSC_FF_COUNT:
>>>> +	 *
>>>> +	 * enum value denoting the size of the enum
>>>> +	 */
>>>> +	DRM_COLOROP_CSC_FF_COUNT
>>>> +};
>>>> +
>>>>    /**
>>>>     * struct drm_colorop_state - mutable colorop state
>>>>     */
>>>> @@ -183,6 +237,13 @@ struct drm_colorop_state {
>>>>    	 */
>>>>    	struct drm_property_blob *data;
>>>>    
>>>> +	/**
>>>> +	 * @csc_ff_type:
>>>> +	 *
>>>> +	 * Type of Fixed function CSC.
>>>> +	 */
>>>> +	enum drm_colorop_csc_ff_type csc_ff_type;
>>>> +
>>>>    	/** @state: backpointer to global drm_atomic_state */
>>>>    	struct drm_atomic_state *state;
>>>>    };
>>>> @@ -368,6 +429,13 @@ struct drm_colorop {
>>>>    	 */
>>>>    	struct drm_property *data_property;
>>>>    
>>>> +	/**
>>>> +	 * @csc_ff_type_property:
>>>> +	 *
>>>> +	 * Sub-type for DRM_COLOROP_CSC_FF type.
>>>> +	 */
>>>> +	struct drm_property *csc_ff_type_property;
>>>> +
>>>>    	/**
>>>>    	 * @next_property:
>>>>    	 *
>>>> @@ -424,6 +492,9 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
>>>>    				 uint32_t lut_size,
>>>>    				 enum drm_colorop_lut3d_interpolation_type interpolation,
>>>>    				 uint32_t flags);
>>>> +int drm_plane_colorop_csc_ff_init(struct drm_device *dev, struct drm_colorop *colorop,
>>>> +				  struct drm_plane *plane, const struct drm_colorop_funcs *funcs,
>>>> +				  u64 supported_csc_ff, uint32_t flags);
>>>>    
>>>>    struct drm_colorop_state *
>>>>    drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop);
>>>> @@ -480,6 +551,7 @@ drm_get_colorop_lut1d_interpolation_name(enum drm_colorop_lut1d_interpolation_ty
>>>>    
>>>>    const char *
>>>>    drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_interpolation_type type);
>>>> +const char *drm_get_colorop_csc_ff_type_name(enum drm_colorop_csc_ff_type type);
>>>>    
>>>>    void drm_colorop_set_next_property(struct drm_colorop *colorop, struct drm_colorop *next);
>>>>    
>>>> diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
>>>> index 3693d82b5279..f7808e7ea984 100644
>>>> --- a/include/uapi/drm/drm_mode.h
>>>> +++ b/include/uapi/drm/drm_mode.h
>>>> @@ -968,6 +968,19 @@ enum drm_colorop_type {
>>>>    	 *         color = lut3d[index]
>>>>    	 */
>>>>    	DRM_COLOROP_3D_LUT,
>>>> +
>>>> +	/**
>>>> +	 * @DRM_COLOROP_CSC_FF:
>>>> +	 *
>>>> +	 * enum string "CSC Fixed-Function"
>>>> +	 *
>>>> +	 * A fixed-function Color Space Conversion block where the coefficients
>>>> +	 * are not programmable but selected from predefined hardware modes via
>>>> +	 * the CSC_FF_TYPE enum property. The driver advertises the supported
>>>> +	 * CSC modes through this property.
>>>
>>> This would be a lot more obvious if it was called a "fixed matrix"
>>> operation or such. The current wording never mentions "matrix".
>>>    
>>
>> Ack.
>>
>> I also wanted throw this question out there. Since we have introduced
>> YUV to RGB conversion colorop which essentially replaces the color
>> encoding property, would this also be the right time to bring in
>> something to replace the color range property.
> 
> Yes.
> 
>> I recall Harry mentioning in the cover letter of the original series
>> that he was working on something along those lines.
> 
> Reading Harry's latest blog post it sounds he has done similar work as
> you.
> 
> Harry's blog link seems dead, but the post is available at
> https://planet.freedesktop.org/
> titled "Harry Wentland: Plane Color Pipeline, CSC, 3D LUT, and KWin"
> with links to patches.
> 

I will have a look at it, thank you.

==
Chaitanya

> 
> Thanks,
> pq
> 
>>
>> ==
>> Chaitanya
>>
>>>> +	 */
>>>> +	DRM_COLOROP_CSC_FF,
>>>> +
>>>>    };
>>>>    
>>>>    /**
>>>
>>> Thanks,
>>> pq
>>
> 

Re: [PATCH 01/10] drm/colorop: Add DRM_COLOROP_CSC_FF

[Pekka Paalanen]

[-- Attachment #1: Type: text/plain, Size: 5475 bytes --]

On Mon, 16 Mar 2026 16:04:32 +0530
"Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com> wrote:

> On 3/16/2026 2:27 PM, Pekka Paalanen wrote:
> > On Mon, 16 Mar 2026 12:46:39 +0530
> > "Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com> wrote:
> >   
> >> Hi Pekka,
> >>
> >> Thank you for looking into the patch.  
> > 
> > Hi Chaitanya!
> > 
> > Replies inline below.
> >   
> >>
> >> On 3/10/2026 8:02 PM, Pekka Paalanen wrote:  
> >>> On Fri,  6 Mar 2026 22:22:58 +0530
> >>> Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> wrote:
> >>>      
> >>>> Introduce DRM_COLOROP_CSC_FF, a new colorop type representing a
> >>>> fixed-function Color Space Conversion (CSC) block.
> >>>>
> >>>> Unlike CTM-based colorops, this block does not expose programmable
> >>>> coefficients. Instead, userspace selects one of the predefined
> >>>> hardware modes via a new CSC_FF_TYPE enum property. Supported modes
> >>>> include common YUV->RGB and RGB709->RGB2020 conversions.
> >>>>
> >>>> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>

...

> >>>> diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
> >>>> index f421c623b3f0..49422c625f4d 100644
> >>>> --- a/drivers/gpu/drm/drm_colorop.c
> >>>> +++ b/drivers/gpu/drm/drm_colorop.c
> >>>> @@ -68,6 +68,7 @@ static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = {
> >>>>    	{ DRM_COLOROP_CTM_3X4, "3x4 Matrix"},
> >>>>    	{ DRM_COLOROP_MULTIPLIER, "Multiplier"},
> >>>>    	{ DRM_COLOROP_3D_LUT, "3D LUT"},
> >>>> +	{ DRM_COLOROP_CSC_FF, "CSC Fixed-Function"},  
> >>>
> >>> Hi,
> >>>
> >>> the fundamental idea seems fine to me, but I have a lot to say about the
> >>> nomenclature.
> >>>
> >>> What would you think of a more readable name DRM_COLOROP_FIXED_MATRIX
> >>> "Fixed Matrix"?
> >>>
> >>> Alternatively DRM_COLOROP_ENUM_MATRIX "Enumerated Matrix".
> >>>      
> >>
> >> I was intentionally staying away from the word matrix because there was
> >> no programmable matrix but it would make sense to name it something like
> >> DRM_COLOROP_FIXED_MATRIX (or *_PRESET_MATRIX for that matter).
> >>  
> >>>>    };
> >>>>    
> >>>>    static const char * const colorop_curve_1d_type_names[] = {
> >>>> @@ -90,6 +91,13 @@ static const struct drm_prop_enum_list drm_colorop_lut3d_interpolation_list[] =
> >>>>    	{ DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL, "Tetrahedral" },
> >>>>    };
> >>>>    
> >>>> +static const char * const colorop_csc_ff_type_names[] = {
> >>>> +	[DRM_COLOROP_CSC_FF_YUV601_RGB601]   = "YUV601 to RGB601",
> >>>> +	[DRM_COLOROP_CSC_FF_YUV709_RGB709]   = "YUV709 to RGB709",
> >>>> +	[DRM_COLOROP_CSC_FF_YUV2020_RGB2020] = "YUV2020 to RGB2020",
> >>>> +	[DRM_COLOROP_CSC_FF_RGB709_RGB2020]  = "RGB709 to RGB2020",  
> >>>
> >>> I'd suggest names:
> >>>
> >>> "YCbCr 601 to RGB"
> >>> "YCbCr 709 to RGB"
> >>> "YCbCr 2020 NC to RGB"
> >>> "RGB709 to RGB2020"
> >>>
> >>> or something in that direction.
> >>>
> >>> The relevant ITU-R BT specifications use YCbCr nomenclature IIRC. Wrt.
> >>> YCbCr-to-RGB conversion, there is no RGB601, RGB709 or RGB2020. There
> >>> is only some RGB, and which primaries it uses is not always tied to
> >>> which YCbCr conversion was used.
> >>>     
> >>
> >> What I understand from this is that the BT.709(et al.) only defines the
> >> matrix that is used for YCbCr->RGB, "what" RGB it is defined by the
> >> primaries (which comes with metadata?).  
> > 
> > Unfortunately, BT.601, BT.709 and BT.2020 define two separate things each:
> > - the YCbCr<->RGB conversion, and
> > - the colorspace primaries (and white point, but that is the same for
> >    them all).
> > 
> > BT.601 actually has two different sets of primaries. Bt.2020 defines
> > two different YCbCr conversions. BT.709 uses the same primaries as
> > sRGB, but is different from sRGB on all other aspects.
> > 
> > Therefore, when you refer to any one of these, you also need to be
> > clear whether you are referring to the YCbCr conversion or to the
> > primaries.
> >   
> 
> In that case, if the HW block says that it does YCbCr to RGB conversion 
> using rec BT.709, the resultant RGB follows the primaries as described 
> by BT.709 or mathematically it does not really matter?

Hi,

the resultant RGB may or may not follow BT.709 primaries, and knowing
the primaries is important for further processing in general.

YCbCr<->RGB conversion does not change the primaries. What went in,
will come out.

> >> I will read up on why our HW names these bits as such.  
> > 
> > Sure, but keep in mind that your hardware naming is irrelevant for the
> > UAPI design.  
> 
> Understood, I just want to make sure that the HW does exactly what we 
> will advertise through the UAPI.

Precisely.


Thanks,
pq

> >>> For YCbCr 2020 I feel it's nice to remember, that there are two
> >>> different conversions in the specification: the simple matrix one
> >>> called "non-constant luminance", and the complex one called "constant
> >>> luminance". Hence "NC".
> >>>
> >>> It's also good to recall that YCbCr-RGB conversions are done in an
> >>> electrical space, while RGB709-to-RGB2020 conversion must be done in the
> >>> optical space. It is up to the userspace to arrange the neighbouring
> >>> colorops to use the fixed matrix right.
> >>>      
> >>
> >> Ack on the above.

[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

Re: [PATCH 01/10] drm/colorop: Add DRM_COLOROP_CSC_FF

[Harry Wentland]

On 2026-03-16 07:53, Pekka Paalanen wrote:
> On Mon, 16 Mar 2026 16:04:32 +0530
> "Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com> wrote:
> 
>> On 3/16/2026 2:27 PM, Pekka Paalanen wrote:
>>> On Mon, 16 Mar 2026 12:46:39 +0530
>>> "Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com> wrote:
>>>   
>>>> Hi Pekka,
>>>>
>>>> Thank you for looking into the patch.  
>>>
>>> Hi Chaitanya!
>>>
>>> Replies inline below.
>>>   
>>>>
>>>> On 3/10/2026 8:02 PM, Pekka Paalanen wrote:  
>>>>> On Fri,  6 Mar 2026 22:22:58 +0530
>>>>> Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> wrote:
>>>>>      
>>>>>> Introduce DRM_COLOROP_CSC_FF, a new colorop type representing a
>>>>>> fixed-function Color Space Conversion (CSC) block.
>>>>>>
>>>>>> Unlike CTM-based colorops, this block does not expose programmable
>>>>>> coefficients. Instead, userspace selects one of the predefined
>>>>>> hardware modes via a new CSC_FF_TYPE enum property. Supported modes
>>>>>> include common YUV->RGB and RGB709->RGB2020 conversions.
>>>>>>
>>>>>> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> 
> ...
> 
>>>>>> diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
>>>>>> index f421c623b3f0..49422c625f4d 100644
>>>>>> --- a/drivers/gpu/drm/drm_colorop.c
>>>>>> +++ b/drivers/gpu/drm/drm_colorop.c
>>>>>> @@ -68,6 +68,7 @@ static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = {
>>>>>>    	{ DRM_COLOROP_CTM_3X4, "3x4 Matrix"},
>>>>>>    	{ DRM_COLOROP_MULTIPLIER, "Multiplier"},
>>>>>>    	{ DRM_COLOROP_3D_LUT, "3D LUT"},
>>>>>> +	{ DRM_COLOROP_CSC_FF, "CSC Fixed-Function"},  
>>>>>
>>>>> Hi,
>>>>>
>>>>> the fundamental idea seems fine to me, but I have a lot to say about the
>>>>> nomenclature.
>>>>>
>>>>> What would you think of a more readable name DRM_COLOROP_FIXED_MATRIX
>>>>> "Fixed Matrix"?
>>>>>
>>>>> Alternatively DRM_COLOROP_ENUM_MATRIX "Enumerated Matrix".
>>>>>      
>>>>
>>>> I was intentionally staying away from the word matrix because there was
>>>> no programmable matrix but it would make sense to name it something like
>>>> DRM_COLOROP_FIXED_MATRIX (or *_PRESET_MATRIX for that matter).
>>>>  
>>>>>>    };
>>>>>>    
>>>>>>    static const char * const colorop_curve_1d_type_names[] = {
>>>>>> @@ -90,6 +91,13 @@ static const struct drm_prop_enum_list drm_colorop_lut3d_interpolation_list[] =
>>>>>>    	{ DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL, "Tetrahedral" },
>>>>>>    };
>>>>>>    
>>>>>> +static const char * const colorop_csc_ff_type_names[] = {
>>>>>> +	[DRM_COLOROP_CSC_FF_YUV601_RGB601]   = "YUV601 to RGB601",
>>>>>> +	[DRM_COLOROP_CSC_FF_YUV709_RGB709]   = "YUV709 to RGB709",
>>>>>> +	[DRM_COLOROP_CSC_FF_YUV2020_RGB2020] = "YUV2020 to RGB2020",
>>>>>> +	[DRM_COLOROP_CSC_FF_RGB709_RGB2020]  = "RGB709 to RGB2020",  
>>>>>
>>>>> I'd suggest names:
>>>>>
>>>>> "YCbCr 601 to RGB"
>>>>> "YCbCr 709 to RGB"
>>>>> "YCbCr 2020 NC to RGB"
>>>>> "RGB709 to RGB2020"
>>>>>
>>>>> or something in that direction.
>>>>>
>>>>> The relevant ITU-R BT specifications use YCbCr nomenclature IIRC. Wrt.
>>>>> YCbCr-to-RGB conversion, there is no RGB601, RGB709 or RGB2020. There
>>>>> is only some RGB, and which primaries it uses is not always tied to
>>>>> which YCbCr conversion was used.
>>>>>     
>>>>
>>>> What I understand from this is that the BT.709(et al.) only defines the
>>>> matrix that is used for YCbCr->RGB, "what" RGB it is defined by the
>>>> primaries (which comes with metadata?).  
>>>
>>> Unfortunately, BT.601, BT.709 and BT.2020 define two separate things each:
>>> - the YCbCr<->RGB conversion, and
>>> - the colorspace primaries (and white point, but that is the same for
>>>    them all).
>>>

Would it make sense to treat these as two separate things in terms
of colorops?

I have done some work on a CSC colorop and intend to send out the
patches in the next couple of days.

https://gitlab.freedesktop.org/hwentland/linux/-/commits/csc-colorop

It follows the drm_plane's COLOR_RANGE and COLOR_ENCODING semantic
and is only intended for YCbCr-to-RGB conversion, like the original
properties on the plane.

For the colorspace conversion within RGB (e.g., BT709 to BT2020)
it might make sense then to have its own colorop if HW works on
pre-defined transformations, or use the CTM 3x3 or 3x4 matrix ops
if HW provides a flexible matrix.

We might need to think about naming, since colorspace conversion (CSC)
right now seems to refer to both YCbCr conversion and primaries
conversion.

Harry

>>> BT.601 actually has two different sets of primaries. Bt.2020 defines
>>> two different YCbCr conversions. BT.709 uses the same primaries as
>>> sRGB, but is different from sRGB on all other aspects.
>>>
>>> Therefore, when you refer to any one of these, you also need to be
>>> clear whether you are referring to the YCbCr conversion or to the
>>> primaries.
>>>   
>>
>> In that case, if the HW block says that it does YCbCr to RGB conversion 
>> using rec BT.709, the resultant RGB follows the primaries as described 
>> by BT.709 or mathematically it does not really matter?
> 
> Hi,
> 
> the resultant RGB may or may not follow BT.709 primaries, and knowing
> the primaries is important for further processing in general.
> 
> YCbCr<->RGB conversion does not change the primaries. What went in,
> will come out.
> 
>>>> I will read up on why our HW names these bits as such.  
>>>
>>> Sure, but keep in mind that your hardware naming is irrelevant for the
>>> UAPI design.  
>>
>> Understood, I just want to make sure that the HW does exactly what we 
>> will advertise through the UAPI.
> 
> Precisely.
> 
> 
> Thanks,
> pq
> 
>>>>> For YCbCr 2020 I feel it's nice to remember, that there are two
>>>>> different conversions in the specification: the simple matrix one
>>>>> called "non-constant luminance", and the complex one called "constant
>>>>> luminance". Hence "NC".
>>>>>
>>>>> It's also good to recall that YCbCr-RGB conversions are done in an
>>>>> electrical space, while RGB709-to-RGB2020 conversion must be done in the
>>>>> optical space. It is up to the userspace to arrange the neighbouring
>>>>> colorops to use the fixed matrix right.
>>>>>      
>>>>
>>>> Ack on the above.

Re: [PATCH 01/10] drm/colorop: Add DRM_COLOROP_CSC_FF

[Pekka Paalanen]

[-- Attachment #1: Type: text/plain, Size: 8223 bytes --]

On Mon, 16 Mar 2026 10:36:44 -0400
Harry Wentland <harry.wentland@amd.com> wrote:

> On 2026-03-16 07:53, Pekka Paalanen wrote:
> > On Mon, 16 Mar 2026 16:04:32 +0530
> > "Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com> wrote:
> >   
> >> On 3/16/2026 2:27 PM, Pekka Paalanen wrote:  
> >>> On Mon, 16 Mar 2026 12:46:39 +0530
> >>> "Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com> wrote:
> >>>     
> >>>> Hi Pekka,
> >>>>
> >>>> Thank you for looking into the patch.    
> >>>
> >>> Hi Chaitanya!
> >>>
> >>> Replies inline below.
> >>>     
> >>>>
> >>>> On 3/10/2026 8:02 PM, Pekka Paalanen wrote:    
> >>>>> On Fri,  6 Mar 2026 22:22:58 +0530
> >>>>> Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> wrote:
> >>>>>        
> >>>>>> Introduce DRM_COLOROP_CSC_FF, a new colorop type representing a
> >>>>>> fixed-function Color Space Conversion (CSC) block.
> >>>>>>
> >>>>>> Unlike CTM-based colorops, this block does not expose programmable
> >>>>>> coefficients. Instead, userspace selects one of the predefined
> >>>>>> hardware modes via a new CSC_FF_TYPE enum property. Supported modes
> >>>>>> include common YUV->RGB and RGB709->RGB2020 conversions.
> >>>>>>
> >>>>>> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>  
> > 
> > ...
> >   
> >>>>>> diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
> >>>>>> index f421c623b3f0..49422c625f4d 100644
> >>>>>> --- a/drivers/gpu/drm/drm_colorop.c
> >>>>>> +++ b/drivers/gpu/drm/drm_colorop.c
> >>>>>> @@ -68,6 +68,7 @@ static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = {
> >>>>>>    	{ DRM_COLOROP_CTM_3X4, "3x4 Matrix"},
> >>>>>>    	{ DRM_COLOROP_MULTIPLIER, "Multiplier"},
> >>>>>>    	{ DRM_COLOROP_3D_LUT, "3D LUT"},
> >>>>>> +	{ DRM_COLOROP_CSC_FF, "CSC Fixed-Function"},    
> >>>>>
> >>>>> Hi,
> >>>>>
> >>>>> the fundamental idea seems fine to me, but I have a lot to say about the
> >>>>> nomenclature.
> >>>>>
> >>>>> What would you think of a more readable name DRM_COLOROP_FIXED_MATRIX
> >>>>> "Fixed Matrix"?
> >>>>>
> >>>>> Alternatively DRM_COLOROP_ENUM_MATRIX "Enumerated Matrix".
> >>>>>        
> >>>>
> >>>> I was intentionally staying away from the word matrix because there was
> >>>> no programmable matrix but it would make sense to name it something like
> >>>> DRM_COLOROP_FIXED_MATRIX (or *_PRESET_MATRIX for that matter).
> >>>>    
> >>>>>>    };
> >>>>>>    
> >>>>>>    static const char * const colorop_curve_1d_type_names[] = {
> >>>>>> @@ -90,6 +91,13 @@ static const struct drm_prop_enum_list drm_colorop_lut3d_interpolation_list[] =
> >>>>>>    	{ DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL, "Tetrahedral" },
> >>>>>>    };
> >>>>>>    
> >>>>>> +static const char * const colorop_csc_ff_type_names[] = {
> >>>>>> +	[DRM_COLOROP_CSC_FF_YUV601_RGB601]   = "YUV601 to RGB601",
> >>>>>> +	[DRM_COLOROP_CSC_FF_YUV709_RGB709]   = "YUV709 to RGB709",
> >>>>>> +	[DRM_COLOROP_CSC_FF_YUV2020_RGB2020] = "YUV2020 to RGB2020",
> >>>>>> +	[DRM_COLOROP_CSC_FF_RGB709_RGB2020]  = "RGB709 to RGB2020",    
> >>>>>
> >>>>> I'd suggest names:
> >>>>>
> >>>>> "YCbCr 601 to RGB"
> >>>>> "YCbCr 709 to RGB"
> >>>>> "YCbCr 2020 NC to RGB"
> >>>>> "RGB709 to RGB2020"
> >>>>>
> >>>>> or something in that direction.
> >>>>>
> >>>>> The relevant ITU-R BT specifications use YCbCr nomenclature IIRC. Wrt.
> >>>>> YCbCr-to-RGB conversion, there is no RGB601, RGB709 or RGB2020. There
> >>>>> is only some RGB, and which primaries it uses is not always tied to
> >>>>> which YCbCr conversion was used.
> >>>>>       
> >>>>
> >>>> What I understand from this is that the BT.709(et al.) only defines the
> >>>> matrix that is used for YCbCr->RGB, "what" RGB it is defined by the
> >>>> primaries (which comes with metadata?).    
> >>>
> >>> Unfortunately, BT.601, BT.709 and BT.2020 define two separate things each:
> >>> - the YCbCr<->RGB conversion, and
> >>> - the colorspace primaries (and white point, but that is the same for
> >>>    them all).
> >>>  
> 
> Would it make sense to treat these as two separate things in terms
> of colorops?

Hi Harry,

no, if your hardware not care. There are no semantics for the numbers
in the UAPI, it's just whatever numbers, and mathematical operations on
them.

I suspect that your hardware does care, though, and actually has
separate hardware elements for the YCbCr conversion and the colorspace
conversion matrix. After all, one has to be able to put a LUT or a
curve between the two to make sense.

IOW, two different colorops, yes. But different colorop types? Maybe
that depends on whether they would have the same colorop properties or
not.

> I have done some work on a CSC colorop and intend to send out the
> patches in the next couple of days.
> 
> https://gitlab.freedesktop.org/hwentland/linux/-/commits/csc-colorop
> 
> It follows the drm_plane's COLOR_RANGE and COLOR_ENCODING semantic
> and is only intended for YCbCr-to-RGB conversion, like the original
> properties on the plane.
> 
> For the colorspace conversion within RGB (e.g., BT709 to BT2020)
> it might make sense then to have its own colorop if HW works on
> pre-defined transformations, or use the CTM 3x3 or 3x4 matrix ops
> if HW provides a flexible matrix.
> 
> We might need to think about naming, since colorspace conversion (CSC)
> right now seems to refer to both YCbCr conversion and primaries
> conversion.

Indeed.

YCbCr conversion is usually a matrix operation. H.273 calls it
MatrixCoefficients, but it also lists cases where you need the EOTF in
the mix. I could go with "YCbCr coefficients". The pure matrix forms
are used on electrical pixel values.

The color space conversion matrices that are based on (Normalized)
Primary Matrices (NPM) must be used on optical pixel values. NPM is the
matrix that converts optical RGB values to CIE 1931 XYZ. For an
RGB-to-RGB conversion you need one NPM and another inverse NPM chained.

I guess using CSC for the latter is not obvious enough because it has
been used for the former (color model conversion) as well?

How about "color-primary conversion"?

I stole it from
https://onlinelibrary.wiley.com/doi/pdf/10.1002/9780470994375.app8


Thanks,
pq

> >>> BT.601 actually has two different sets of primaries. Bt.2020 defines
> >>> two different YCbCr conversions. BT.709 uses the same primaries as
> >>> sRGB, but is different from sRGB on all other aspects.
> >>>
> >>> Therefore, when you refer to any one of these, you also need to be
> >>> clear whether you are referring to the YCbCr conversion or to the
> >>> primaries.
> >>>     
> >>
> >> In that case, if the HW block says that it does YCbCr to RGB conversion 
> >> using rec BT.709, the resultant RGB follows the primaries as described 
> >> by BT.709 or mathematically it does not really matter?  
> > 
> > Hi,
> > 
> > the resultant RGB may or may not follow BT.709 primaries, and knowing
> > the primaries is important for further processing in general.
> > 
> > YCbCr<->RGB conversion does not change the primaries. What went in,
> > will come out.
> >   
> >>>> I will read up on why our HW names these bits as such.    
> >>>
> >>> Sure, but keep in mind that your hardware naming is irrelevant for the
> >>> UAPI design.    
> >>
> >> Understood, I just want to make sure that the HW does exactly what we 
> >> will advertise through the UAPI.  
> > 
> > Precisely.
> > 
> > 
> > Thanks,
> > pq
> >   
> >>>>> For YCbCr 2020 I feel it's nice to remember, that there are two
> >>>>> different conversions in the specification: the simple matrix one
> >>>>> called "non-constant luminance", and the complex one called "constant
> >>>>> luminance". Hence "NC".
> >>>>>
> >>>>> It's also good to recall that YCbCr-RGB conversions are done in an
> >>>>> electrical space, while RGB709-to-RGB2020 conversion must be done in the
> >>>>> optical space. It is up to the userspace to arrange the neighbouring
> >>>>> colorops to use the fixed matrix right.
> >>>>>        
> >>>>
> >>>> Ack on the above.  
> 


[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

Re: [PATCH 01/10] drm/colorop: Add DRM_COLOROP_CSC_FF

[Harry Wentland]

On 2026-03-16 12:03, Pekka Paalanen wrote:
> On Mon, 16 Mar 2026 10:36:44 -0400
> Harry Wentland <harry.wentland@amd.com> wrote:
> 
>> On 2026-03-16 07:53, Pekka Paalanen wrote:
>>> On Mon, 16 Mar 2026 16:04:32 +0530
>>> "Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com> wrote:
>>>   
>>>> On 3/16/2026 2:27 PM, Pekka Paalanen wrote:  
>>>>> On Mon, 16 Mar 2026 12:46:39 +0530
>>>>> "Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com> wrote:
>>>>>     
>>>>>> Hi Pekka,
>>>>>>
>>>>>> Thank you for looking into the patch.    
>>>>>
>>>>> Hi Chaitanya!
>>>>>
>>>>> Replies inline below.
>>>>>     
>>>>>>
>>>>>> On 3/10/2026 8:02 PM, Pekka Paalanen wrote:    
>>>>>>> On Fri,  6 Mar 2026 22:22:58 +0530
>>>>>>> Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> wrote:
>>>>>>>        
>>>>>>>> Introduce DRM_COLOROP_CSC_FF, a new colorop type representing a
>>>>>>>> fixed-function Color Space Conversion (CSC) block.
>>>>>>>>
>>>>>>>> Unlike CTM-based colorops, this block does not expose programmable
>>>>>>>> coefficients. Instead, userspace selects one of the predefined
>>>>>>>> hardware modes via a new CSC_FF_TYPE enum property. Supported modes
>>>>>>>> include common YUV->RGB and RGB709->RGB2020 conversions.
>>>>>>>>
>>>>>>>> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>  
>>>
>>> ...
>>>   
>>>>>>>> diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
>>>>>>>> index f421c623b3f0..49422c625f4d 100644
>>>>>>>> --- a/drivers/gpu/drm/drm_colorop.c
>>>>>>>> +++ b/drivers/gpu/drm/drm_colorop.c
>>>>>>>> @@ -68,6 +68,7 @@ static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = {
>>>>>>>>    	{ DRM_COLOROP_CTM_3X4, "3x4 Matrix"},
>>>>>>>>    	{ DRM_COLOROP_MULTIPLIER, "Multiplier"},
>>>>>>>>    	{ DRM_COLOROP_3D_LUT, "3D LUT"},
>>>>>>>> +	{ DRM_COLOROP_CSC_FF, "CSC Fixed-Function"},    
>>>>>>>
>>>>>>> Hi,
>>>>>>>
>>>>>>> the fundamental idea seems fine to me, but I have a lot to say about the
>>>>>>> nomenclature.
>>>>>>>
>>>>>>> What would you think of a more readable name DRM_COLOROP_FIXED_MATRIX
>>>>>>> "Fixed Matrix"?
>>>>>>>
>>>>>>> Alternatively DRM_COLOROP_ENUM_MATRIX "Enumerated Matrix".
>>>>>>>        
>>>>>>
>>>>>> I was intentionally staying away from the word matrix because there was
>>>>>> no programmable matrix but it would make sense to name it something like
>>>>>> DRM_COLOROP_FIXED_MATRIX (or *_PRESET_MATRIX for that matter).
>>>>>>    
>>>>>>>>    };
>>>>>>>>    
>>>>>>>>    static const char * const colorop_curve_1d_type_names[] = {
>>>>>>>> @@ -90,6 +91,13 @@ static const struct drm_prop_enum_list drm_colorop_lut3d_interpolation_list[] =
>>>>>>>>    	{ DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL, "Tetrahedral" },
>>>>>>>>    };
>>>>>>>>    
>>>>>>>> +static const char * const colorop_csc_ff_type_names[] = {
>>>>>>>> +	[DRM_COLOROP_CSC_FF_YUV601_RGB601]   = "YUV601 to RGB601",
>>>>>>>> +	[DRM_COLOROP_CSC_FF_YUV709_RGB709]   = "YUV709 to RGB709",
>>>>>>>> +	[DRM_COLOROP_CSC_FF_YUV2020_RGB2020] = "YUV2020 to RGB2020",
>>>>>>>> +	[DRM_COLOROP_CSC_FF_RGB709_RGB2020]  = "RGB709 to RGB2020",    
>>>>>>>
>>>>>>> I'd suggest names:
>>>>>>>
>>>>>>> "YCbCr 601 to RGB"
>>>>>>> "YCbCr 709 to RGB"
>>>>>>> "YCbCr 2020 NC to RGB"
>>>>>>> "RGB709 to RGB2020"
>>>>>>>
>>>>>>> or something in that direction.
>>>>>>>
>>>>>>> The relevant ITU-R BT specifications use YCbCr nomenclature IIRC. Wrt.
>>>>>>> YCbCr-to-RGB conversion, there is no RGB601, RGB709 or RGB2020. There
>>>>>>> is only some RGB, and which primaries it uses is not always tied to
>>>>>>> which YCbCr conversion was used.
>>>>>>>       
>>>>>>
>>>>>> What I understand from this is that the BT.709(et al.) only defines the
>>>>>> matrix that is used for YCbCr->RGB, "what" RGB it is defined by the
>>>>>> primaries (which comes with metadata?).    
>>>>>
>>>>> Unfortunately, BT.601, BT.709 and BT.2020 define two separate things each:
>>>>> - the YCbCr<->RGB conversion, and
>>>>> - the colorspace primaries (and white point, but that is the same for
>>>>>    them all).
>>>>>  
>>
>> Would it make sense to treat these as two separate things in terms
>> of colorops?
> 
> Hi Harry,
> 
> no, if your hardware not care. There are no semantics for the numbers
> in the UAPI, it's just whatever numbers, and mathematical operations on
> them.
> 
> I suspect that your hardware does care, though, and actually has
> separate hardware elements for the YCbCr conversion and the colorspace
> conversion matrix. After all, one has to be able to put a LUT or a
> curve between the two to make sense.
> 
> IOW, two different colorops, yes. But different colorop types? Maybe
> that depends on whether they would have the same colorop properties or
> not.
> 

If I understand you correctly you're saying we can have a single
colorop type to represent either type. A client of the API needs
to understand what it's doing with the colorop and can use it
as either a YCbCr conversion matrix in the case of YCbCr-to-RGB
conversion, or an NPM for conversion of linear, normalized data
from one set of primaries to another.

Is that understanding correct?

>> I have done some work on a CSC colorop and intend to send out the
>> patches in the next couple of days.
>>
>> https://gitlab.freedesktop.org/hwentland/linux/-/commits/csc-colorop
>>
>> It follows the drm_plane's COLOR_RANGE and COLOR_ENCODING semantic
>> and is only intended for YCbCr-to-RGB conversion, like the original
>> properties on the plane.
>>
>> For the colorspace conversion within RGB (e.g., BT709 to BT2020)
>> it might make sense then to have its own colorop if HW works on
>> pre-defined transformations, or use the CTM 3x3 or 3x4 matrix ops
>> if HW provides a flexible matrix.
>>
>> We might need to think about naming, since colorspace conversion (CSC)
>> right now seems to refer to both YCbCr conversion and primaries
>> conversion.
> 
> Indeed.
> 
> YCbCr conversion is usually a matrix operation. H.273 calls it
> MatrixCoefficients, but it also lists cases where you need the EOTF in
> the mix. I could go with "YCbCr coefficients". The pure matrix forms
> are used on electrical pixel values.
> 
> The color space conversion matrices that are based on (Normalized)
> Primary Matrices (NPM) must be used on optical pixel values. NPM is the
> matrix that converts optical RGB values to CIE 1931 XYZ. For an
> RGB-to-RGB conversion you need one NPM and another inverse NPM chained.
> 

This could be expressed in a single matrix, right?

I intend to send out my patches as an RFC either way, but I think I
could just as well work with the CSC_FF colorop. I'll have a look at
basing my work on this.

Harry

> I guess using CSC for the latter is not obvious enough because it has
> been used for the former (color model conversion) as well?
> 
> How about "color-primary conversion"?
> 
> I stole it from
> https://onlinelibrary.wiley.com/doi/pdf/10.1002/9780470994375.app8
> 
> 
> Thanks,
> pq
> 
>>>>> BT.601 actually has two different sets of primaries. Bt.2020 defines
>>>>> two different YCbCr conversions. BT.709 uses the same primaries as
>>>>> sRGB, but is different from sRGB on all other aspects.
>>>>>
>>>>> Therefore, when you refer to any one of these, you also need to be
>>>>> clear whether you are referring to the YCbCr conversion or to the
>>>>> primaries.
>>>>>     
>>>>
>>>> In that case, if the HW block says that it does YCbCr to RGB conversion 
>>>> using rec BT.709, the resultant RGB follows the primaries as described 
>>>> by BT.709 or mathematically it does not really matter?  
>>>
>>> Hi,
>>>
>>> the resultant RGB may or may not follow BT.709 primaries, and knowing
>>> the primaries is important for further processing in general.
>>>
>>> YCbCr<->RGB conversion does not change the primaries. What went in,
>>> will come out.
>>>   
>>>>>> I will read up on why our HW names these bits as such.    
>>>>>
>>>>> Sure, but keep in mind that your hardware naming is irrelevant for the
>>>>> UAPI design.    
>>>>
>>>> Understood, I just want to make sure that the HW does exactly what we 
>>>> will advertise through the UAPI.  
>>>
>>> Precisely.
>>>
>>>
>>> Thanks,
>>> pq
>>>   
>>>>>>> For YCbCr 2020 I feel it's nice to remember, that there are two
>>>>>>> different conversions in the specification: the simple matrix one
>>>>>>> called "non-constant luminance", and the complex one called "constant
>>>>>>> luminance". Hence "NC".
>>>>>>>
>>>>>>> It's also good to recall that YCbCr-RGB conversions are done in an
>>>>>>> electrical space, while RGB709-to-RGB2020 conversion must be done in the
>>>>>>> optical space. It is up to the userspace to arrange the neighbouring
>>>>>>> colorops to use the fixed matrix right.
>>>>>>>        
>>>>>>
>>>>>> Ack on the above.  
>>
> 

Re: [PATCH 01/10] drm/colorop: Add DRM_COLOROP_CSC_FF

[Pekka Paalanen]

[-- Attachment #1: Type: text/plain, Size: 4089 bytes --]

On Mon, 16 Mar 2026 13:59:57 -0400
Harry Wentland <harry.wentland@amd.com> wrote:

> On 2026-03-16 12:03, Pekka Paalanen wrote:
> > On Mon, 16 Mar 2026 10:36:44 -0400
> > Harry Wentland <harry.wentland@amd.com> wrote:
> >   
> >> On 2026-03-16 07:53, Pekka Paalanen wrote:  
> >>> On Mon, 16 Mar 2026 16:04:32 +0530
> >>> "Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com> wrote:
> >>>     
> >>>> On 3/16/2026 2:27 PM, Pekka Paalanen wrote:    

...

> >>>>> Unfortunately, BT.601, BT.709 and BT.2020 define two separate things each:
> >>>>> - the YCbCr<->RGB conversion, and
> >>>>> - the colorspace primaries (and white point, but that is the same for
> >>>>>    them all).
> >>>>>    
> >>
> >> Would it make sense to treat these as two separate things in terms
> >> of colorops?  
> > 
> > Hi Harry,
> > 
> > no, if your hardware not care. There are no semantics for the numbers
> > in the UAPI, it's just whatever numbers, and mathematical operations on
> > them.
> > 
> > I suspect that your hardware does care, though, and actually has
> > separate hardware elements for the YCbCr conversion and the colorspace
> > conversion matrix. After all, one has to be able to put a LUT or a
> > curve between the two to make sense.
> > 
> > IOW, two different colorops, yes. But different colorop types? Maybe
> > that depends on whether they would have the same colorop properties or
> > not.
> >   
> 
> If I understand you correctly you're saying we can have a single
> colorop type to represent either type. A client of the API needs
> to understand what it's doing with the colorop and can use it
> as either a YCbCr conversion matrix in the case of YCbCr-to-RGB
> conversion, or an NPM for conversion of linear, normalized data
> from one set of primaries to another.
> 
> Is that understanding correct?

Yes. It's mostly a question of taste, whether we want matrices
conventionally used in different contexts in the same enum. I think
it's fine.

> >> I have done some work on a CSC colorop and intend to send out the
> >> patches in the next couple of days.
> >>
> >> https://gitlab.freedesktop.org/hwentland/linux/-/commits/csc-colorop
> >>
> >> It follows the drm_plane's COLOR_RANGE and COLOR_ENCODING semantic
> >> and is only intended for YCbCr-to-RGB conversion, like the original
> >> properties on the plane.
> >>
> >> For the colorspace conversion within RGB (e.g., BT709 to BT2020)
> >> it might make sense then to have its own colorop if HW works on
> >> pre-defined transformations, or use the CTM 3x3 or 3x4 matrix ops
> >> if HW provides a flexible matrix.
> >>
> >> We might need to think about naming, since colorspace conversion (CSC)
> >> right now seems to refer to both YCbCr conversion and primaries
> >> conversion.  
> > 
> > Indeed.
> > 
> > YCbCr conversion is usually a matrix operation. H.273 calls it
> > MatrixCoefficients, but it also lists cases where you need the EOTF in
> > the mix. I could go with "YCbCr coefficients". The pure matrix forms
> > are used on electrical pixel values.
> > 
> > The color space conversion matrices that are based on (Normalized)
> > Primary Matrices (NPM) must be used on optical pixel values. NPM is the
> > matrix that converts optical RGB values to CIE 1931 XYZ. For an
> > RGB-to-RGB conversion you need one NPM and another inverse NPM chained.
> >   
> 
> This could be expressed in a single matrix, right?

Naturally. y = N * (M * x) = (N * M) * x, where N, M are matrices and
x, y are column vectors.

> I intend to send out my patches as an RFC either way, but I think I
> could just as well work with the CSC_FF colorop. I'll have a look at
> basing my work on this.


Thanks,
pq


> > I guess using CSC for the latter is not obvious enough because it has
> > been used for the former (color model conversion) as well?
> > 
> > How about "color-primary conversion"?
> > 
> > I stole it from
> > https://onlinelibrary.wiley.com/doi/pdf/10.1002/9780470994375.app8
> > 
> > 
> > Thanks,
> > pq

[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

Re: [PATCH 01/10] drm/colorop: Add DRM_COLOROP_CSC_FF

[Harry Wentland]

On 2026-03-16 13:59, Harry Wentland wrote:
> 
> 
> On 2026-03-16 12:03, Pekka Paalanen wrote:
>> On Mon, 16 Mar 2026 10:36:44 -0400
>> Harry Wentland <harry.wentland@amd.com> wrote:
>>
>>> On 2026-03-16 07:53, Pekka Paalanen wrote:
>>>> On Mon, 16 Mar 2026 16:04:32 +0530
>>>> "Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com> wrote:
>>>>   
>>>>> On 3/16/2026 2:27 PM, Pekka Paalanen wrote:  
>>>>>> On Mon, 16 Mar 2026 12:46:39 +0530
>>>>>> "Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com> wrote:
>>>>>>     
>>>>>>> Hi Pekka,
>>>>>>>
>>>>>>> Thank you for looking into the patch.    
>>>>>>
>>>>>> Hi Chaitanya!
>>>>>>
>>>>>> Replies inline below.
>>>>>>     
>>>>>>>
>>>>>>> On 3/10/2026 8:02 PM, Pekka Paalanen wrote:    
>>>>>>>> On Fri,  6 Mar 2026 22:22:58 +0530
>>>>>>>> Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> wrote:
>>>>>>>>        
>>>>>>>>> Introduce DRM_COLOROP_CSC_FF, a new colorop type representing a
>>>>>>>>> fixed-function Color Space Conversion (CSC) block.
>>>>>>>>>
>>>>>>>>> Unlike CTM-based colorops, this block does not expose programmable
>>>>>>>>> coefficients. Instead, userspace selects one of the predefined
>>>>>>>>> hardware modes via a new CSC_FF_TYPE enum property. Supported modes
>>>>>>>>> include common YUV->RGB and RGB709->RGB2020 conversions.
>>>>>>>>>
>>>>>>>>> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>  
>>>>
>>>> ...
>>>>   
>>>>>>>>> diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
>>>>>>>>> index f421c623b3f0..49422c625f4d 100644
>>>>>>>>> --- a/drivers/gpu/drm/drm_colorop.c
>>>>>>>>> +++ b/drivers/gpu/drm/drm_colorop.c
>>>>>>>>> @@ -68,6 +68,7 @@ static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = {
>>>>>>>>>    	{ DRM_COLOROP_CTM_3X4, "3x4 Matrix"},
>>>>>>>>>    	{ DRM_COLOROP_MULTIPLIER, "Multiplier"},
>>>>>>>>>    	{ DRM_COLOROP_3D_LUT, "3D LUT"},
>>>>>>>>> +	{ DRM_COLOROP_CSC_FF, "CSC Fixed-Function"},    
>>>>>>>>
>>>>>>>> Hi,
>>>>>>>>
>>>>>>>> the fundamental idea seems fine to me, but I have a lot to say about the
>>>>>>>> nomenclature.
>>>>>>>>
>>>>>>>> What would you think of a more readable name DRM_COLOROP_FIXED_MATRIX
>>>>>>>> "Fixed Matrix"?
>>>>>>>>
>>>>>>>> Alternatively DRM_COLOROP_ENUM_MATRIX "Enumerated Matrix".
>>>>>>>>        
>>>>>>>
>>>>>>> I was intentionally staying away from the word matrix because there was
>>>>>>> no programmable matrix but it would make sense to name it something like
>>>>>>> DRM_COLOROP_FIXED_MATRIX (or *_PRESET_MATRIX for that matter).
>>>>>>>    
>>>>>>>>>    };
>>>>>>>>>    
>>>>>>>>>    static const char * const colorop_curve_1d_type_names[] = {
>>>>>>>>> @@ -90,6 +91,13 @@ static const struct drm_prop_enum_list drm_colorop_lut3d_interpolation_list[] =
>>>>>>>>>    	{ DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL, "Tetrahedral" },
>>>>>>>>>    };
>>>>>>>>>    
>>>>>>>>> +static const char * const colorop_csc_ff_type_names[] = {
>>>>>>>>> +	[DRM_COLOROP_CSC_FF_YUV601_RGB601]   = "YUV601 to RGB601",
>>>>>>>>> +	[DRM_COLOROP_CSC_FF_YUV709_RGB709]   = "YUV709 to RGB709",
>>>>>>>>> +	[DRM_COLOROP_CSC_FF_YUV2020_RGB2020] = "YUV2020 to RGB2020",
>>>>>>>>> +	[DRM_COLOROP_CSC_FF_RGB709_RGB2020]  = "RGB709 to RGB2020",    
>>>>>>>>
>>>>>>>> I'd suggest names:
>>>>>>>>
>>>>>>>> "YCbCr 601 to RGB"
>>>>>>>> "YCbCr 709 to RGB"
>>>>>>>> "YCbCr 2020 NC to RGB"
>>>>>>>> "RGB709 to RGB2020"
>>>>>>>>
>>>>>>>> or something in that direction.
>>>>>>>>
>>>>>>>> The relevant ITU-R BT specifications use YCbCr nomenclature IIRC. Wrt.
>>>>>>>> YCbCr-to-RGB conversion, there is no RGB601, RGB709 or RGB2020. There
>>>>>>>> is only some RGB, and which primaries it uses is not always tied to
>>>>>>>> which YCbCr conversion was used.
>>>>>>>>       
>>>>>>>
>>>>>>> What I understand from this is that the BT.709(et al.) only defines the
>>>>>>> matrix that is used for YCbCr->RGB, "what" RGB it is defined by the
>>>>>>> primaries (which comes with metadata?).    
>>>>>>
>>>>>> Unfortunately, BT.601, BT.709 and BT.2020 define two separate things each:
>>>>>> - the YCbCr<->RGB conversion, and
>>>>>> - the colorspace primaries (and white point, but that is the same for
>>>>>>    them all).
>>>>>>  
>>>
>>> Would it make sense to treat these as two separate things in terms
>>> of colorops?
>>
>> Hi Harry,
>>
>> no, if your hardware not care. There are no semantics for the numbers
>> in the UAPI, it's just whatever numbers, and mathematical operations on
>> them.
>>
>> I suspect that your hardware does care, though, and actually has
>> separate hardware elements for the YCbCr conversion and the colorspace
>> conversion matrix. After all, one has to be able to put a LUT or a
>> curve between the two to make sense.
>>
>> IOW, two different colorops, yes. But different colorop types? Maybe
>> that depends on whether they would have the same colorop properties or
>> not.
>>
> 
> If I understand you correctly you're saying we can have a single
> colorop type to represent either type. A client of the API needs
> to understand what it's doing with the colorop and can use it
> as either a YCbCr conversion matrix in the case of YCbCr-to-RGB
> conversion, or an NPM for conversion of linear, normalized data
> from one set of primaries to another.
> 
> Is that understanding correct?
> 
>>> I have done some work on a CSC colorop and intend to send out the
>>> patches in the next couple of days.
>>>
>>> https://gitlab.freedesktop.org/hwentland/linux/-/commits/csc-colorop
>>>
>>> It follows the drm_plane's COLOR_RANGE and COLOR_ENCODING semantic
>>> and is only intended for YCbCr-to-RGB conversion, like the original
>>> properties on the plane.
>>>
>>> For the colorspace conversion within RGB (e.g., BT709 to BT2020)
>>> it might make sense then to have its own colorop if HW works on
>>> pre-defined transformations, or use the CTM 3x3 or 3x4 matrix ops
>>> if HW provides a flexible matrix.
>>>
>>> We might need to think about naming, since colorspace conversion (CSC)
>>> right now seems to refer to both YCbCr conversion and primaries
>>> conversion.
>>
>> Indeed.
>>
>> YCbCr conversion is usually a matrix operation. H.273 calls it
>> MatrixCoefficients, but it also lists cases where you need the EOTF in
>> the mix. I could go with "YCbCr coefficients". The pure matrix forms
>> are used on electrical pixel values.
>>
>> The color space conversion matrices that are based on (Normalized)
>> Primary Matrices (NPM) must be used on optical pixel values. NPM is the
>> matrix that converts optical RGB values to CIE 1931 XYZ. For an
>> RGB-to-RGB conversion you need one NPM and another inverse NPM chained.
>>
> 
> This could be expressed in a single matrix, right?
> 
> I intend to send out my patches as an RFC either way, but I think I
> could just as well work with the CSC_FF colorop. I'll have a look at
> basing my work on this.
> 

I sent out a new version of my series, reworked to use the CSC_FF
colorop.

https://lore.kernel.org/dri-devel/20260330153451.99472-1-harry.wentland@amd.com/

Harry

> Harry
> 
>> I guess using CSC for the latter is not obvious enough because it has
>> been used for the former (color model conversion) as well?
>>
>> How about "color-primary conversion"?
>>
>> I stole it from
>> https://onlinelibrary.wiley.com/doi/pdf/10.1002/9780470994375.app8
>>
>>
>> Thanks,
>> pq
>>
>>>>>> BT.601 actually has two different sets of primaries. Bt.2020 defines
>>>>>> two different YCbCr conversions. BT.709 uses the same primaries as
>>>>>> sRGB, but is different from sRGB on all other aspects.
>>>>>>
>>>>>> Therefore, when you refer to any one of these, you also need to be
>>>>>> clear whether you are referring to the YCbCr conversion or to the
>>>>>> primaries.
>>>>>>     
>>>>>
>>>>> In that case, if the HW block says that it does YCbCr to RGB conversion 
>>>>> using rec BT.709, the resultant RGB follows the primaries as described 
>>>>> by BT.709 or mathematically it does not really matter?  
>>>>
>>>> Hi,
>>>>
>>>> the resultant RGB may or may not follow BT.709 primaries, and knowing
>>>> the primaries is important for further processing in general.
>>>>
>>>> YCbCr<->RGB conversion does not change the primaries. What went in,
>>>> will come out.
>>>>   
>>>>>>> I will read up on why our HW names these bits as such.    
>>>>>>
>>>>>> Sure, but keep in mind that your hardware naming is irrelevant for the
>>>>>> UAPI design.    
>>>>>
>>>>> Understood, I just want to make sure that the HW does exactly what we 
>>>>> will advertise through the UAPI.  
>>>>
>>>> Precisely.
>>>>
>>>>
>>>> Thanks,
>>>> pq
>>>>   
>>>>>>>> For YCbCr 2020 I feel it's nice to remember, that there are two
>>>>>>>> different conversions in the specification: the simple matrix one
>>>>>>>> called "non-constant luminance", and the complex one called "constant
>>>>>>>> luminance". Hence "NC".
>>>>>>>>
>>>>>>>> It's also good to recall that YCbCr-RGB conversions are done in an
>>>>>>>> electrical space, while RGB709-to-RGB2020 conversion must be done in the
>>>>>>>> optical space. It is up to the userspace to arrange the neighbouring
>>>>>>>> colorops to use the fixed matrix right.
>>>>>>>>        
>>>>>>>
>>>>>>> Ack on the above.  
>>>
>>
> 

Re: [PATCH 01/10] drm/colorop: Add DRM_COLOROP_CSC_FF

[Jani Nikula]

On Fri, 06 Mar 2026, Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> wrote:
> Introduce DRM_COLOROP_CSC_FF, a new colorop type representing a
> fixed-function Color Space Conversion (CSC) block.
>
> Unlike CTM-based colorops, this block does not expose programmable
> coefficients. Instead, userspace selects one of the predefined
> hardware modes via a new CSC_FF_TYPE enum property. Supported modes
> include common YUV->RGB and RGB709->RGB2020 conversions.
>
> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> ---
>  drivers/gpu/drm/drm_atomic.c      |   4 ++
>  drivers/gpu/drm/drm_atomic_uapi.c |   4 ++
>  drivers/gpu/drm/drm_colorop.c     | 105 ++++++++++++++++++++++++++++++
>  include/drm/drm_colorop.h         |  72 ++++++++++++++++++++
>  include/uapi/drm/drm_mode.h       |  13 ++++
>  5 files changed, 198 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 04925166df98..7296b844e3fd 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -844,6 +844,10 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p,
>  			   drm_get_colorop_lut3d_interpolation_name(colorop->lut3d_interpolation));
>  		drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
>  		break;
> +	case DRM_COLOROP_CSC_FF:
> +		drm_printf(p, "\tcsc_ff_type=%s\n",
> +			   drm_get_colorop_csc_ff_type_name(state->csc_ff_type));

See drm_printf_indent().

> +		break;
>  	default:
>  		break;
>  	}
> diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
> index 87de41fb4459..9af73325aa93 100644
> --- a/drivers/gpu/drm/drm_atomic_uapi.c
> +++ b/drivers/gpu/drm/drm_atomic_uapi.c
> @@ -757,6 +757,8 @@ static int drm_atomic_colorop_set_property(struct drm_colorop *colorop,
>  	} else if (property == colorop->data_property) {
>  		return drm_atomic_color_set_data_property(colorop, state,
>  							  property, val);
> +	} else if (property == colorop->csc_ff_type_property) {
> +		state->csc_ff_type = val;
>  	} else {
>  		drm_dbg_atomic(colorop->dev,
>  			       "[COLOROP:%d:%d] unknown property [PROP:%d:%s]\n",
> @@ -789,6 +791,8 @@ drm_atomic_colorop_get_property(struct drm_colorop *colorop,
>  		*val = colorop->lut3d_interpolation;
>  	else if (property == colorop->data_property)
>  		*val = (state->data) ? state->data->base.id : 0;
> +	else if (property == colorop->csc_ff_type_property)
> +		*val = state->csc_ff_type;
>  	else
>  		return -EINVAL;
>  
> diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
> index f421c623b3f0..49422c625f4d 100644
> --- a/drivers/gpu/drm/drm_colorop.c
> +++ b/drivers/gpu/drm/drm_colorop.c
> @@ -68,6 +68,7 @@ static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = {
>  	{ DRM_COLOROP_CTM_3X4, "3x4 Matrix"},
>  	{ DRM_COLOROP_MULTIPLIER, "Multiplier"},
>  	{ DRM_COLOROP_3D_LUT, "3D LUT"},
> +	{ DRM_COLOROP_CSC_FF, "CSC Fixed-Function"},
>  };
>  
>  static const char * const colorop_curve_1d_type_names[] = {
> @@ -90,6 +91,13 @@ static const struct drm_prop_enum_list drm_colorop_lut3d_interpolation_list[] =
>  	{ DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL, "Tetrahedral" },
>  };
>  
> +static const char * const colorop_csc_ff_type_names[] = {
> +	[DRM_COLOROP_CSC_FF_YUV601_RGB601]   = "YUV601 to RGB601",
> +	[DRM_COLOROP_CSC_FF_YUV709_RGB709]   = "YUV709 to RGB709",
> +	[DRM_COLOROP_CSC_FF_YUV2020_RGB2020] = "YUV2020 to RGB2020",
> +	[DRM_COLOROP_CSC_FF_RGB709_RGB2020]  = "RGB709 to RGB2020",
> +};
> +
>  /* Init Helpers */
>  
>  static int drm_plane_colorop_init(struct drm_device *dev, struct drm_colorop *colorop,
> @@ -459,6 +467,80 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
>  }
>  EXPORT_SYMBOL(drm_plane_colorop_3dlut_init);
>  
> +/**
> + * drm_plane_colorop_csc_ff_init - Initialize a DRM_COLOROP_CSC_FF
> + *
> + * @dev: DRM device
> + * @colorop: The drm_colorop object to initialize
> + * @plane: The associated drm_plane
> + * @funcs: control functions for the new colorop
> + * @supported_csc_ff: A bitfield of supported drm_plane_colorop_csc_ff_type enum values,
> + *                    created using BIT(csc_ff_type) and combined with the OR '|'
> + *                    operator.
> + * @flags: bitmask of misc, see DRM_COLOROP_FLAG_* defines.
> + * @return zero on success, -E value on failure
> + */
> +int drm_plane_colorop_csc_ff_init(struct drm_device *dev, struct drm_colorop *colorop,
> +				  struct drm_plane *plane, const struct drm_colorop_funcs *funcs,
> +				  u64 supported_csc_ff, uint32_t flags)
> +{
> +	struct drm_prop_enum_list enum_list[DRM_COLOROP_CSC_FF_COUNT];
> +	int i, len;
> +
> +	struct drm_property *prop;
> +	int ret;
> +
> +	if (!supported_csc_ff) {
> +		drm_err(dev,
> +			"No supported CSC op for new CSC FF colorop on [PLANE:%d:%s]\n",
> +			plane->base.id, plane->name);
> +		return -EINVAL;
> +	}
> +
> +	if ((supported_csc_ff & -BIT(DRM_COLOROP_CSC_FF_COUNT)) != 0) {
> +		drm_err(dev, "Unknown CSC provided on [PLANE:%d:%s]\n",
> +			plane->base.id, plane->name);
> +		return -EINVAL;
> +	}
> +
> +	ret = drm_plane_colorop_init(dev, colorop, plane, funcs, DRM_COLOROP_CSC_FF, flags);
> +	if (ret)
> +		return ret;
> +
> +	len = 0;
> +	for (i = 0; i < DRM_COLOROP_CSC_FF_COUNT; i++) {
> +		if ((supported_csc_ff & BIT(i)) == 0)
> +			continue;
> +
> +		enum_list[len].type = i;
> +		enum_list[len].name = colorop_csc_ff_type_names[i];
> +		len++;
> +	}
> +
> +	if (WARN_ON(len <= 0))
> +		return -EINVAL;
> +
> +	prop = drm_property_create_enum(dev, DRM_MODE_PROP_ATOMIC, "CSC_FF_TYPE",
> +					enum_list, len);
> +
> +	if (!prop)
> +		return -ENOMEM;
> +
> +	colorop->csc_ff_type_property = prop;
> +	/*
> +	 * Default to the first supported CSC mode as provided by the driver.
> +	 * Intuitively this should be something that keeps the colorop in pixel bypass
> +	 * mode but that is already handled via the standard colorop bypass
> +	 * property.
> +	 */
> +	drm_object_attach_property(&colorop->base, colorop->csc_ff_type_property,
> +				   enum_list[0].type);
> +	drm_colorop_reset(colorop);
> +
> +	return 0;
> +}
> +EXPORT_SYMBOL(drm_plane_colorop_csc_ff_init);
> +
>  static void __drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop,
>  							struct drm_colorop_state *state)
>  {
> @@ -513,6 +595,13 @@ static void __drm_colorop_state_reset(struct drm_colorop_state *colorop_state,
>  						      &val);
>  		colorop_state->curve_1d_type = val;
>  	}
> +
> +	if (colorop->csc_ff_type_property) {
> +		drm_object_property_get_default_value(&colorop->base,
> +						      colorop->csc_ff_type_property,
> +						      &val);
> +		colorop_state->csc_ff_type = val;
> +	}
>  }
>  
>  /**
> @@ -551,6 +640,7 @@ static const char * const colorop_type_name[] = {
>  	[DRM_COLOROP_CTM_3X4] = "3x4 Matrix",
>  	[DRM_COLOROP_MULTIPLIER] = "Multiplier",
>  	[DRM_COLOROP_3D_LUT] = "3D LUT",
> +	[DRM_COLOROP_CSC_FF] = "CSC Fixed-Function",
>  };
>  
>  static const char * const colorop_lu3d_interpolation_name[] = {
> @@ -607,6 +697,21 @@ const char *drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_inte
>  	return colorop_lu3d_interpolation_name[type];
>  }
>  
> +/**
> + * drm_get_colorop_csc_ff_type_name: return a string for interpolation type
> + * @type: csc ff type to compute name of
> + *
> + * In contrast to the other drm_get_*_name functions this one here returns a
> + * const pointer and hence is threadsafe.
> + */
> +const char *drm_get_colorop_csc_ff_type_name(enum drm_colorop_csc_ff_type type)
> +{
> +	if (WARN_ON(type >= ARRAY_SIZE(colorop_csc_ff_type_names)))
> +		return "unknown";
> +
> +	return colorop_csc_ff_type_names[type];
> +}
> +
>  /**
>   * drm_colorop_set_next_property - sets the next pointer
>   * @colorop: drm colorop
> diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
> index bd082854ca74..2cd8e0779c2a 100644
> --- a/include/drm/drm_colorop.h
> +++ b/include/drm/drm_colorop.h
> @@ -134,6 +134,60 @@ enum drm_colorop_curve_1d_type {
>  	DRM_COLOROP_1D_CURVE_COUNT
>  };
>  
> +/**
> + * enum drm_colorop_csc_ff_type - type of CSC Fixed-Function
> + *
> + * Describes a CSC operation to be applied by the DRM_COLOROP_CSC_FF colorop.
> + */
> +enum drm_colorop_csc_ff_type {
> +	/**
> +	 * @DRM_COLOROP_CSC_FF_YUV601_RGB601
> +	 *
> +	 * enum string "YUV601 to RGB601"
> +	 *
> +	 * Selects the fixed-function CSC preset that converts YUV
> +	 * (BT.601) colorimetry to RGB (BT.601).
> +	 */
> +	DRM_COLOROP_CSC_FF_YUV601_RGB601,
> +
> +	/**
> +	 * @DRM_COLOROP_CSC_FF_YUV709_RGB709:
> +	 *
> +	 * enum string "YUV709 to RGB709"
> +	 *
> +	 * Selects the fixed-function CSC preset that converts YUV
> +	 * (BT.709) colorimetry to RGB (BT.709).
> +	 */
> +	DRM_COLOROP_CSC_FF_YUV709_RGB709,
> +
> +	/**
> +	 * @DRM_COLOROP_CSC_FF_YUV2020_RGB2020:
> +	 *
> +	 * enum string "YUV2020 to RGB2020"
> +	 *
> +	 * Selects the fixed-function CSC preset that converts YUV
> +	 * (BT.2020) colorimetry to RGB (BT.2020).
> +	 */
> +	DRM_COLOROP_CSC_FF_YUV2020_RGB2020,
> +
> +	/**
> +	 * @DRM_COLOROP_CSC_FF_RGB709_RGB2020:
> +	 *
> +	 * enum string "RGB709 to RGB2020"
> +	 *
> +	 * Selects the fixed-function CSC preset that converts RGB
> +	 * (BT.709) colorimetry to RGB (BT.2020).
> +	 */
> +	DRM_COLOROP_CSC_FF_RGB709_RGB2020,
> +
> +	/**
> +	 * @DRM_COLOROP_CSC_FF_COUNT:
> +	 *
> +	 * enum value denoting the size of the enum
> +	 */
> +	DRM_COLOROP_CSC_FF_COUNT
> +};
> +
>  /**
>   * struct drm_colorop_state - mutable colorop state
>   */
> @@ -183,6 +237,13 @@ struct drm_colorop_state {
>  	 */
>  	struct drm_property_blob *data;
>  
> +	/**
> +	 * @csc_ff_type:
> +	 *
> +	 * Type of Fixed function CSC.
> +	 */
> +	enum drm_colorop_csc_ff_type csc_ff_type;
> +
>  	/** @state: backpointer to global drm_atomic_state */
>  	struct drm_atomic_state *state;
>  };
> @@ -368,6 +429,13 @@ struct drm_colorop {
>  	 */
>  	struct drm_property *data_property;
>  
> +	/**
> +	 * @csc_ff_type_property:
> +	 *
> +	 * Sub-type for DRM_COLOROP_CSC_FF type.
> +	 */
> +	struct drm_property *csc_ff_type_property;
> +
>  	/**
>  	 * @next_property:
>  	 *
> @@ -424,6 +492,9 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
>  				 uint32_t lut_size,
>  				 enum drm_colorop_lut3d_interpolation_type interpolation,
>  				 uint32_t flags);
> +int drm_plane_colorop_csc_ff_init(struct drm_device *dev, struct drm_colorop *colorop,
> +				  struct drm_plane *plane, const struct drm_colorop_funcs *funcs,
> +				  u64 supported_csc_ff, uint32_t flags);
>  
>  struct drm_colorop_state *
>  drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop);
> @@ -480,6 +551,7 @@ drm_get_colorop_lut1d_interpolation_name(enum drm_colorop_lut1d_interpolation_ty
>  
>  const char *
>  drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_interpolation_type type);
> +const char *drm_get_colorop_csc_ff_type_name(enum drm_colorop_csc_ff_type type);
>  
>  void drm_colorop_set_next_property(struct drm_colorop *colorop, struct drm_colorop *next);
>  
> diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
> index 3693d82b5279..f7808e7ea984 100644
> --- a/include/uapi/drm/drm_mode.h
> +++ b/include/uapi/drm/drm_mode.h
> @@ -968,6 +968,19 @@ enum drm_colorop_type {
>  	 *         color = lut3d[index]
>  	 */
>  	DRM_COLOROP_3D_LUT,
> +
> +	/**
> +	 * @DRM_COLOROP_CSC_FF:
> +	 *
> +	 * enum string "CSC Fixed-Function"
> +	 *
> +	 * A fixed-function Color Space Conversion block where the coefficients
> +	 * are not programmable but selected from predefined hardware modes via
> +	 * the CSC_FF_TYPE enum property. The driver advertises the supported
> +	 * CSC modes through this property.
> +	 */
> +	DRM_COLOROP_CSC_FF,
> +
>  };
>  
>  /**

-- 
Jani Nikula, Intel

Re: [PATCH 01/10] drm/colorop: Add DRM_COLOROP_CSC_FF

[Harry Wentland]

On 2026-03-06 11:52, Chaitanya Kumar Borah wrote:
> Introduce DRM_COLOROP_CSC_FF, a new colorop type representing a
> fixed-function Color Space Conversion (CSC) block.
> 
> Unlike CTM-based colorops, this block does not expose programmable
> coefficients. Instead, userspace selects one of the predefined
> hardware modes via a new CSC_FF_TYPE enum property. Supported modes
> include common YUV->RGB and RGB709->RGB2020 conversions.
> 
> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> ---
>  drivers/gpu/drm/drm_atomic.c      |   4 ++
>  drivers/gpu/drm/drm_atomic_uapi.c |   4 ++
>  drivers/gpu/drm/drm_colorop.c     | 105 ++++++++++++++++++++++++++++++
>  include/drm/drm_colorop.h         |  72 ++++++++++++++++++++
>  include/uapi/drm/drm_mode.h       |  13 ++++
>  5 files changed, 198 insertions(+)
> 
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 04925166df98..7296b844e3fd 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -844,6 +844,10 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p,
>  			   drm_get_colorop_lut3d_interpolation_name(colorop->lut3d_interpolation));
>  		drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
>  		break;
> +	case DRM_COLOROP_CSC_FF:
> +		drm_printf(p, "\tcsc_ff_type=%s\n",
> +			   drm_get_colorop_csc_ff_type_name(state->csc_ff_type));
> +		break;
>  	default:
>  		break;
>  	}
> diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
> index 87de41fb4459..9af73325aa93 100644
> --- a/drivers/gpu/drm/drm_atomic_uapi.c
> +++ b/drivers/gpu/drm/drm_atomic_uapi.c
> @@ -757,6 +757,8 @@ static int drm_atomic_colorop_set_property(struct drm_colorop *colorop,
>  	} else if (property == colorop->data_property) {
>  		return drm_atomic_color_set_data_property(colorop, state,
>  							  property, val);
> +	} else if (property == colorop->csc_ff_type_property) {
> +		state->csc_ff_type = val;
>  	} else {
>  		drm_dbg_atomic(colorop->dev,
>  			       "[COLOROP:%d:%d] unknown property [PROP:%d:%s]\n",
> @@ -789,6 +791,8 @@ drm_atomic_colorop_get_property(struct drm_colorop *colorop,
>  		*val = colorop->lut3d_interpolation;
>  	else if (property == colorop->data_property)
>  		*val = (state->data) ? state->data->base.id : 0;
> +	else if (property == colorop->csc_ff_type_property)
> +		*val = state->csc_ff_type;
>  	else
>  		return -EINVAL;
>  
> diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
> index f421c623b3f0..49422c625f4d 100644
> --- a/drivers/gpu/drm/drm_colorop.c
> +++ b/drivers/gpu/drm/drm_colorop.c
> @@ -68,6 +68,7 @@ static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = {
>  	{ DRM_COLOROP_CTM_3X4, "3x4 Matrix"},
>  	{ DRM_COLOROP_MULTIPLIER, "Multiplier"},
>  	{ DRM_COLOROP_3D_LUT, "3D LUT"},
> +	{ DRM_COLOROP_CSC_FF, "CSC Fixed-Function"},
>  };
>  
>  static const char * const colorop_curve_1d_type_names[] = {
> @@ -90,6 +91,13 @@ static const struct drm_prop_enum_list drm_colorop_lut3d_interpolation_list[] =
>  	{ DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL, "Tetrahedral" },
>  };
>  
> +static const char * const colorop_csc_ff_type_names[] = {
> +	[DRM_COLOROP_CSC_FF_YUV601_RGB601]   = "YUV601 to RGB601",
> +	[DRM_COLOROP_CSC_FF_YUV709_RGB709]   = "YUV709 to RGB709",
> +	[DRM_COLOROP_CSC_FF_YUV2020_RGB2020] = "YUV2020 to RGB2020",

If these are intended to be used for YCbCr to RGB conversions
will they convert from limited to full range? Or full range
to full range? Or something else?

Harry

> +	[DRM_COLOROP_CSC_FF_RGB709_RGB2020]  = "RGB709 to RGB2020",
> +};
> +
>  /* Init Helpers */
>  
>  static int drm_plane_colorop_init(struct drm_device *dev, struct drm_colorop *colorop,
> @@ -459,6 +467,80 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
>  }
>  EXPORT_SYMBOL(drm_plane_colorop_3dlut_init);
>  
> +/**
> + * drm_plane_colorop_csc_ff_init - Initialize a DRM_COLOROP_CSC_FF
> + *
> + * @dev: DRM device
> + * @colorop: The drm_colorop object to initialize
> + * @plane: The associated drm_plane
> + * @funcs: control functions for the new colorop
> + * @supported_csc_ff: A bitfield of supported drm_plane_colorop_csc_ff_type enum values,
> + *                    created using BIT(csc_ff_type) and combined with the OR '|'
> + *                    operator.
> + * @flags: bitmask of misc, see DRM_COLOROP_FLAG_* defines.
> + * @return zero on success, -E value on failure
> + */
> +int drm_plane_colorop_csc_ff_init(struct drm_device *dev, struct drm_colorop *colorop,
> +				  struct drm_plane *plane, const struct drm_colorop_funcs *funcs,
> +				  u64 supported_csc_ff, uint32_t flags)
> +{
> +	struct drm_prop_enum_list enum_list[DRM_COLOROP_CSC_FF_COUNT];
> +	int i, len;
> +
> +	struct drm_property *prop;
> +	int ret;
> +
> +	if (!supported_csc_ff) {
> +		drm_err(dev,
> +			"No supported CSC op for new CSC FF colorop on [PLANE:%d:%s]\n",
> +			plane->base.id, plane->name);
> +		return -EINVAL;
> +	}
> +
> +	if ((supported_csc_ff & -BIT(DRM_COLOROP_CSC_FF_COUNT)) != 0) {
> +		drm_err(dev, "Unknown CSC provided on [PLANE:%d:%s]\n",
> +			plane->base.id, plane->name);
> +		return -EINVAL;
> +	}
> +
> +	ret = drm_plane_colorop_init(dev, colorop, plane, funcs, DRM_COLOROP_CSC_FF, flags);
> +	if (ret)
> +		return ret;
> +
> +	len = 0;
> +	for (i = 0; i < DRM_COLOROP_CSC_FF_COUNT; i++) {
> +		if ((supported_csc_ff & BIT(i)) == 0)
> +			continue;
> +
> +		enum_list[len].type = i;
> +		enum_list[len].name = colorop_csc_ff_type_names[i];
> +		len++;
> +	}
> +
> +	if (WARN_ON(len <= 0))
> +		return -EINVAL;
> +
> +	prop = drm_property_create_enum(dev, DRM_MODE_PROP_ATOMIC, "CSC_FF_TYPE",
> +					enum_list, len);
> +
> +	if (!prop)
> +		return -ENOMEM;
> +
> +	colorop->csc_ff_type_property = prop;
> +	/*
> +	 * Default to the first supported CSC mode as provided by the driver.
> +	 * Intuitively this should be something that keeps the colorop in pixel bypass
> +	 * mode but that is already handled via the standard colorop bypass
> +	 * property.
> +	 */
> +	drm_object_attach_property(&colorop->base, colorop->csc_ff_type_property,
> +				   enum_list[0].type);
> +	drm_colorop_reset(colorop);
> +
> +	return 0;
> +}
> +EXPORT_SYMBOL(drm_plane_colorop_csc_ff_init);
> +
>  static void __drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop,
>  							struct drm_colorop_state *state)
>  {
> @@ -513,6 +595,13 @@ static void __drm_colorop_state_reset(struct drm_colorop_state *colorop_state,
>  						      &val);
>  		colorop_state->curve_1d_type = val;
>  	}
> +
> +	if (colorop->csc_ff_type_property) {
> +		drm_object_property_get_default_value(&colorop->base,
> +						      colorop->csc_ff_type_property,
> +						      &val);
> +		colorop_state->csc_ff_type = val;
> +	}
>  }
>  
>  /**
> @@ -551,6 +640,7 @@ static const char * const colorop_type_name[] = {
>  	[DRM_COLOROP_CTM_3X4] = "3x4 Matrix",
>  	[DRM_COLOROP_MULTIPLIER] = "Multiplier",
>  	[DRM_COLOROP_3D_LUT] = "3D LUT",
> +	[DRM_COLOROP_CSC_FF] = "CSC Fixed-Function",
>  };
>  
>  static const char * const colorop_lu3d_interpolation_name[] = {
> @@ -607,6 +697,21 @@ const char *drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_inte
>  	return colorop_lu3d_interpolation_name[type];
>  }
>  
> +/**
> + * drm_get_colorop_csc_ff_type_name: return a string for interpolation type
> + * @type: csc ff type to compute name of
> + *
> + * In contrast to the other drm_get_*_name functions this one here returns a
> + * const pointer and hence is threadsafe.
> + */
> +const char *drm_get_colorop_csc_ff_type_name(enum drm_colorop_csc_ff_type type)
> +{
> +	if (WARN_ON(type >= ARRAY_SIZE(colorop_csc_ff_type_names)))
> +		return "unknown";
> +
> +	return colorop_csc_ff_type_names[type];
> +}
> +
>  /**
>   * drm_colorop_set_next_property - sets the next pointer
>   * @colorop: drm colorop
> diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
> index bd082854ca74..2cd8e0779c2a 100644
> --- a/include/drm/drm_colorop.h
> +++ b/include/drm/drm_colorop.h
> @@ -134,6 +134,60 @@ enum drm_colorop_curve_1d_type {
>  	DRM_COLOROP_1D_CURVE_COUNT
>  };
>  
> +/**
> + * enum drm_colorop_csc_ff_type - type of CSC Fixed-Function
> + *
> + * Describes a CSC operation to be applied by the DRM_COLOROP_CSC_FF colorop.
> + */
> +enum drm_colorop_csc_ff_type {
> +	/**
> +	 * @DRM_COLOROP_CSC_FF_YUV601_RGB601
> +	 *
> +	 * enum string "YUV601 to RGB601"
> +	 *
> +	 * Selects the fixed-function CSC preset that converts YUV
> +	 * (BT.601) colorimetry to RGB (BT.601).
> +	 */
> +	DRM_COLOROP_CSC_FF_YUV601_RGB601,
> +
> +	/**
> +	 * @DRM_COLOROP_CSC_FF_YUV709_RGB709:
> +	 *
> +	 * enum string "YUV709 to RGB709"
> +	 *
> +	 * Selects the fixed-function CSC preset that converts YUV
> +	 * (BT.709) colorimetry to RGB (BT.709).
> +	 */
> +	DRM_COLOROP_CSC_FF_YUV709_RGB709,
> +
> +	/**
> +	 * @DRM_COLOROP_CSC_FF_YUV2020_RGB2020:
> +	 *
> +	 * enum string "YUV2020 to RGB2020"
> +	 *
> +	 * Selects the fixed-function CSC preset that converts YUV
> +	 * (BT.2020) colorimetry to RGB (BT.2020).
> +	 */
> +	DRM_COLOROP_CSC_FF_YUV2020_RGB2020,
> +
> +	/**
> +	 * @DRM_COLOROP_CSC_FF_RGB709_RGB2020:
> +	 *
> +	 * enum string "RGB709 to RGB2020"
> +	 *
> +	 * Selects the fixed-function CSC preset that converts RGB
> +	 * (BT.709) colorimetry to RGB (BT.2020).
> +	 */
> +	DRM_COLOROP_CSC_FF_RGB709_RGB2020,
> +
> +	/**
> +	 * @DRM_COLOROP_CSC_FF_COUNT:
> +	 *
> +	 * enum value denoting the size of the enum
> +	 */
> +	DRM_COLOROP_CSC_FF_COUNT
> +};
> +
>  /**
>   * struct drm_colorop_state - mutable colorop state
>   */
> @@ -183,6 +237,13 @@ struct drm_colorop_state {
>  	 */
>  	struct drm_property_blob *data;
>  
> +	/**
> +	 * @csc_ff_type:
> +	 *
> +	 * Type of Fixed function CSC.
> +	 */
> +	enum drm_colorop_csc_ff_type csc_ff_type;
> +
>  	/** @state: backpointer to global drm_atomic_state */
>  	struct drm_atomic_state *state;
>  };
> @@ -368,6 +429,13 @@ struct drm_colorop {
>  	 */
>  	struct drm_property *data_property;
>  
> +	/**
> +	 * @csc_ff_type_property:
> +	 *
> +	 * Sub-type for DRM_COLOROP_CSC_FF type.
> +	 */
> +	struct drm_property *csc_ff_type_property;
> +
>  	/**
>  	 * @next_property:
>  	 *
> @@ -424,6 +492,9 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
>  				 uint32_t lut_size,
>  				 enum drm_colorop_lut3d_interpolation_type interpolation,
>  				 uint32_t flags);
> +int drm_plane_colorop_csc_ff_init(struct drm_device *dev, struct drm_colorop *colorop,
> +				  struct drm_plane *plane, const struct drm_colorop_funcs *funcs,
> +				  u64 supported_csc_ff, uint32_t flags);
>  
>  struct drm_colorop_state *
>  drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop);
> @@ -480,6 +551,7 @@ drm_get_colorop_lut1d_interpolation_name(enum drm_colorop_lut1d_interpolation_ty
>  
>  const char *
>  drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_interpolation_type type);
> +const char *drm_get_colorop_csc_ff_type_name(enum drm_colorop_csc_ff_type type);
>  
>  void drm_colorop_set_next_property(struct drm_colorop *colorop, struct drm_colorop *next);
>  
> diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
> index 3693d82b5279..f7808e7ea984 100644
> --- a/include/uapi/drm/drm_mode.h
> +++ b/include/uapi/drm/drm_mode.h
> @@ -968,6 +968,19 @@ enum drm_colorop_type {
>  	 *         color = lut3d[index]
>  	 */
>  	DRM_COLOROP_3D_LUT,
> +
> +	/**
> +	 * @DRM_COLOROP_CSC_FF:
> +	 *
> +	 * enum string "CSC Fixed-Function"
> +	 *
> +	 * A fixed-function Color Space Conversion block where the coefficients
> +	 * are not programmable but selected from predefined hardware modes via
> +	 * the CSC_FF_TYPE enum property. The driver advertises the supported
> +	 * CSC modes through this property.
> +	 */
> +	DRM_COLOROP_CSC_FF,
> +
>  };
>  
>  /**

Re: [PATCH 01/10] drm/colorop: Add DRM_COLOROP_CSC_FF

[Borah, Chaitanya Kumar]

Hi Harry,

On 3/17/2026 2:15 AM, Harry Wentland wrote:
> 
> 
> On 2026-03-06 11:52, Chaitanya Kumar Borah wrote:
>> Introduce DRM_COLOROP_CSC_FF, a new colorop type representing a
>> fixed-function Color Space Conversion (CSC) block.
>>
>> Unlike CTM-based colorops, this block does not expose programmable
>> coefficients. Instead, userspace selects one of the predefined
>> hardware modes via a new CSC_FF_TYPE enum property. Supported modes
>> include common YUV->RGB and RGB709->RGB2020 conversions.
>>
>> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
>> ---
>>   drivers/gpu/drm/drm_atomic.c      |   4 ++
>>   drivers/gpu/drm/drm_atomic_uapi.c |   4 ++
>>   drivers/gpu/drm/drm_colorop.c     | 105 ++++++++++++++++++++++++++++++
>>   include/drm/drm_colorop.h         |  72 ++++++++++++++++++++
>>   include/uapi/drm/drm_mode.h       |  13 ++++
>>   5 files changed, 198 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
>> index 04925166df98..7296b844e3fd 100644
>> --- a/drivers/gpu/drm/drm_atomic.c
>> +++ b/drivers/gpu/drm/drm_atomic.c
>> @@ -844,6 +844,10 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p,
>>   			   drm_get_colorop_lut3d_interpolation_name(colorop->lut3d_interpolation));
>>   		drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
>>   		break;
>> +	case DRM_COLOROP_CSC_FF:
>> +		drm_printf(p, "\tcsc_ff_type=%s\n",
>> +			   drm_get_colorop_csc_ff_type_name(state->csc_ff_type));
>> +		break;
>>   	default:
>>   		break;
>>   	}
>> diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
>> index 87de41fb4459..9af73325aa93 100644
>> --- a/drivers/gpu/drm/drm_atomic_uapi.c
>> +++ b/drivers/gpu/drm/drm_atomic_uapi.c
>> @@ -757,6 +757,8 @@ static int drm_atomic_colorop_set_property(struct drm_colorop *colorop,
>>   	} else if (property == colorop->data_property) {
>>   		return drm_atomic_color_set_data_property(colorop, state,
>>   							  property, val);
>> +	} else if (property == colorop->csc_ff_type_property) {
>> +		state->csc_ff_type = val;
>>   	} else {
>>   		drm_dbg_atomic(colorop->dev,
>>   			       "[COLOROP:%d:%d] unknown property [PROP:%d:%s]\n",
>> @@ -789,6 +791,8 @@ drm_atomic_colorop_get_property(struct drm_colorop *colorop,
>>   		*val = colorop->lut3d_interpolation;
>>   	else if (property == colorop->data_property)
>>   		*val = (state->data) ? state->data->base.id : 0;
>> +	else if (property == colorop->csc_ff_type_property)
>> +		*val = state->csc_ff_type;
>>   	else
>>   		return -EINVAL;
>>   
>> diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
>> index f421c623b3f0..49422c625f4d 100644
>> --- a/drivers/gpu/drm/drm_colorop.c
>> +++ b/drivers/gpu/drm/drm_colorop.c
>> @@ -68,6 +68,7 @@ static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = {
>>   	{ DRM_COLOROP_CTM_3X4, "3x4 Matrix"},
>>   	{ DRM_COLOROP_MULTIPLIER, "Multiplier"},
>>   	{ DRM_COLOROP_3D_LUT, "3D LUT"},
>> +	{ DRM_COLOROP_CSC_FF, "CSC Fixed-Function"},
>>   };
>>   
>>   static const char * const colorop_curve_1d_type_names[] = {
>> @@ -90,6 +91,13 @@ static const struct drm_prop_enum_list drm_colorop_lut3d_interpolation_list[] =
>>   	{ DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL, "Tetrahedral" },
>>   };
>>   
>> +static const char * const colorop_csc_ff_type_names[] = {
>> +	[DRM_COLOROP_CSC_FF_YUV601_RGB601]   = "YUV601 to RGB601",
>> +	[DRM_COLOROP_CSC_FF_YUV709_RGB709]   = "YUV709 to RGB709",
>> +	[DRM_COLOROP_CSC_FF_YUV2020_RGB2020] = "YUV2020 to RGB2020",
> 
> If these are intended to be used for YCbCr to RGB conversions
> will they convert from limited to full range? Or full range
> to full range? Or something else?
> 

AFAIU, the block I wanted to represent is Full Range YCbCr -> Full Range 
RGB. We have the following configuration in our plane.

[YUV range correction Block] -> [Degamma LUT] -> [PRESET CSC] -> [Gamma LUT]

With the legacy "COLOR RANGE" property, selecting limited range enabled 
the YUV range correction block.

I still need to figure out what use-case does the degamma LUT in between 
the Range correction block and the Preset CSC serve since YCbCr to RGB 
conversion will take place in non-linear domain. But it makes me wonder 
if we can have "COLOR ENCODING" and "COLOR RANGE" property within the 
same colorop like you have been implementing in [1] or should they be 
represented by separate colorops.

Uma please weigh in if you have something to add or disagree with.

==
Chaitanya

[1] https://gitlab.freedesktop.org/hwentland/linux/-/commits/csc-colorop

> Harry
> 
>> +	[DRM_COLOROP_CSC_FF_RGB709_RGB2020]  = "RGB709 to RGB2020",
>> +};
>> +
>>   /* Init Helpers */
>>   
>>   static int drm_plane_colorop_init(struct drm_device *dev, struct drm_colorop *colorop,
>> @@ -459,6 +467,80 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
>>   }
>>   EXPORT_SYMBOL(drm_plane_colorop_3dlut_init);
>>   
>> +/**
>> + * drm_plane_colorop_csc_ff_init - Initialize a DRM_COLOROP_CSC_FF
>> + *
>> + * @dev: DRM device
>> + * @colorop: The drm_colorop object to initialize
>> + * @plane: The associated drm_plane
>> + * @funcs: control functions for the new colorop
>> + * @supported_csc_ff: A bitfield of supported drm_plane_colorop_csc_ff_type enum values,
>> + *                    created using BIT(csc_ff_type) and combined with the OR '|'
>> + *                    operator.
>> + * @flags: bitmask of misc, see DRM_COLOROP_FLAG_* defines.
>> + * @return zero on success, -E value on failure
>> + */
>> +int drm_plane_colorop_csc_ff_init(struct drm_device *dev, struct drm_colorop *colorop,
>> +				  struct drm_plane *plane, const struct drm_colorop_funcs *funcs,
>> +				  u64 supported_csc_ff, uint32_t flags)
>> +{
>> +	struct drm_prop_enum_list enum_list[DRM_COLOROP_CSC_FF_COUNT];
>> +	int i, len;
>> +
>> +	struct drm_property *prop;
>> +	int ret;
>> +
>> +	if (!supported_csc_ff) {
>> +		drm_err(dev,
>> +			"No supported CSC op for new CSC FF colorop on [PLANE:%d:%s]\n",
>> +			plane->base.id, plane->name);
>> +		return -EINVAL;
>> +	}
>> +
>> +	if ((supported_csc_ff & -BIT(DRM_COLOROP_CSC_FF_COUNT)) != 0) {
>> +		drm_err(dev, "Unknown CSC provided on [PLANE:%d:%s]\n",
>> +			plane->base.id, plane->name);
>> +		return -EINVAL;
>> +	}
>> +
>> +	ret = drm_plane_colorop_init(dev, colorop, plane, funcs, DRM_COLOROP_CSC_FF, flags);
>> +	if (ret)
>> +		return ret;
>> +
>> +	len = 0;
>> +	for (i = 0; i < DRM_COLOROP_CSC_FF_COUNT; i++) {
>> +		if ((supported_csc_ff & BIT(i)) == 0)
>> +			continue;
>> +
>> +		enum_list[len].type = i;
>> +		enum_list[len].name = colorop_csc_ff_type_names[i];
>> +		len++;
>> +	}
>> +
>> +	if (WARN_ON(len <= 0))
>> +		return -EINVAL;
>> +
>> +	prop = drm_property_create_enum(dev, DRM_MODE_PROP_ATOMIC, "CSC_FF_TYPE",
>> +					enum_list, len);
>> +
>> +	if (!prop)
>> +		return -ENOMEM;
>> +
>> +	colorop->csc_ff_type_property = prop;
>> +	/*
>> +	 * Default to the first supported CSC mode as provided by the driver.
>> +	 * Intuitively this should be something that keeps the colorop in pixel bypass
>> +	 * mode but that is already handled via the standard colorop bypass
>> +	 * property.
>> +	 */
>> +	drm_object_attach_property(&colorop->base, colorop->csc_ff_type_property,
>> +				   enum_list[0].type);
>> +	drm_colorop_reset(colorop);
>> +
>> +	return 0;
>> +}
>> +EXPORT_SYMBOL(drm_plane_colorop_csc_ff_init);
>> +
>>   static void __drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop,
>>   							struct drm_colorop_state *state)
>>   {
>> @@ -513,6 +595,13 @@ static void __drm_colorop_state_reset(struct drm_colorop_state *colorop_state,
>>   						      &val);
>>   		colorop_state->curve_1d_type = val;
>>   	}
>> +
>> +	if (colorop->csc_ff_type_property) {
>> +		drm_object_property_get_default_value(&colorop->base,
>> +						      colorop->csc_ff_type_property,
>> +						      &val);
>> +		colorop_state->csc_ff_type = val;
>> +	}
>>   }
>>   
>>   /**
>> @@ -551,6 +640,7 @@ static const char * const colorop_type_name[] = {
>>   	[DRM_COLOROP_CTM_3X4] = "3x4 Matrix",
>>   	[DRM_COLOROP_MULTIPLIER] = "Multiplier",
>>   	[DRM_COLOROP_3D_LUT] = "3D LUT",
>> +	[DRM_COLOROP_CSC_FF] = "CSC Fixed-Function",
>>   };
>>   
>>   static const char * const colorop_lu3d_interpolation_name[] = {
>> @@ -607,6 +697,21 @@ const char *drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_inte
>>   	return colorop_lu3d_interpolation_name[type];
>>   }
>>   
>> +/**
>> + * drm_get_colorop_csc_ff_type_name: return a string for interpolation type
>> + * @type: csc ff type to compute name of
>> + *
>> + * In contrast to the other drm_get_*_name functions this one here returns a
>> + * const pointer and hence is threadsafe.
>> + */
>> +const char *drm_get_colorop_csc_ff_type_name(enum drm_colorop_csc_ff_type type)
>> +{
>> +	if (WARN_ON(type >= ARRAY_SIZE(colorop_csc_ff_type_names)))
>> +		return "unknown";
>> +
>> +	return colorop_csc_ff_type_names[type];
>> +}
>> +
>>   /**
>>    * drm_colorop_set_next_property - sets the next pointer
>>    * @colorop: drm colorop
>> diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
>> index bd082854ca74..2cd8e0779c2a 100644
>> --- a/include/drm/drm_colorop.h
>> +++ b/include/drm/drm_colorop.h
>> @@ -134,6 +134,60 @@ enum drm_colorop_curve_1d_type {
>>   	DRM_COLOROP_1D_CURVE_COUNT
>>   };
>>   
>> +/**
>> + * enum drm_colorop_csc_ff_type - type of CSC Fixed-Function
>> + *
>> + * Describes a CSC operation to be applied by the DRM_COLOROP_CSC_FF colorop.
>> + */
>> +enum drm_colorop_csc_ff_type {
>> +	/**
>> +	 * @DRM_COLOROP_CSC_FF_YUV601_RGB601
>> +	 *
>> +	 * enum string "YUV601 to RGB601"
>> +	 *
>> +	 * Selects the fixed-function CSC preset that converts YUV
>> +	 * (BT.601) colorimetry to RGB (BT.601).
>> +	 */
>> +	DRM_COLOROP_CSC_FF_YUV601_RGB601,
>> +
>> +	/**
>> +	 * @DRM_COLOROP_CSC_FF_YUV709_RGB709:
>> +	 *
>> +	 * enum string "YUV709 to RGB709"
>> +	 *
>> +	 * Selects the fixed-function CSC preset that converts YUV
>> +	 * (BT.709) colorimetry to RGB (BT.709).
>> +	 */
>> +	DRM_COLOROP_CSC_FF_YUV709_RGB709,
>> +
>> +	/**
>> +	 * @DRM_COLOROP_CSC_FF_YUV2020_RGB2020:
>> +	 *
>> +	 * enum string "YUV2020 to RGB2020"
>> +	 *
>> +	 * Selects the fixed-function CSC preset that converts YUV
>> +	 * (BT.2020) colorimetry to RGB (BT.2020).
>> +	 */
>> +	DRM_COLOROP_CSC_FF_YUV2020_RGB2020,
>> +
>> +	/**
>> +	 * @DRM_COLOROP_CSC_FF_RGB709_RGB2020:
>> +	 *
>> +	 * enum string "RGB709 to RGB2020"
>> +	 *
>> +	 * Selects the fixed-function CSC preset that converts RGB
>> +	 * (BT.709) colorimetry to RGB (BT.2020).
>> +	 */
>> +	DRM_COLOROP_CSC_FF_RGB709_RGB2020,
>> +
>> +	/**
>> +	 * @DRM_COLOROP_CSC_FF_COUNT:
>> +	 *
>> +	 * enum value denoting the size of the enum
>> +	 */
>> +	DRM_COLOROP_CSC_FF_COUNT
>> +};
>> +
>>   /**
>>    * struct drm_colorop_state - mutable colorop state
>>    */
>> @@ -183,6 +237,13 @@ struct drm_colorop_state {
>>   	 */
>>   	struct drm_property_blob *data;
>>   
>> +	/**
>> +	 * @csc_ff_type:
>> +	 *
>> +	 * Type of Fixed function CSC.
>> +	 */
>> +	enum drm_colorop_csc_ff_type csc_ff_type;
>> +
>>   	/** @state: backpointer to global drm_atomic_state */
>>   	struct drm_atomic_state *state;
>>   };
>> @@ -368,6 +429,13 @@ struct drm_colorop {
>>   	 */
>>   	struct drm_property *data_property;
>>   
>> +	/**
>> +	 * @csc_ff_type_property:
>> +	 *
>> +	 * Sub-type for DRM_COLOROP_CSC_FF type.
>> +	 */
>> +	struct drm_property *csc_ff_type_property;
>> +
>>   	/**
>>   	 * @next_property:
>>   	 *
>> @@ -424,6 +492,9 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
>>   				 uint32_t lut_size,
>>   				 enum drm_colorop_lut3d_interpolation_type interpolation,
>>   				 uint32_t flags);
>> +int drm_plane_colorop_csc_ff_init(struct drm_device *dev, struct drm_colorop *colorop,
>> +				  struct drm_plane *plane, const struct drm_colorop_funcs *funcs,
>> +				  u64 supported_csc_ff, uint32_t flags);
>>   
>>   struct drm_colorop_state *
>>   drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop);
>> @@ -480,6 +551,7 @@ drm_get_colorop_lut1d_interpolation_name(enum drm_colorop_lut1d_interpolation_ty
>>   
>>   const char *
>>   drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_interpolation_type type);
>> +const char *drm_get_colorop_csc_ff_type_name(enum drm_colorop_csc_ff_type type);
>>   
>>   void drm_colorop_set_next_property(struct drm_colorop *colorop, struct drm_colorop *next);
>>   
>> diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
>> index 3693d82b5279..f7808e7ea984 100644
>> --- a/include/uapi/drm/drm_mode.h
>> +++ b/include/uapi/drm/drm_mode.h
>> @@ -968,6 +968,19 @@ enum drm_colorop_type {
>>   	 *         color = lut3d[index]
>>   	 */
>>   	DRM_COLOROP_3D_LUT,
>> +
>> +	/**
>> +	 * @DRM_COLOROP_CSC_FF:
>> +	 *
>> +	 * enum string "CSC Fixed-Function"
>> +	 *
>> +	 * A fixed-function Color Space Conversion block where the coefficients
>> +	 * are not programmable but selected from predefined hardware modes via
>> +	 * the CSC_FF_TYPE enum property. The driver advertises the supported
>> +	 * CSC modes through this property.
>> +	 */
>> +	DRM_COLOROP_CSC_FF,
>> +
>>   };
>>   
>>   /**
> 

Re: [PATCH 01/10] drm/colorop: Add DRM_COLOROP_CSC_FF

[Pekka Paalanen]

[-- Attachment #1: Type: text/plain, Size: 1751 bytes --]

On Tue, 17 Mar 2026 17:59:27 +0530
"Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com> wrote:

> AFAIU, the block I wanted to represent is Full Range YCbCr -> Full Range 
> RGB. We have the following configuration in our plane.
> 
> [YUV range correction Block] -> [Degamma LUT] -> [PRESET CSC] -> [Gamma LUT]
> 
> With the legacy "COLOR RANGE" property, selecting limited range enabled 
> the YUV range correction block.
> 
> I still need to figure out what use-case does the degamma LUT in between 
> the Range correction block and the Preset CSC serve since YCbCr to RGB 
> conversion will take place in non-linear domain. But it makes me wonder 

Hi Chaitanya,

yes, that is peculiar indeed. At least "Degamma LUT" is usable with RGB
framebuffers.

> if we can have "COLOR ENCODING" and "COLOR RANGE" property within the 
> same colorop like you have been implementing in [1] or should they be 
> represented by separate colorops.

If there is another operation in between (Degamma LUT) that you want to
expose, then range-conversion and fixed-matrix operations need to have
their own colorops. The chain of colorops cannot go backwards.

OTOH, if there is a single hardware operation that does both
range-conversion and fixed-matrix, then there is no problem for a
driver to translate the pair of colorops into hardware configuration.
So it sounds like they should be defined as separate colorops, and then
drivers usually expose them together. Unless the hardware cannot do all
combinations of their values.


Thanks,
pq

> Uma please weigh in if you have something to add or disagree with.
> 
> ==
> Chaitanya
> 
> [1] https://gitlab.freedesktop.org/hwentland/linux/-/commits/csc-colorop
> 

[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

[PATCH 02/10] drm/i915/color: Add CSC on SDR plane color pipeline

[Chaitanya Kumar Borah]

Add the fixed-function CSC block to color pipeline in SDR planes
as a DRM_COLOROP_CSC_FF colorop.

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
 .../drm/i915/display/intel_color_pipeline.c   | 22 ++++++++++++++++++-
 .../drm/i915/display/intel_display_limits.h   |  1 +
 2 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
index 6cf8080ee800..f368a896d2fc 100644
--- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
+++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
@@ -43,6 +43,16 @@ static const enum intel_color_block hdr_plane_pipeline[] = {
 	INTEL_PLANE_CB_POST_CSC_LUT,
 };
 
+static const enum intel_color_block sdr_plane_pipeline[] = {
+	INTEL_PLANE_CB_CSC_FF,
+};
+
+static const u64 intel_plane_supported_csc_ff =
+		BIT(DRM_COLOROP_CSC_FF_YUV601_RGB601) |
+		BIT(DRM_COLOROP_CSC_FF_YUV709_RGB709) |
+		BIT(DRM_COLOROP_CSC_FF_YUV2020_RGB2020) |
+		BIT(DRM_COLOROP_CSC_FF_RGB709_RGB2020);
+
 static bool plane_has_3dlut(struct intel_display *display, enum pipe pipe,
 			    struct drm_plane *plane)
 {
@@ -92,6 +102,12 @@ struct intel_colorop *intel_color_pipeline_plane_add_colorop(struct drm_plane *p
 							  DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
 							  DRM_COLOROP_FLAG_ALLOW_BYPASS);
 		break;
+	case INTEL_PLANE_CB_CSC_FF:
+		ret = drm_plane_colorop_csc_ff_init(dev, &colorop->base, plane,
+						    &intel_colorop_funcs,
+						    intel_plane_supported_csc_ff,
+						    DRM_COLOROP_FLAG_ALLOW_BYPASS);
+		break;
 	default:
 		drm_err(plane->dev, "Invalid colorop id [%d]", id);
 		ret = -EINVAL;
@@ -122,13 +138,17 @@ int _intel_color_pipeline_plane_init(struct drm_plane *plane, struct drm_prop_en
 	int pipeline_len;
 	int ret = 0;
 	int i;
+	bool is_hdr = icl_is_hdr_plane(display, to_intel_plane(plane)->id);
 
 	if (plane_has_3dlut(display, pipe, plane)) {
 		pipeline = xe3plpd_primary_plane_pipeline;
 		pipeline_len = ARRAY_SIZE(xe3plpd_primary_plane_pipeline);
-	} else {
+	} else if (is_hdr) {
 		pipeline = hdr_plane_pipeline;
 		pipeline_len = ARRAY_SIZE(hdr_plane_pipeline);
+	} else {
+		pipeline = sdr_plane_pipeline;
+		pipeline_len = ARRAY_SIZE(sdr_plane_pipeline);
 	}
 
 	for (i = 0; i < pipeline_len; i++) {
diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.h b/drivers/gpu/drm/i915/display/intel_display_limits.h
index 453f7b720815..f4aad54472ce 100644
--- a/drivers/gpu/drm/i915/display/intel_display_limits.h
+++ b/drivers/gpu/drm/i915/display/intel_display_limits.h
@@ -167,6 +167,7 @@ enum aux_ch {
 enum intel_color_block {
 	INTEL_PLANE_CB_PRE_CSC_LUT,
 	INTEL_PLANE_CB_CSC,
+	INTEL_PLANE_CB_CSC_FF,
 	INTEL_PLANE_CB_POST_CSC_LUT,
 	INTEL_PLANE_CB_3DLUT,
 
-- 
2.25.1

[PATCH 03/10] drm/i915/color: Program fixed-function CSC on SDR planes

[Chaitanya Kumar Borah]

Program the fixed-function CSC block for SDR planes based on the
DRM_COLOROP_CSC_FF state.

Track the bypass state explicitly as a boolean in the plane hw state
since bypass is managed separately from the CSC_FF enum value in the
colorop framework.

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
 .../drm/i915/display/intel_display_types.h    |  2 ++
 drivers/gpu/drm/i915/display/intel_plane.c    | 12 ++++++--
 .../drm/i915/display/skl_universal_plane.c    | 30 +++++++++++++++++++
 3 files changed, 42 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index e189f8c39ccb..02b1cee18e4a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -679,6 +679,8 @@ struct intel_plane_state {
 		enum drm_color_range color_range;
 		enum drm_scaling_filter scaling_filter;
 		struct drm_property_blob *ctm, *degamma_lut, *gamma_lut, *lut_3d;
+		enum drm_colorop_csc_ff_type csc_ff_type; /* For SDR plane */
+		bool csc_ff_enable;
 	} hw;
 
 	struct i915_vma *ggtt_vma;
diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
index e06a0618b4c6..c271a0ceb94e 100644
--- a/drivers/gpu/drm/i915/display/intel_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_plane.c
@@ -378,11 +378,19 @@ intel_plane_color_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,
 	while (iter_colorop) {
 		for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
 			if (new_colorop_state->colorop == iter_colorop) {
-				blob = new_colorop_state->bypass ? NULL : new_colorop_state->data;
 				intel_colorop = to_intel_colorop(colorop);
-				changed |= intel_plane_colorop_replace_blob(plane_state,
+				if (intel_colorop->id == INTEL_PLANE_CB_CSC_FF) {
+					plane_state->hw.csc_ff_enable =
+						!new_colorop_state->bypass;
+					plane_state->hw.csc_ff_type =
+						new_colorop_state->csc_ff_type;
+				} else {
+					blob = new_colorop_state->bypass ?
+						NULL : new_colorop_state->data;
+					changed |= intel_plane_colorop_replace_blob(plane_state,
 									    intel_colorop,
 									    blob);
+				}
 			}
 		}
 		iter_colorop = iter_colorop->next;
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 677f1339b7f8..3d96975f97ae 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1239,6 +1239,32 @@ static u32 glk_plane_color_ctl_crtc(const struct intel_crtc_state *crtc_state)
 	return plane_color_ctl;
 }
 
+static u32 intel_csc_ff_type_to_csc_mode(enum drm_colorop_csc_ff_type csc_ff_type,
+					 bool enable)
+{
+	u32 csc_mode = PLANE_COLOR_CSC_MODE_BYPASS;
+
+	if (enable) {
+		switch (csc_ff_type) {
+		case DRM_COLOROP_CSC_FF_YUV601_RGB601:
+			csc_mode = PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
+			break;
+		case DRM_COLOROP_CSC_FF_YUV709_RGB709:
+			csc_mode = PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
+			break;
+		case DRM_COLOROP_CSC_FF_YUV2020_RGB2020:
+			csc_mode = PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
+			break;
+		case DRM_COLOROP_CSC_FF_RGB709_RGB2020:
+			csc_mode = PLANE_COLOR_CSC_MODE_RGB709_TO_RGB2020;
+			break;
+		default:
+			csc_mode = PLANE_COLOR_CSC_MODE_BYPASS;
+		}
+	}
+	return csc_mode;
+}
+
 static u32 glk_plane_color_ctl(const struct intel_plane_state *plane_state)
 {
 	struct intel_display *display = to_intel_display(plane_state);
@@ -1270,6 +1296,10 @@ static u32 glk_plane_color_ctl(const struct intel_plane_state *plane_state)
 			plane_color_ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
 	}
 
+	if (!icl_is_hdr_plane(display, plane->id))
+		plane_color_ctl |= intel_csc_ff_type_to_csc_mode(plane_state->hw.csc_ff_type,
+								plane_state->hw.csc_ff_enable);
+
 	if (plane_state->force_black)
 		plane_color_ctl |= PLANE_COLOR_PLANE_CSC_ENABLE;
 
-- 
2.25.1

[PATCH 04/10] drm/i915/color: Add support for 1D LUT in SDR planes

[Chaitanya Kumar Borah]

Extend the SDR plane color pipeline to include pre- and post-CSC
1D LUT blocks.

SDR planes use a smaller LUT size than HDR planes and therefore
initialize the 1D LUT colorops with the appropriate hardware
capacity.

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color_pipeline.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
index f368a896d2fc..47b3bcec7b18 100644
--- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
+++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
@@ -15,6 +15,7 @@
 #define MAX_COLOROP 4
 #define PLANE_DEGAMMA_SIZE 128
 #define PLANE_GAMMA_SIZE 32
+#define PLANE_DEGAMMA_SIZE_SDR 32
 
 static const struct drm_colorop_funcs intel_colorop_funcs = {
 	.destroy = intel_colorop_destroy,
@@ -44,7 +45,9 @@ static const enum intel_color_block hdr_plane_pipeline[] = {
 };
 
 static const enum intel_color_block sdr_plane_pipeline[] = {
+	INTEL_PLANE_CB_PRE_CSC_LUT,
 	INTEL_PLANE_CB_CSC_FF,
+	INTEL_PLANE_CB_POST_CSC_LUT,
 };
 
 static const u64 intel_plane_supported_csc_ff =
@@ -67,8 +70,10 @@ struct intel_colorop *intel_color_pipeline_plane_add_colorop(struct drm_plane *p
 							     enum intel_color_block id)
 {
 	struct drm_device *dev = plane->dev;
+	struct intel_display *display = to_intel_display(dev);
 	struct intel_colorop *colorop;
 	int ret;
+	bool is_hdr = icl_is_hdr_plane(display, to_intel_plane(plane)->id);
 
 	colorop = intel_colorop_create(id);
 
@@ -80,7 +85,9 @@ struct intel_colorop *intel_color_pipeline_plane_add_colorop(struct drm_plane *p
 		ret = drm_plane_colorop_curve_1d_lut_init(dev,
 							  &colorop->base, plane,
 							  &intel_colorop_funcs,
-							  PLANE_DEGAMMA_SIZE,
+							  is_hdr ?
+							  PLANE_DEGAMMA_SIZE :
+							  PLANE_DEGAMMA_SIZE_SDR,
 							  DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
 							  DRM_COLOROP_FLAG_ALLOW_BYPASS);
 		break;
-- 
2.25.1

[PATCH 05/10] drm/i915/color: Fix HDR pre-CSC LUT programming loop

[Chaitanya Kumar Borah]

From: Pranay Samala <pranay.samala@intel.com>

The integer lut programming loop never executes completely due to
incorrect condition (i++ > 130).

Fix to properly program 129th+ entries for values > 1.0.

Cc: <stable@vger.kernel.org> #v6.19
Fixes: 82caa1c8813f ("drm/i915/color: Program Pre-CSC registers")
Signed-off-by: Pranay Samala <pranay.samala@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index e7950655434b..6d1cffc6d2be 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -3976,7 +3976,7 @@ xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,
 				intel_de_write_dsb(display, dsb,
 						   PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),
 						   (1 << 24));
-			} while (i++ > 130);
+			} while (i++ < 130);
 		} else {
 			for (i = 0; i < lut_size; i++) {
 				u32 v = (i * ((1 << 24) - 1)) / (lut_size - 1);
-- 
2.25.1

[PATCH 06/10] drm/i915/color: Extract HDR pre-CSC LUT programming to helper function

[Chaitanya Kumar Borah]

From: Pranay Samala <pranay.samala@intel.com>

As we prepare to add support for LUT programming in SDR planes,
refactor HDR plane pre-CSC LUT programming to a helper.

Signed-off-by: Pranay Samala <pranay.samala@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 92 ++++++++++++----------
 1 file changed, 51 insertions(+), 41 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 6d1cffc6d2be..17ab4364faea 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -3943,6 +3943,55 @@ xelpd_load_plane_csc_matrix(struct intel_dsb *dsb,
 			   ctm_to_twos_complement(input[11], 0, 12));
 }
 
+static void
+xelpd_load_hdr_pre_csc_lut(struct intel_display *display,
+			   struct intel_dsb *dsb,
+			   enum pipe pipe,
+			   enum plane_id plane,
+			   const struct drm_color_lut32 *pre_csc_lut)
+{
+	u32 lut_size = 128;
+	u32 lut_val;
+	int i;
+
+	intel_de_write_dsb(display, dsb,
+			   PLANE_PRE_CSC_GAMC_INDEX_ENH(pipe, plane, 0),
+			   PLANE_PAL_PREC_AUTO_INCREMENT);
+
+	if (pre_csc_lut) {
+		for (i = 0; i < lut_size; i++) {
+			lut_val = drm_color_lut32_extract(pre_csc_lut[i].green, 24);
+
+			intel_de_write_dsb(display, dsb,
+					   PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),
+					   lut_val);
+		}
+
+		/* Program the max register to clamp values > 1.0. */
+		/* TODO: Restrict to 0x7ffffff */
+		do {
+			intel_de_write_dsb(display, dsb,
+					   PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),
+					   (1 << 24));
+		} while (i++ < 130);
+	} else {
+		for (i = 0; i < lut_size; i++) {
+			lut_val = (i * ((1 << 24) - 1)) / (lut_size - 1);
+
+			intel_de_write_dsb(display, dsb,
+					   PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0), lut_val);
+		}
+
+		do {
+			intel_de_write_dsb(display, dsb,
+					   PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),
+					   1 << 24);
+		} while (i++ < 130);
+	}
+
+	intel_de_write_dsb(display, dsb, PLANE_PRE_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);
+}
+
 static void
 xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,
 				const struct intel_plane_state *plane_state)
@@ -3952,48 +4001,9 @@ xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,
 	enum pipe pipe = to_intel_plane(state->plane)->pipe;
 	enum plane_id plane = to_intel_plane(state->plane)->id;
 	const struct drm_color_lut32 *pre_csc_lut = plane_state->hw.degamma_lut->data;
-	u32 i, lut_size;
 
-	if (icl_is_hdr_plane(display, plane)) {
-		lut_size = 128;
-
-		intel_de_write_dsb(display, dsb,
-				   PLANE_PRE_CSC_GAMC_INDEX_ENH(pipe, plane, 0),
-				   PLANE_PAL_PREC_AUTO_INCREMENT);
-
-		if (pre_csc_lut) {
-			for (i = 0; i < lut_size; i++) {
-				u32 lut_val = drm_color_lut32_extract(pre_csc_lut[i].green, 24);
-
-				intel_de_write_dsb(display, dsb,
-						   PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),
-						   lut_val);
-			}
-
-			/* Program the max register to clamp values > 1.0. */
-			/* TODO: Restrict to 0x7ffffff */
-			do {
-				intel_de_write_dsb(display, dsb,
-						   PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),
-						   (1 << 24));
-			} while (i++ < 130);
-		} else {
-			for (i = 0; i < lut_size; i++) {
-				u32 v = (i * ((1 << 24) - 1)) / (lut_size - 1);
-
-				intel_de_write_dsb(display, dsb,
-						   PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0), v);
-			}
-
-			do {
-				intel_de_write_dsb(display, dsb,
-						   PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),
-						   1 << 24);
-			} while (i++ < 130);
-		}
-
-		intel_de_write_dsb(display, dsb, PLANE_PRE_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);
-	}
+	if (icl_is_hdr_plane(display, plane))
+		xelpd_load_hdr_pre_csc_lut(display, dsb, pipe, plane, pre_csc_lut);
 }
 
 static void
-- 
2.25.1

[PATCH 07/10] drm/i915/color: Program Pre-CSC registers for SDR

[Chaitanya Kumar Borah]

From: Pranay Samala <pranay.samala@intel.com>

Implement plane pre-CSC LUT support for SDR planes.

Signed-off-by: Pranay Samala <pranay.samala@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 55 ++++++++++++++++++++++
 1 file changed, 55 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 17ab4364faea..9f7c2a328868 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -3992,6 +3992,59 @@ xelpd_load_hdr_pre_csc_lut(struct intel_display *display,
 	intel_de_write_dsb(display, dsb, PLANE_PRE_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);
 }
 
+static void
+xelpd_load_sdr_pre_csc_lut(struct intel_display *display,
+			   struct intel_dsb *dsb,
+			   enum pipe pipe,
+			   enum plane_id plane,
+			   const struct drm_color_lut32 *pre_csc_lut)
+{
+	u32 lut_size = 32;
+	u32 lut_val;
+	int i;
+
+	/*
+	 * First 3 planes are HDR, so reduce by 3 to get to the right
+	 * SDR plane offset
+	 */
+	plane = plane - 3;
+
+	intel_de_write_dsb(display, dsb,
+			   PLANE_PRE_CSC_GAMC_INDEX(pipe, plane, 0),
+			   PLANE_PAL_PREC_AUTO_INCREMENT);
+
+	if (pre_csc_lut) {
+		for (i = 0; i < lut_size; i++) {
+			lut_val = drm_color_lut_extract(pre_csc_lut[i].green, 16);
+
+			intel_de_write_dsb(display, dsb,
+					   PLANE_PRE_CSC_GAMC_DATA(pipe, plane, 0),
+					   lut_val);
+		}
+
+		do {
+			intel_de_write_dsb(display, dsb,
+					   PLANE_PRE_CSC_GAMC_DATA(pipe, plane, 0),
+					   (1 << 16));
+		} while (i++ < 34);
+	} else {
+		for (i = 0; i < lut_size; i++) {
+			lut_val = (i * ((1 << 16) - 1)) / (lut_size - 1);
+
+			intel_de_write_dsb(display, dsb,
+					   PLANE_PRE_CSC_GAMC_DATA(pipe, plane, 0), lut_val);
+		}
+
+		do {
+			intel_de_write_dsb(display, dsb,
+					   PLANE_PRE_CSC_GAMC_DATA(pipe, plane, 0),
+					   1 << 16);
+		} while (i++ < 34);
+	}
+
+	intel_de_write_dsb(display, dsb, PLANE_PRE_CSC_GAMC_INDEX(pipe, plane, 0), 0);
+}
+
 static void
 xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,
 				const struct intel_plane_state *plane_state)
@@ -4004,6 +4057,8 @@ xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,
 
 	if (icl_is_hdr_plane(display, plane))
 		xelpd_load_hdr_pre_csc_lut(display, dsb, pipe, plane, pre_csc_lut);
+	else
+		xelpd_load_sdr_pre_csc_lut(display, dsb, pipe, plane, pre_csc_lut);
 }
 
 static void
-- 
2.25.1

[PATCH 08/10] drm/i915/color: Extract HDR post-CSC LUT programming to helper function

[Chaitanya Kumar Borah]

From: Pranay Samala <pranay.samala@intel.com>

Move HDR plane post-CSC LUT programming to improve code organization.

Also removes the segment 0 index register writes as it is not currently
programmed.

Signed-off-by: Pranay Samala <pranay.samala@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 92 +++++++++++-----------
 1 file changed, 48 insertions(+), 44 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 9f7c2a328868..3578606e0ed4 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -4061,6 +4061,52 @@ xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,
 		xelpd_load_sdr_pre_csc_lut(display, dsb, pipe, plane, pre_csc_lut);
 }
 
+static void
+xelpd_load_hdr_post_csc_lut(struct intel_display *display,
+			    struct intel_dsb *dsb,
+			    enum pipe pipe,
+			    enum plane_id plane,
+			    const struct drm_color_lut32 *post_csc_lut)
+{
+	u32 lut_size = 32;
+	u32 lut_val;
+	int i;
+
+	intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0),
+			   PLANE_PAL_PREC_AUTO_INCREMENT);
+
+	if (post_csc_lut) {
+		for (i = 0; i < lut_size; i++) {
+			lut_val = drm_color_lut32_extract(post_csc_lut[i].green, 24);
+
+			intel_de_write_dsb(display, dsb,
+					   PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0),
+					   lut_val);
+		}
+
+		do {
+			intel_de_write_dsb(display, dsb,
+					   PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0),
+					   (1 << 24));
+		} while (i++ < 34);
+	} else {
+		for (i = 0; i < lut_size; i++) {
+			lut_val = (i * ((1 << 24) - 1)) / (lut_size - 1);
+
+			intel_de_write_dsb(display, dsb,
+					   PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0), lut_val);
+		}
+
+		do {
+			intel_de_write_dsb(display, dsb,
+					   PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0),
+					   1 << 24);
+		} while (i++ < 34);
+	}
+
+	intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);
+}
+
 static void
 xelpd_program_plane_post_csc_lut(struct intel_dsb *dsb,
 				 const struct intel_plane_state *plane_state)
@@ -4070,51 +4116,9 @@ xelpd_program_plane_post_csc_lut(struct intel_dsb *dsb,
 	enum pipe pipe = to_intel_plane(state->plane)->pipe;
 	enum plane_id plane = to_intel_plane(state->plane)->id;
 	const struct drm_color_lut32 *post_csc_lut = plane_state->hw.gamma_lut->data;
-	u32 i, lut_size, lut_val;
-
-	if (icl_is_hdr_plane(display, plane)) {
-		intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0),
-				   PLANE_PAL_PREC_AUTO_INCREMENT);
-		/* TODO: Add macro */
-		intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, 0),
-				   PLANE_PAL_PREC_AUTO_INCREMENT);
-		if (post_csc_lut) {
-			lut_size = 32;
-			for (i = 0; i < lut_size; i++) {
-				lut_val = drm_color_lut32_extract(post_csc_lut[i].green, 24);
-
-				intel_de_write_dsb(display, dsb,
-						   PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0),
-						   lut_val);
-			}
-
-			/* Segment 2 */
-			do {
-				intel_de_write_dsb(display, dsb,
-						   PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0),
-						   (1 << 24));
-			} while (i++ < 34);
-		} else {
-			/*TODO: Add for segment 0 */
-			lut_size = 32;
-			for (i = 0; i < lut_size; i++) {
-				u32 v = (i * ((1 << 24) - 1)) / (lut_size - 1);
-
-				intel_de_write_dsb(display, dsb,
-						   PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0), v);
-			}
-
-			do {
-				intel_de_write_dsb(display, dsb,
-						   PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0),
-						   1 << 24);
-			} while (i++ < 34);
-		}
 
-		intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);
-		intel_de_write_dsb(display, dsb,
-				   PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, 0), 0);
-	}
+	if (icl_is_hdr_plane(display, plane))
+		xelpd_load_hdr_post_csc_lut(display, dsb, pipe, plane, post_csc_lut);
 }
 
 static void
-- 
2.25.1

[PATCH 09/10] drm/i915/color: Program Plane Post CSC registers for SDR planes

[Chaitanya Kumar Borah]

From: Pranay Samala <pranay.samala@intel.com>

Implement plane post-CSC LUT support for SDR planes.

Signed-off-by: Pranay Samala <pranay.samala@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 53 ++++++++++++++++++++++
 1 file changed, 53 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 3578606e0ed4..9ff10be40f10 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -4107,6 +4107,57 @@ xelpd_load_hdr_post_csc_lut(struct intel_display *display,
 	intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);
 }
 
+static void
+xelpd_load_sdr_post_csc_lut(struct intel_display *display,
+			    struct intel_dsb *dsb,
+			    enum pipe pipe,
+			    enum plane_id plane,
+			    const struct drm_color_lut32 *post_csc_lut)
+{
+	u32 lut_size = 32;
+	u32 lut_val;
+	int i;
+
+	/*
+	 * First 3 planes are HDR, so reduce by 3 to get to the right
+	 * SDR plane offset
+	 */
+	plane = plane - 3;
+	intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX(pipe, plane, 0),
+			   PLANE_PAL_PREC_AUTO_INCREMENT);
+
+	if (post_csc_lut) {
+		for (i = 0; i < lut_size; i++) {
+			lut_val = drm_color_lut32_extract(post_csc_lut[i].green, 16);
+
+			intel_de_write_dsb(display, dsb,
+					   PLANE_POST_CSC_GAMC_DATA(pipe, plane, 0),
+					   lut_val);
+		}
+
+		do {
+			intel_de_write_dsb(display, dsb,
+					   PLANE_POST_CSC_GAMC_DATA(pipe, plane, 0),
+					   (1 << 16));
+		} while (i++ < 34);
+	} else {
+		for (i = 0; i < lut_size; i++) {
+			lut_val = (i * ((1 << 16) - 1)) / (lut_size - 1);
+
+			intel_de_write_dsb(display, dsb,
+					   PLANE_POST_CSC_GAMC_DATA(pipe, plane, 0), lut_val);
+		}
+
+		do {
+			intel_de_write_dsb(display, dsb,
+					   PLANE_POST_CSC_GAMC_DATA(pipe, plane, 0),
+					   1 << 16);
+		} while (i++ < 34);
+	}
+
+	intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX(pipe, plane, 0), 0);
+}
+
 static void
 xelpd_program_plane_post_csc_lut(struct intel_dsb *dsb,
 				 const struct intel_plane_state *plane_state)
@@ -4119,6 +4170,8 @@ xelpd_program_plane_post_csc_lut(struct intel_dsb *dsb,
 
 	if (icl_is_hdr_plane(display, plane))
 		xelpd_load_hdr_post_csc_lut(display, dsb, pipe, plane, post_csc_lut);
+	else
+		xelpd_load_sdr_post_csc_lut(display, dsb, pipe, plane, post_csc_lut);
 }
 
 static void
-- 
2.25.1

[PATCH 10/10] drm/i915/color: Add color pipeline support for SDR planes

[Chaitanya Kumar Borah]

Now that everything is in place expose the SDR plane color pipeline
to user-space.

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color_pipeline.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
index 47b3bcec7b18..ec1c60bd8bc2 100644
--- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
+++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
@@ -182,17 +182,11 @@ int _intel_color_pipeline_plane_init(struct drm_plane *plane, struct drm_prop_en
 
 int intel_color_pipeline_plane_init(struct drm_plane *plane, enum pipe pipe)
 {
-	struct drm_device *dev = plane->dev;
-	struct intel_display *display = to_intel_display(dev);
 	struct drm_prop_enum_list pipelines[MAX_COLOR_PIPELINES] = {};
 	int len = 0;
 	int ret = 0;
 	int i;
 
-	/* Currently expose pipeline only for HDR planes */
-	if (!icl_is_hdr_plane(display, to_intel_plane(plane)->id))
-		return 0;
-
 	/* Add pipeline consisting of transfer functions */
 	ret = _intel_color_pipeline_plane_init(plane, &pipelines[len], pipe);
 	if (ret)
-- 
2.25.1

✓ CI.KUnit: success for drm/i915/color: Enable SDR plane color pipeline

[Patchwork]

== Series Details ==

Series: drm/i915/color: Enable SDR plane color pipeline
URL   : https://patchwork.freedesktop.org/series/162786/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[02:39:37] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[02:39:42] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[02:40:12] Starting KUnit Kernel (1/1)...
[02:40:12] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[02:40:12] ================== guc_buf (11 subtests) ===================
[02:40:12] [PASSED] test_smallest
[02:40:12] [PASSED] test_largest
[02:40:12] [PASSED] test_granular
[02:40:12] [PASSED] test_unique
[02:40:12] [PASSED] test_overlap
[02:40:12] [PASSED] test_reusable
[02:40:12] [PASSED] test_too_big
[02:40:12] [PASSED] test_flush
[02:40:12] [PASSED] test_lookup
[02:40:12] [PASSED] test_data
[02:40:12] [PASSED] test_class
[02:40:12] ===================== [PASSED] guc_buf =====================
[02:40:12] =================== guc_dbm (7 subtests) ===================
[02:40:12] [PASSED] test_empty
[02:40:12] [PASSED] test_default
[02:40:12] ======================== test_size  ========================
[02:40:12] [PASSED] 4
[02:40:12] [PASSED] 8
[02:40:12] [PASSED] 32
[02:40:12] [PASSED] 256
[02:40:12] ==================== [PASSED] test_size ====================
[02:40:12] ======================= test_reuse  ========================
[02:40:12] [PASSED] 4
[02:40:12] [PASSED] 8
[02:40:12] [PASSED] 32
[02:40:12] [PASSED] 256
[02:40:12] =================== [PASSED] test_reuse ====================
[02:40:12] =================== test_range_overlap  ====================
[02:40:12] [PASSED] 4
[02:40:12] [PASSED] 8
[02:40:12] [PASSED] 32
[02:40:12] [PASSED] 256
[02:40:12] =============== [PASSED] test_range_overlap ================
[02:40:12] =================== test_range_compact  ====================
[02:40:12] [PASSED] 4
[02:40:12] [PASSED] 8
[02:40:12] [PASSED] 32
[02:40:12] [PASSED] 256
[02:40:12] =============== [PASSED] test_range_compact ================
[02:40:12] ==================== test_range_spare  =====================
[02:40:12] [PASSED] 4
[02:40:12] [PASSED] 8
[02:40:12] [PASSED] 32
[02:40:12] [PASSED] 256
[02:40:12] ================ [PASSED] test_range_spare =================
[02:40:12] ===================== [PASSED] guc_dbm =====================
[02:40:12] =================== guc_idm (6 subtests) ===================
[02:40:12] [PASSED] bad_init
[02:40:12] [PASSED] no_init
[02:40:12] [PASSED] init_fini
[02:40:12] [PASSED] check_used
[02:40:12] [PASSED] check_quota
[02:40:12] [PASSED] check_all
[02:40:12] ===================== [PASSED] guc_idm =====================
[02:40:12] ================== no_relay (3 subtests) ===================
[02:40:12] [PASSED] xe_drops_guc2pf_if_not_ready
[02:40:12] [PASSED] xe_drops_guc2vf_if_not_ready
[02:40:12] [PASSED] xe_rejects_send_if_not_ready
[02:40:12] ==================== [PASSED] no_relay =====================
[02:40:12] ================== pf_relay (14 subtests) ==================
[02:40:12] [PASSED] pf_rejects_guc2pf_too_short
[02:40:12] [PASSED] pf_rejects_guc2pf_too_long
[02:40:12] [PASSED] pf_rejects_guc2pf_no_payload
[02:40:12] [PASSED] pf_fails_no_payload
[02:40:12] [PASSED] pf_fails_bad_origin
[02:40:12] [PASSED] pf_fails_bad_type
[02:40:12] [PASSED] pf_txn_reports_error
[02:40:12] [PASSED] pf_txn_sends_pf2guc
[02:40:12] [PASSED] pf_sends_pf2guc
[02:40:12] [SKIPPED] pf_loopback_nop
[02:40:12] [SKIPPED] pf_loopback_echo
[02:40:12] [SKIPPED] pf_loopback_fail
[02:40:12] [SKIPPED] pf_loopback_busy
[02:40:12] [SKIPPED] pf_loopback_retry
[02:40:12] ==================== [PASSED] pf_relay =====================
[02:40:12] ================== vf_relay (3 subtests) ===================
[02:40:12] [PASSED] vf_rejects_guc2vf_too_short
[02:40:12] [PASSED] vf_rejects_guc2vf_too_long
[02:40:12] [PASSED] vf_rejects_guc2vf_no_payload
[02:40:12] ==================== [PASSED] vf_relay =====================
[02:40:12] ================ pf_gt_config (9 subtests) =================
[02:40:12] [PASSED] fair_contexts_1vf
[02:40:12] [PASSED] fair_doorbells_1vf
[02:40:12] [PASSED] fair_ggtt_1vf
[02:40:13] ====================== fair_vram_1vf  ======================
[02:40:13] [PASSED] 3.50 GiB
[02:40:13] [PASSED] 11.5 GiB
[02:40:13] [PASSED] 15.5 GiB
[02:40:13] [PASSED] 31.5 GiB
[02:40:13] [PASSED] 63.5 GiB
[02:40:13] [PASSED] 1.91 GiB
[02:40:13] ================== [PASSED] fair_vram_1vf ==================
[02:40:13] ================ fair_vram_1vf_admin_only  =================
[02:40:13] [PASSED] 3.50 GiB
[02:40:13] [PASSED] 11.5 GiB
[02:40:13] [PASSED] 15.5 GiB
[02:40:13] [PASSED] 31.5 GiB
[02:40:13] [PASSED] 63.5 GiB
[02:40:13] [PASSED] 1.91 GiB
[02:40:13] ============ [PASSED] fair_vram_1vf_admin_only =============
[02:40:13] ====================== fair_contexts  ======================
[02:40:13] [PASSED] 1 VF
[02:40:13] [PASSED] 2 VFs
[02:40:13] [PASSED] 3 VFs
[02:40:13] [PASSED] 4 VFs
[02:40:13] [PASSED] 5 VFs
[02:40:13] [PASSED] 6 VFs
[02:40:13] [PASSED] 7 VFs
[02:40:13] [PASSED] 8 VFs
[02:40:13] [PASSED] 9 VFs
[02:40:13] [PASSED] 10 VFs
[02:40:13] [PASSED] 11 VFs
[02:40:13] [PASSED] 12 VFs
[02:40:13] [PASSED] 13 VFs
[02:40:13] [PASSED] 14 VFs
[02:40:13] [PASSED] 15 VFs
[02:40:13] [PASSED] 16 VFs
[02:40:13] [PASSED] 17 VFs
[02:40:13] [PASSED] 18 VFs
[02:40:13] [PASSED] 19 VFs
[02:40:13] [PASSED] 20 VFs
[02:40:13] [PASSED] 21 VFs
[02:40:13] [PASSED] 22 VFs
[02:40:13] [PASSED] 23 VFs
[02:40:13] [PASSED] 24 VFs
[02:40:13] [PASSED] 25 VFs
[02:40:13] [PASSED] 26 VFs
[02:40:13] [PASSED] 27 VFs
[02:40:13] [PASSED] 28 VFs
[02:40:13] [PASSED] 29 VFs
[02:40:13] [PASSED] 30 VFs
[02:40:13] [PASSED] 31 VFs
[02:40:13] [PASSED] 32 VFs
[02:40:13] [PASSED] 33 VFs
[02:40:13] [PASSED] 34 VFs
[02:40:13] [PASSED] 35 VFs
[02:40:13] [PASSED] 36 VFs
[02:40:13] [PASSED] 37 VFs
[02:40:13] [PASSED] 38 VFs
[02:40:13] [PASSED] 39 VFs
[02:40:13] [PASSED] 40 VFs
[02:40:13] [PASSED] 41 VFs
[02:40:13] [PASSED] 42 VFs
[02:40:13] [PASSED] 43 VFs
[02:40:13] [PASSED] 44 VFs
[02:40:13] [PASSED] 45 VFs
[02:40:13] [PASSED] 46 VFs
[02:40:13] [PASSED] 47 VFs
[02:40:13] [PASSED] 48 VFs
[02:40:13] [PASSED] 49 VFs
[02:40:13] [PASSED] 50 VFs
[02:40:13] [PASSED] 51 VFs
[02:40:13] [PASSED] 52 VFs
[02:40:13] [PASSED] 53 VFs
[02:40:13] [PASSED] 54 VFs
[02:40:13] [PASSED] 55 VFs
[02:40:13] [PASSED] 56 VFs
[02:40:13] [PASSED] 57 VFs
[02:40:13] [PASSED] 58 VFs
[02:40:13] [PASSED] 59 VFs
[02:40:13] [PASSED] 60 VFs
[02:40:13] [PASSED] 61 VFs
[02:40:13] [PASSED] 62 VFs
[02:40:13] [PASSED] 63 VFs
[02:40:13] ================== [PASSED] fair_contexts ==================
[02:40:13] ===================== fair_doorbells  ======================
[02:40:13] [PASSED] 1 VF
[02:40:13] [PASSED] 2 VFs
[02:40:13] [PASSED] 3 VFs
[02:40:13] [PASSED] 4 VFs
[02:40:13] [PASSED] 5 VFs
[02:40:13] [PASSED] 6 VFs
[02:40:13] [PASSED] 7 VFs
[02:40:13] [PASSED] 8 VFs
[02:40:13] [PASSED] 9 VFs
[02:40:13] [PASSED] 10 VFs
[02:40:13] [PASSED] 11 VFs
[02:40:13] [PASSED] 12 VFs
[02:40:13] [PASSED] 13 VFs
[02:40:13] [PASSED] 14 VFs
[02:40:13] [PASSED] 15 VFs
[02:40:13] [PASSED] 16 VFs
[02:40:13] [PASSED] 17 VFs
[02:40:13] [PASSED] 18 VFs
[02:40:13] [PASSED] 19 VFs
[02:40:13] [PASSED] 20 VFs
[02:40:13] [PASSED] 21 VFs
[02:40:13] [PASSED] 22 VFs
[02:40:13] [PASSED] 23 VFs
[02:40:13] [PASSED] 24 VFs
[02:40:13] [PASSED] 25 VFs
[02:40:13] [PASSED] 26 VFs
[02:40:13] [PASSED] 27 VFs
[02:40:13] [PASSED] 28 VFs
[02:40:13] [PASSED] 29 VFs
[02:40:13] [PASSED] 30 VFs
[02:40:13] [PASSED] 31 VFs
[02:40:13] [PASSED] 32 VFs
[02:40:13] [PASSED] 33 VFs
[02:40:13] [PASSED] 34 VFs
[02:40:13] [PASSED] 35 VFs
[02:40:13] [PASSED] 36 VFs
[02:40:13] [PASSED] 37 VFs
[02:40:13] [PASSED] 38 VFs
[02:40:13] [PASSED] 39 VFs
[02:40:13] [PASSED] 40 VFs
[02:40:13] [PASSED] 41 VFs
[02:40:13] [PASSED] 42 VFs
[02:40:13] [PASSED] 43 VFs
[02:40:13] [PASSED] 44 VFs
[02:40:13] [PASSED] 45 VFs
[02:40:13] [PASSED] 46 VFs
[02:40:13] [PASSED] 47 VFs
[02:40:13] [PASSED] 48 VFs
[02:40:13] [PASSED] 49 VFs
[02:40:13] [PASSED] 50 VFs
[02:40:13] [PASSED] 51 VFs
[02:40:13] [PASSED] 52 VFs
[02:40:13] [PASSED] 53 VFs
[02:40:13] [PASSED] 54 VFs
[02:40:13] [PASSED] 55 VFs
[02:40:13] [PASSED] 56 VFs
[02:40:13] [PASSED] 57 VFs
[02:40:13] [PASSED] 58 VFs
[02:40:13] [PASSED] 59 VFs
[02:40:13] [PASSED] 60 VFs
[02:40:13] [PASSED] 61 VFs
[02:40:13] [PASSED] 62 VFs
[02:40:13] [PASSED] 63 VFs
[02:40:13] ================= [PASSED] fair_doorbells ==================
[02:40:13] ======================== fair_ggtt  ========================
[02:40:13] [PASSED] 1 VF
[02:40:13] [PASSED] 2 VFs
[02:40:13] [PASSED] 3 VFs
[02:40:13] [PASSED] 4 VFs
[02:40:13] [PASSED] 5 VFs
[02:40:13] [PASSED] 6 VFs
[02:40:13] [PASSED] 7 VFs
[02:40:13] [PASSED] 8 VFs
[02:40:13] [PASSED] 9 VFs
[02:40:13] [PASSED] 10 VFs
[02:40:13] [PASSED] 11 VFs
[02:40:13] [PASSED] 12 VFs
[02:40:13] [PASSED] 13 VFs
[02:40:13] [PASSED] 14 VFs
[02:40:13] [PASSED] 15 VFs
[02:40:13] [PASSED] 16 VFs
[02:40:13] [PASSED] 17 VFs
[02:40:13] [PASSED] 18 VFs
[02:40:13] [PASSED] 19 VFs
[02:40:13] [PASSED] 20 VFs
[02:40:13] [PASSED] 21 VFs
[02:40:13] [PASSED] 22 VFs
[02:40:13] [PASSED] 23 VFs
[02:40:13] [PASSED] 24 VFs
[02:40:13] [PASSED] 25 VFs
[02:40:13] [PASSED] 26 VFs
[02:40:13] [PASSED] 27 VFs
[02:40:13] [PASSED] 28 VFs
[02:40:13] [PASSED] 29 VFs
[02:40:13] [PASSED] 30 VFs
[02:40:13] [PASSED] 31 VFs
[02:40:13] [PASSED] 32 VFs
[02:40:13] [PASSED] 33 VFs
[02:40:13] [PASSED] 34 VFs
[02:40:13] [PASSED] 35 VFs
[02:40:13] [PASSED] 36 VFs
[02:40:13] [PASSED] 37 VFs
[02:40:13] [PASSED] 38 VFs
[02:40:13] [PASSED] 39 VFs
[02:40:13] [PASSED] 40 VFs
[02:40:13] [PASSED] 41 VFs
[02:40:13] [PASSED] 42 VFs
[02:40:13] [PASSED] 43 VFs
[02:40:13] [PASSED] 44 VFs
[02:40:13] [PASSED] 45 VFs
[02:40:13] [PASSED] 46 VFs
[02:40:13] [PASSED] 47 VFs
[02:40:13] [PASSED] 48 VFs
[02:40:13] [PASSED] 49 VFs
[02:40:13] [PASSED] 50 VFs
[02:40:13] [PASSED] 51 VFs
[02:40:13] [PASSED] 52 VFs
[02:40:13] [PASSED] 53 VFs
[02:40:13] [PASSED] 54 VFs
[02:40:13] [PASSED] 55 VFs
[02:40:13] [PASSED] 56 VFs
[02:40:13] [PASSED] 57 VFs
[02:40:13] [PASSED] 58 VFs
[02:40:13] [PASSED] 59 VFs
[02:40:13] [PASSED] 60 VFs
[02:40:13] [PASSED] 61 VFs
[02:40:13] [PASSED] 62 VFs
[02:40:13] [PASSED] 63 VFs
[02:40:13] ==================== [PASSED] fair_ggtt ====================
[02:40:13] ======================== fair_vram  ========================
[02:40:13] [PASSED] 1 VF
[02:40:13] [PASSED] 2 VFs
[02:40:13] [PASSED] 3 VFs
[02:40:13] [PASSED] 4 VFs
[02:40:13] [PASSED] 5 VFs
[02:40:13] [PASSED] 6 VFs
[02:40:13] [PASSED] 7 VFs
[02:40:13] [PASSED] 8 VFs
[02:40:13] [PASSED] 9 VFs
[02:40:13] [PASSED] 10 VFs
[02:40:13] [PASSED] 11 VFs
[02:40:13] [PASSED] 12 VFs
[02:40:13] [PASSED] 13 VFs
[02:40:13] [PASSED] 14 VFs
[02:40:13] [PASSED] 15 VFs
[02:40:13] [PASSED] 16 VFs
[02:40:13] [PASSED] 17 VFs
[02:40:13] [PASSED] 18 VFs
[02:40:13] [PASSED] 19 VFs
[02:40:13] [PASSED] 20 VFs
[02:40:13] [PASSED] 21 VFs
[02:40:13] [PASSED] 22 VFs
[02:40:13] [PASSED] 23 VFs
[02:40:13] [PASSED] 24 VFs
[02:40:13] [PASSED] 25 VFs
[02:40:13] [PASSED] 26 VFs
[02:40:13] [PASSED] 27 VFs
[02:40:13] [PASSED] 28 VFs
[02:40:13] [PASSED] 29 VFs
[02:40:13] [PASSED] 30 VFs
[02:40:13] [PASSED] 31 VFs
[02:40:13] [PASSED] 32 VFs
[02:40:13] [PASSED] 33 VFs
[02:40:13] [PASSED] 34 VFs
[02:40:13] [PASSED] 35 VFs
[02:40:13] [PASSED] 36 VFs
[02:40:13] [PASSED] 37 VFs
[02:40:13] [PASSED] 38 VFs
[02:40:13] [PASSED] 39 VFs
[02:40:13] [PASSED] 40 VFs
[02:40:13] [PASSED] 41 VFs
[02:40:13] [PASSED] 42 VFs
[02:40:13] [PASSED] 43 VFs
[02:40:13] [PASSED] 44 VFs
[02:40:13] [PASSED] 45 VFs
[02:40:13] [PASSED] 46 VFs
[02:40:13] [PASSED] 47 VFs
[02:40:13] [PASSED] 48 VFs
[02:40:13] [PASSED] 49 VFs
[02:40:13] [PASSED] 50 VFs
[02:40:13] [PASSED] 51 VFs
[02:40:13] [PASSED] 52 VFs
[02:40:13] [PASSED] 53 VFs
[02:40:13] [PASSED] 54 VFs
[02:40:13] [PASSED] 55 VFs
[02:40:13] [PASSED] 56 VFs
[02:40:13] [PASSED] 57 VFs
[02:40:13] [PASSED] 58 VFs
[02:40:13] [PASSED] 59 VFs
[02:40:13] [PASSED] 60 VFs
[02:40:13] [PASSED] 61 VFs
[02:40:13] [PASSED] 62 VFs
[02:40:13] [PASSED] 63 VFs
[02:40:13] ==================== [PASSED] fair_vram ====================
[02:40:13] ================== [PASSED] pf_gt_config ===================
[02:40:13] ===================== lmtt (1 subtest) =====================
[02:40:13] ======================== test_ops  =========================
[02:40:13] [PASSED] 2-level
[02:40:13] [PASSED] multi-level
[02:40:13] ==================== [PASSED] test_ops =====================
[02:40:13] ====================== [PASSED] lmtt =======================
[02:40:13] ================= pf_service (11 subtests) =================
[02:40:13] [PASSED] pf_negotiate_any
[02:40:13] [PASSED] pf_negotiate_base_match
[02:40:13] [PASSED] pf_negotiate_base_newer
[02:40:13] [PASSED] pf_negotiate_base_next
[02:40:13] [SKIPPED] pf_negotiate_base_older
[02:40:13] [PASSED] pf_negotiate_base_prev
[02:40:13] [PASSED] pf_negotiate_latest_match
[02:40:13] [PASSED] pf_negotiate_latest_newer
[02:40:13] [PASSED] pf_negotiate_latest_next
[02:40:13] [SKIPPED] pf_negotiate_latest_older
[02:40:13] [SKIPPED] pf_negotiate_latest_prev
[02:40:13] =================== [PASSED] pf_service ====================
[02:40:13] ================= xe_guc_g2g (2 subtests) ==================
[02:40:13] ============== xe_live_guc_g2g_kunit_default  ==============
[02:40:13] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[02:40:13] ============== xe_live_guc_g2g_kunit_allmem  ===============
[02:40:13] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[02:40:13] =================== [SKIPPED] xe_guc_g2g ===================
[02:40:13] =================== xe_mocs (2 subtests) ===================
[02:40:13] ================ xe_live_mocs_kernel_kunit  ================
[02:40:13] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[02:40:13] ================ xe_live_mocs_reset_kunit  =================
[02:40:13] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[02:40:13] ==================== [SKIPPED] xe_mocs =====================
[02:40:13] ================= xe_migrate (2 subtests) ==================
[02:40:13] ================= xe_migrate_sanity_kunit  =================
[02:40:13] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[02:40:13] ================== xe_validate_ccs_kunit  ==================
[02:40:13] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[02:40:13] =================== [SKIPPED] xe_migrate ===================
[02:40:13] ================== xe_dma_buf (1 subtest) ==================
[02:40:13] ==================== xe_dma_buf_kunit  =====================
[02:40:13] ================ [SKIPPED] xe_dma_buf_kunit ================
[02:40:13] =================== [SKIPPED] xe_dma_buf ===================
[02:40:13] ================= xe_bo_shrink (1 subtest) =================
[02:40:13] =================== xe_bo_shrink_kunit  ====================
[02:40:13] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[02:40:13] ================== [SKIPPED] xe_bo_shrink ==================
[02:40:13] ==================== xe_bo (2 subtests) ====================
[02:40:13] ================== xe_ccs_migrate_kunit  ===================
[02:40:13] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[02:40:13] ==================== xe_bo_evict_kunit  ====================
[02:40:13] =============== [SKIPPED] xe_bo_evict_kunit ================
[02:40:13] ===================== [SKIPPED] xe_bo ======================
[02:40:13] ==================== args (13 subtests) ====================
[02:40:13] [PASSED] count_args_test
[02:40:13] [PASSED] call_args_example
[02:40:13] [PASSED] call_args_test
[02:40:13] [PASSED] drop_first_arg_example
[02:40:13] [PASSED] drop_first_arg_test
[02:40:13] [PASSED] first_arg_example
[02:40:13] [PASSED] first_arg_test
[02:40:13] [PASSED] last_arg_example
[02:40:13] [PASSED] last_arg_test
[02:40:13] [PASSED] pick_arg_example
[02:40:13] [PASSED] if_args_example
[02:40:13] [PASSED] if_args_test
[02:40:13] [PASSED] sep_comma_example
[02:40:13] ====================== [PASSED] args =======================
[02:40:13] =================== xe_pci (3 subtests) ====================
[02:40:13] ==================== check_graphics_ip  ====================
[02:40:13] [PASSED] 12.00 Xe_LP
[02:40:13] [PASSED] 12.10 Xe_LP+
[02:40:13] [PASSED] 12.55 Xe_HPG
[02:40:13] [PASSED] 12.60 Xe_HPC
[02:40:13] [PASSED] 12.70 Xe_LPG
[02:40:13] [PASSED] 12.71 Xe_LPG
[02:40:13] [PASSED] 12.74 Xe_LPG+
[02:40:13] [PASSED] 20.01 Xe2_HPG
[02:40:13] [PASSED] 20.02 Xe2_HPG
[02:40:13] [PASSED] 20.04 Xe2_LPG
[02:40:13] [PASSED] 30.00 Xe3_LPG
[02:40:13] [PASSED] 30.01 Xe3_LPG
[02:40:13] [PASSED] 30.03 Xe3_LPG
[02:40:13] [PASSED] 30.04 Xe3_LPG
[02:40:13] [PASSED] 30.05 Xe3_LPG
[02:40:13] [PASSED] 35.10 Xe3p_LPG
[02:40:13] [PASSED] 35.11 Xe3p_XPC
[02:40:13] ================ [PASSED] check_graphics_ip ================
[02:40:13] ===================== check_media_ip  ======================
[02:40:13] [PASSED] 12.00 Xe_M
[02:40:13] [PASSED] 12.55 Xe_HPM
[02:40:13] [PASSED] 13.00 Xe_LPM+
[02:40:13] [PASSED] 13.01 Xe2_HPM
[02:40:13] [PASSED] 20.00 Xe2_LPM
[02:40:13] [PASSED] 30.00 Xe3_LPM
[02:40:13] [PASSED] 30.02 Xe3_LPM
[02:40:13] [PASSED] 35.00 Xe3p_LPM
[02:40:13] [PASSED] 35.03 Xe3p_HPM
[02:40:13] ================= [PASSED] check_media_ip ==================
[02:40:13] =================== check_platform_desc  ===================
[02:40:13] [PASSED] 0x9A60 (TIGERLAKE)
[02:40:13] [PASSED] 0x9A68 (TIGERLAKE)
[02:40:13] [PASSED] 0x9A70 (TIGERLAKE)
[02:40:13] [PASSED] 0x9A40 (TIGERLAKE)
[02:40:13] [PASSED] 0x9A49 (TIGERLAKE)
[02:40:13] [PASSED] 0x9A59 (TIGERLAKE)
[02:40:13] [PASSED] 0x9A78 (TIGERLAKE)
[02:40:13] [PASSED] 0x9AC0 (TIGERLAKE)
[02:40:13] [PASSED] 0x9AC9 (TIGERLAKE)
[02:40:13] [PASSED] 0x9AD9 (TIGERLAKE)
[02:40:13] [PASSED] 0x9AF8 (TIGERLAKE)
[02:40:13] [PASSED] 0x4C80 (ROCKETLAKE)
[02:40:13] [PASSED] 0x4C8A (ROCKETLAKE)
[02:40:13] [PASSED] 0x4C8B (ROCKETLAKE)
[02:40:13] [PASSED] 0x4C8C (ROCKETLAKE)
[02:40:13] [PASSED] 0x4C90 (ROCKETLAKE)
[02:40:13] [PASSED] 0x4C9A (ROCKETLAKE)
[02:40:13] [PASSED] 0x4680 (ALDERLAKE_S)
[02:40:13] [PASSED] 0x4682 (ALDERLAKE_S)
[02:40:13] [PASSED] 0x4688 (ALDERLAKE_S)
[02:40:13] [PASSED] 0x468A (ALDERLAKE_S)
[02:40:13] [PASSED] 0x468B (ALDERLAKE_S)
[02:40:13] [PASSED] 0x4690 (ALDERLAKE_S)
[02:40:13] [PASSED] 0x4692 (ALDERLAKE_S)
[02:40:13] [PASSED] 0x4693 (ALDERLAKE_S)
[02:40:13] [PASSED] 0x46A0 (ALDERLAKE_P)
[02:40:13] [PASSED] 0x46A1 (ALDERLAKE_P)
[02:40:13] [PASSED] 0x46A2 (ALDERLAKE_P)
[02:40:13] [PASSED] 0x46A3 (ALDERLAKE_P)
[02:40:13] [PASSED] 0x46A6 (ALDERLAKE_P)
[02:40:13] [PASSED] 0x46A8 (ALDERLAKE_P)
[02:40:13] [PASSED] 0x46AA (ALDERLAKE_P)
[02:40:13] [PASSED] 0x462A (ALDERLAKE_P)
[02:40:13] [PASSED] 0x4626 (ALDERLAKE_P)
[02:40:13] [PASSED] 0x4628 (ALDERLAKE_P)
[02:40:13] [PASSED] 0x46B0 (ALDERLAKE_P)
[02:40:13] [PASSED] 0x46B1 (ALDERLAKE_P)
[02:40:13] [PASSED] 0x46B2 (ALDERLAKE_P)
[02:40:13] [PASSED] 0x46B3 (ALDERLAKE_P)
[02:40:13] [PASSED] 0x46C0 (ALDERLAKE_P)
[02:40:13] [PASSED] 0x46C1 (ALDERLAKE_P)
[02:40:13] [PASSED] 0x46C2 (ALDERLAKE_P)
[02:40:13] [PASSED] 0x46C3 (ALDERLAKE_P)
[02:40:13] [PASSED] 0x46D0 (ALDERLAKE_N)
[02:40:13] [PASSED] 0x46D1 (ALDERLAKE_N)
[02:40:13] [PASSED] 0x46D2 (ALDERLAKE_N)
[02:40:13] [PASSED] 0x46D3 (ALDERLAKE_N)
[02:40:13] [PASSED] 0x46D4 (ALDERLAKE_N)
[02:40:13] [PASSED] 0xA721 (ALDERLAKE_P)
[02:40:13] [PASSED] 0xA7A1 (ALDERLAKE_P)
[02:40:13] [PASSED] 0xA7A9 (ALDERLAKE_P)
[02:40:13] [PASSED] 0xA7AC (ALDERLAKE_P)
[02:40:13] [PASSED] 0xA7AD (ALDERLAKE_P)
[02:40:13] [PASSED] 0xA720 (ALDERLAKE_P)
[02:40:13] [PASSED] 0xA7A0 (ALDERLAKE_P)
[02:40:13] [PASSED] 0xA7A8 (ALDERLAKE_P)
[02:40:13] [PASSED] 0xA7AA (ALDERLAKE_P)
[02:40:13] [PASSED] 0xA7AB (ALDERLAKE_P)
[02:40:13] [PASSED] 0xA780 (ALDERLAKE_S)
[02:40:13] [PASSED] 0xA781 (ALDERLAKE_S)
[02:40:13] [PASSED] 0xA782 (ALDERLAKE_S)
[02:40:13] [PASSED] 0xA783 (ALDERLAKE_S)
[02:40:13] [PASSED] 0xA788 (ALDERLAKE_S)
[02:40:13] [PASSED] 0xA789 (ALDERLAKE_S)
[02:40:13] [PASSED] 0xA78A (ALDERLAKE_S)
[02:40:13] [PASSED] 0xA78B (ALDERLAKE_S)
[02:40:13] [PASSED] 0x4905 (DG1)
[02:40:13] [PASSED] 0x4906 (DG1)
[02:40:13] [PASSED] 0x4907 (DG1)
[02:40:13] [PASSED] 0x4908 (DG1)
[02:40:13] [PASSED] 0x4909 (DG1)
[02:40:13] [PASSED] 0x56C0 (DG2)
[02:40:13] [PASSED] 0x56C2 (DG2)
[02:40:13] [PASSED] 0x56C1 (DG2)
[02:40:13] [PASSED] 0x7D51 (METEORLAKE)
[02:40:13] [PASSED] 0x7DD1 (METEORLAKE)
[02:40:13] [PASSED] 0x7D41 (METEORLAKE)
[02:40:13] [PASSED] 0x7D67 (METEORLAKE)
[02:40:13] [PASSED] 0xB640 (METEORLAKE)
[02:40:13] [PASSED] 0x56A0 (DG2)
[02:40:13] [PASSED] 0x56A1 (DG2)
[02:40:13] [PASSED] 0x56A2 (DG2)
[02:40:13] [PASSED] 0x56BE (DG2)
[02:40:13] [PASSED] 0x56BF (DG2)
[02:40:13] [PASSED] 0x5690 (DG2)
[02:40:13] [PASSED] 0x5691 (DG2)
[02:40:13] [PASSED] 0x5692 (DG2)
[02:40:13] [PASSED] 0x56A5 (DG2)
[02:40:13] [PASSED] 0x56A6 (DG2)
[02:40:13] [PASSED] 0x56B0 (DG2)
[02:40:13] [PASSED] 0x56B1 (DG2)
[02:40:13] [PASSED] 0x56BA (DG2)
[02:40:13] [PASSED] 0x56BB (DG2)
[02:40:13] [PASSED] 0x56BC (DG2)
[02:40:13] [PASSED] 0x56BD (DG2)
[02:40:13] [PASSED] 0x5693 (DG2)
[02:40:13] [PASSED] 0x5694 (DG2)
[02:40:13] [PASSED] 0x5695 (DG2)
[02:40:13] [PASSED] 0x56A3 (DG2)
[02:40:13] [PASSED] 0x56A4 (DG2)
[02:40:13] [PASSED] 0x56B2 (DG2)
[02:40:13] [PASSED] 0x56B3 (DG2)
[02:40:13] [PASSED] 0x5696 (DG2)
[02:40:13] [PASSED] 0x5697 (DG2)
[02:40:13] [PASSED] 0xB69 (PVC)
[02:40:13] [PASSED] 0xB6E (PVC)
[02:40:13] [PASSED] 0xBD4 (PVC)
[02:40:13] [PASSED] 0xBD5 (PVC)
[02:40:13] [PASSED] 0xBD6 (PVC)
[02:40:13] [PASSED] 0xBD7 (PVC)
[02:40:13] [PASSED] 0xBD8 (PVC)
[02:40:13] [PASSED] 0xBD9 (PVC)
[02:40:13] [PASSED] 0xBDA (PVC)
[02:40:13] [PASSED] 0xBDB (PVC)
[02:40:13] [PASSED] 0xBE0 (PVC)
[02:40:13] [PASSED] 0xBE1 (PVC)
[02:40:13] [PASSED] 0xBE5 (PVC)
[02:40:13] [PASSED] 0x7D40 (METEORLAKE)
[02:40:13] [PASSED] 0x7D45 (METEORLAKE)
[02:40:13] [PASSED] 0x7D55 (METEORLAKE)
[02:40:13] [PASSED] 0x7D60 (METEORLAKE)
[02:40:13] [PASSED] 0x7DD5 (METEORLAKE)
[02:40:13] [PASSED] 0x6420 (LUNARLAKE)
[02:40:13] [PASSED] 0x64A0 (LUNARLAKE)
[02:40:13] [PASSED] 0x64B0 (LUNARLAKE)
[02:40:13] [PASSED] 0xE202 (BATTLEMAGE)
[02:40:13] [PASSED] 0xE209 (BATTLEMAGE)
[02:40:13] [PASSED] 0xE20B (BATTLEMAGE)
[02:40:13] [PASSED] 0xE20C (BATTLEMAGE)
[02:40:13] [PASSED] 0xE20D (BATTLEMAGE)
[02:40:13] [PASSED] 0xE210 (BATTLEMAGE)
[02:40:13] [PASSED] 0xE211 (BATTLEMAGE)
[02:40:13] [PASSED] 0xE212 (BATTLEMAGE)
[02:40:13] [PASSED] 0xE216 (BATTLEMAGE)
[02:40:13] [PASSED] 0xE220 (BATTLEMAGE)
[02:40:13] [PASSED] 0xE221 (BATTLEMAGE)
[02:40:13] [PASSED] 0xE222 (BATTLEMAGE)
[02:40:13] [PASSED] 0xE223 (BATTLEMAGE)
[02:40:13] [PASSED] 0xB080 (PANTHERLAKE)
[02:40:13] [PASSED] 0xB081 (PANTHERLAKE)
[02:40:13] [PASSED] 0xB082 (PANTHERLAKE)
[02:40:13] [PASSED] 0xB083 (PANTHERLAKE)
[02:40:13] [PASSED] 0xB084 (PANTHERLAKE)
[02:40:13] [PASSED] 0xB085 (PANTHERLAKE)
[02:40:13] [PASSED] 0xB086 (PANTHERLAKE)
[02:40:13] [PASSED] 0xB087 (PANTHERLAKE)
[02:40:13] [PASSED] 0xB08F (PANTHERLAKE)
[02:40:13] [PASSED] 0xB090 (PANTHERLAKE)
[02:40:13] [PASSED] 0xB0A0 (PANTHERLAKE)
[02:40:13] [PASSED] 0xB0B0 (PANTHERLAKE)
[02:40:13] [PASSED] 0xFD80 (PANTHERLAKE)
[02:40:13] [PASSED] 0xFD81 (PANTHERLAKE)
[02:40:13] [PASSED] 0xD740 (NOVALAKE_S)
[02:40:13] [PASSED] 0xD741 (NOVALAKE_S)
[02:40:13] [PASSED] 0xD742 (NOVALAKE_S)
[02:40:13] [PASSED] 0xD743 (NOVALAKE_S)
[02:40:13] [PASSED] 0xD744 (NOVALAKE_S)
[02:40:13] [PASSED] 0xD745 (NOVALAKE_S)
[02:40:13] [PASSED] 0x674C (CRESCENTISLAND)
[02:40:13] [PASSED] 0xD750 (NOVALAKE_P)
[02:40:13] [PASSED] 0xD751 (NOVALAKE_P)
[02:40:13] [PASSED] 0xD752 (NOVALAKE_P)
[02:40:13] [PASSED] 0xD753 (NOVALAKE_P)
[02:40:13] [PASSED] 0xD754 (NOVALAKE_P)
[02:40:13] [PASSED] 0xD755 (NOVALAKE_P)
[02:40:13] [PASSED] 0xD756 (NOVALAKE_P)
[02:40:13] [PASSED] 0xD757 (NOVALAKE_P)
[02:40:13] [PASSED] 0xD75F (NOVALAKE_P)
[02:40:13] =============== [PASSED] check_platform_desc ===============
[02:40:13] ===================== [PASSED] xe_pci ======================
[02:40:13] =================== xe_rtp (2 subtests) ====================
[02:40:13] =============== xe_rtp_process_to_sr_tests  ================
[02:40:13] [PASSED] coalesce-same-reg
[02:40:13] [PASSED] no-match-no-add
[02:40:13] [PASSED] match-or
[02:40:13] [PASSED] match-or-xfail
[02:40:13] [PASSED] no-match-no-add-multiple-rules
[02:40:13] [PASSED] two-regs-two-entries
[02:40:13] [PASSED] clr-one-set-other
[02:40:13] [PASSED] set-field
[02:40:13] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[02:40:13] [PASSED] conflict-not-disjoint
[02:40:13] [PASSED] conflict-reg-type
[02:40:13] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[02:40:13] ================== xe_rtp_process_tests  ===================
[02:40:13] [PASSED] active1
[02:40:13] [PASSED] active2
[02:40:13] [PASSED] active-inactive
[02:40:13] [PASSED] inactive-active
[02:40:13] [PASSED] inactive-1st_or_active-inactive
[02:40:13] [PASSED] inactive-2nd_or_active-inactive
[02:40:13] [PASSED] inactive-last_or_active-inactive
[02:40:13] [PASSED] inactive-no_or_active-inactive
[02:40:13] ============== [PASSED] xe_rtp_process_tests ===============
[02:40:13] ===================== [PASSED] xe_rtp ======================
[02:40:13] ==================== xe_wa (1 subtest) =====================
[02:40:13] ======================== xe_wa_gt  =========================
[02:40:13] [PASSED] TIGERLAKE B0
[02:40:13] [PASSED] DG1 A0
[02:40:13] [PASSED] DG1 B0
[02:40:13] [PASSED] ALDERLAKE_S A0
[02:40:13] [PASSED] ALDERLAKE_S B0
[02:40:13] [PASSED] ALDERLAKE_S C0
[02:40:13] [PASSED] ALDERLAKE_S D0
[02:40:13] [PASSED] ALDERLAKE_P A0
[02:40:13] [PASSED] ALDERLAKE_P B0
[02:40:13] [PASSED] ALDERLAKE_P C0
[02:40:13] [PASSED] ALDERLAKE_S RPLS D0
[02:40:13] [PASSED] ALDERLAKE_P RPLU E0
[02:40:13] [PASSED] DG2 G10 C0
[02:40:13] [PASSED] DG2 G11 B1
[02:40:13] [PASSED] DG2 G12 A1
[02:40:13] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[02:40:13] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[02:40:13] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[02:40:13] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[02:40:13] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[02:40:13] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[02:40:13] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[02:40:13] ==================== [PASSED] xe_wa_gt =====================
[02:40:13] ====================== [PASSED] xe_wa ======================
[02:40:13] ============================================================
[02:40:13] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[02:40:13] Elapsed time: 35.360s total, 4.213s configuring, 30.526s building, 0.611s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[02:40:13] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[02:40:15] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[02:40:39] Starting KUnit Kernel (1/1)...
[02:40:39] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[02:40:39] ============ drm_test_pick_cmdline (2 subtests) ============
[02:40:39] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[02:40:39] =============== drm_test_pick_cmdline_named  ===============
[02:40:39] [PASSED] NTSC
[02:40:39] [PASSED] NTSC-J
[02:40:39] [PASSED] PAL
[02:40:39] [PASSED] PAL-M
[02:40:39] =========== [PASSED] drm_test_pick_cmdline_named ===========
[02:40:39] ============== [PASSED] drm_test_pick_cmdline ==============
[02:40:39] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[02:40:39] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[02:40:39] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[02:40:39] =========== drm_validate_clone_mode (2 subtests) ===========
[02:40:39] ============== drm_test_check_in_clone_mode  ===============
[02:40:39] [PASSED] in_clone_mode
[02:40:39] [PASSED] not_in_clone_mode
[02:40:39] ========== [PASSED] drm_test_check_in_clone_mode ===========
[02:40:39] =============== drm_test_check_valid_clones  ===============
[02:40:39] [PASSED] not_in_clone_mode
[02:40:39] [PASSED] valid_clone
[02:40:39] [PASSED] invalid_clone
[02:40:39] =========== [PASSED] drm_test_check_valid_clones ===========
[02:40:39] ============= [PASSED] drm_validate_clone_mode =============
[02:40:39] ============= drm_validate_modeset (1 subtest) =============
[02:40:39] [PASSED] drm_test_check_connector_changed_modeset
[02:40:39] ============== [PASSED] drm_validate_modeset ===============
[02:40:39] ====== drm_test_bridge_get_current_state (2 subtests) ======
[02:40:39] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[02:40:39] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[02:40:39] ======== [PASSED] drm_test_bridge_get_current_state ========
[02:40:39] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[02:40:39] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[02:40:39] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[02:40:39] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[02:40:39] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[02:40:39] ============== drm_bridge_alloc (2 subtests) ===============
[02:40:39] [PASSED] drm_test_drm_bridge_alloc_basic
[02:40:39] [PASSED] drm_test_drm_bridge_alloc_get_put
[02:40:39] ================ [PASSED] drm_bridge_alloc =================
[02:40:39] ============= drm_cmdline_parser (40 subtests) =============
[02:40:39] [PASSED] drm_test_cmdline_force_d_only
[02:40:39] [PASSED] drm_test_cmdline_force_D_only_dvi
[02:40:39] [PASSED] drm_test_cmdline_force_D_only_hdmi
[02:40:39] [PASSED] drm_test_cmdline_force_D_only_not_digital
[02:40:39] [PASSED] drm_test_cmdline_force_e_only
[02:40:39] [PASSED] drm_test_cmdline_res
[02:40:39] [PASSED] drm_test_cmdline_res_vesa
[02:40:39] [PASSED] drm_test_cmdline_res_vesa_rblank
[02:40:39] [PASSED] drm_test_cmdline_res_rblank
[02:40:39] [PASSED] drm_test_cmdline_res_bpp
[02:40:39] [PASSED] drm_test_cmdline_res_refresh
[02:40:39] [PASSED] drm_test_cmdline_res_bpp_refresh
[02:40:39] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[02:40:39] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[02:40:39] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[02:40:39] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[02:40:39] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[02:40:39] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[02:40:39] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[02:40:39] [PASSED] drm_test_cmdline_res_margins_force_on
[02:40:39] [PASSED] drm_test_cmdline_res_vesa_margins
[02:40:39] [PASSED] drm_test_cmdline_name
[02:40:39] [PASSED] drm_test_cmdline_name_bpp
[02:40:39] [PASSED] drm_test_cmdline_name_option
[02:40:39] [PASSED] drm_test_cmdline_name_bpp_option
[02:40:39] [PASSED] drm_test_cmdline_rotate_0
[02:40:39] [PASSED] drm_test_cmdline_rotate_90
[02:40:39] [PASSED] drm_test_cmdline_rotate_180
[02:40:39] [PASSED] drm_test_cmdline_rotate_270
[02:40:39] [PASSED] drm_test_cmdline_hmirror
[02:40:39] [PASSED] drm_test_cmdline_vmirror
[02:40:39] [PASSED] drm_test_cmdline_margin_options
[02:40:39] [PASSED] drm_test_cmdline_multiple_options
[02:40:39] [PASSED] drm_test_cmdline_bpp_extra_and_option
[02:40:39] [PASSED] drm_test_cmdline_extra_and_option
[02:40:39] [PASSED] drm_test_cmdline_freestanding_options
[02:40:39] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[02:40:39] [PASSED] drm_test_cmdline_panel_orientation
[02:40:39] ================ drm_test_cmdline_invalid  =================
[02:40:39] [PASSED] margin_only
[02:40:39] [PASSED] interlace_only
[02:40:39] [PASSED] res_missing_x
[02:40:39] [PASSED] res_missing_y
[02:40:39] [PASSED] res_bad_y
[02:40:39] [PASSED] res_missing_y_bpp
[02:40:39] [PASSED] res_bad_bpp
[02:40:39] [PASSED] res_bad_refresh
[02:40:39] [PASSED] res_bpp_refresh_force_on_off
[02:40:39] [PASSED] res_invalid_mode
[02:40:39] [PASSED] res_bpp_wrong_place_mode
[02:40:39] [PASSED] name_bpp_refresh
[02:40:39] [PASSED] name_refresh
[02:40:39] [PASSED] name_refresh_wrong_mode
[02:40:39] [PASSED] name_refresh_invalid_mode
[02:40:39] [PASSED] rotate_multiple
[02:40:39] [PASSED] rotate_invalid_val
[02:40:39] [PASSED] rotate_truncated
[02:40:39] [PASSED] invalid_option
[02:40:39] [PASSED] invalid_tv_option
[02:40:39] [PASSED] truncated_tv_option
[02:40:39] ============ [PASSED] drm_test_cmdline_invalid =============
[02:40:39] =============== drm_test_cmdline_tv_options  ===============
[02:40:39] [PASSED] NTSC
[02:40:39] [PASSED] NTSC_443
[02:40:39] [PASSED] NTSC_J
[02:40:39] [PASSED] PAL
[02:40:39] [PASSED] PAL_M
[02:40:39] [PASSED] PAL_N
[02:40:39] [PASSED] SECAM
[02:40:39] [PASSED] MONO_525
[02:40:39] [PASSED] MONO_625
[02:40:39] =========== [PASSED] drm_test_cmdline_tv_options ===========
[02:40:39] =============== [PASSED] drm_cmdline_parser ================
[02:40:39] ========== drmm_connector_hdmi_init (20 subtests) ==========
[02:40:39] [PASSED] drm_test_connector_hdmi_init_valid
[02:40:39] [PASSED] drm_test_connector_hdmi_init_bpc_8
[02:40:39] [PASSED] drm_test_connector_hdmi_init_bpc_10
[02:40:39] [PASSED] drm_test_connector_hdmi_init_bpc_12
[02:40:39] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[02:40:39] [PASSED] drm_test_connector_hdmi_init_bpc_null
[02:40:39] [PASSED] drm_test_connector_hdmi_init_formats_empty
[02:40:39] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[02:40:39] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[02:40:39] [PASSED] supported_formats=0x9 yuv420_allowed=1
[02:40:39] [PASSED] supported_formats=0x9 yuv420_allowed=0
[02:40:39] [PASSED] supported_formats=0x3 yuv420_allowed=1
[02:40:39] [PASSED] supported_formats=0x3 yuv420_allowed=0
[02:40:39] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[02:40:39] [PASSED] drm_test_connector_hdmi_init_null_ddc
[02:40:39] [PASSED] drm_test_connector_hdmi_init_null_product
[02:40:39] [PASSED] drm_test_connector_hdmi_init_null_vendor
[02:40:39] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[02:40:39] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[02:40:39] [PASSED] drm_test_connector_hdmi_init_product_valid
[02:40:39] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[02:40:39] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[02:40:39] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[02:40:39] ========= drm_test_connector_hdmi_init_type_valid  =========
[02:40:39] [PASSED] HDMI-A
[02:40:39] [PASSED] HDMI-B
[02:40:39] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[02:40:39] ======== drm_test_connector_hdmi_init_type_invalid  ========
[02:40:39] [PASSED] Unknown
[02:40:39] [PASSED] VGA
[02:40:39] [PASSED] DVI-I
[02:40:39] [PASSED] DVI-D
[02:40:39] [PASSED] DVI-A
[02:40:39] [PASSED] Composite
[02:40:39] [PASSED] SVIDEO
[02:40:39] [PASSED] LVDS
[02:40:39] [PASSED] Component
[02:40:39] [PASSED] DIN
[02:40:39] [PASSED] DP
[02:40:39] [PASSED] TV
[02:40:39] [PASSED] eDP
[02:40:39] [PASSED] Virtual
[02:40:39] [PASSED] DSI
[02:40:39] [PASSED] DPI
[02:40:39] [PASSED] Writeback
[02:40:39] [PASSED] SPI
[02:40:39] [PASSED] USB
[02:40:39] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[02:40:39] ============ [PASSED] drmm_connector_hdmi_init =============
[02:40:39] ============= drmm_connector_init (3 subtests) =============
[02:40:39] [PASSED] drm_test_drmm_connector_init
[02:40:39] [PASSED] drm_test_drmm_connector_init_null_ddc
[02:40:39] ========= drm_test_drmm_connector_init_type_valid  =========
[02:40:39] [PASSED] Unknown
[02:40:39] [PASSED] VGA
[02:40:39] [PASSED] DVI-I
[02:40:39] [PASSED] DVI-D
[02:40:39] [PASSED] DVI-A
[02:40:39] [PASSED] Composite
[02:40:39] [PASSED] SVIDEO
[02:40:39] [PASSED] LVDS
[02:40:39] [PASSED] Component
[02:40:39] [PASSED] DIN
[02:40:39] [PASSED] DP
[02:40:39] [PASSED] HDMI-A
[02:40:39] [PASSED] HDMI-B
[02:40:39] [PASSED] TV
[02:40:39] [PASSED] eDP
[02:40:39] [PASSED] Virtual
[02:40:39] [PASSED] DSI
[02:40:39] [PASSED] DPI
[02:40:39] [PASSED] Writeback
[02:40:39] [PASSED] SPI
[02:40:39] [PASSED] USB
[02:40:39] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[02:40:39] =============== [PASSED] drmm_connector_init ===============
[02:40:39] ========= drm_connector_dynamic_init (6 subtests) ==========
[02:40:39] [PASSED] drm_test_drm_connector_dynamic_init
[02:40:39] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[02:40:39] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[02:40:39] [PASSED] drm_test_drm_connector_dynamic_init_properties
[02:40:39] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[02:40:39] [PASSED] Unknown
[02:40:39] [PASSED] VGA
[02:40:39] [PASSED] DVI-I
[02:40:39] [PASSED] DVI-D
[02:40:39] [PASSED] DVI-A
[02:40:39] [PASSED] Composite
[02:40:39] [PASSED] SVIDEO
[02:40:39] [PASSED] LVDS
[02:40:39] [PASSED] Component
[02:40:39] [PASSED] DIN
[02:40:39] [PASSED] DP
[02:40:39] [PASSED] HDMI-A
[02:40:39] [PASSED] HDMI-B
[02:40:39] [PASSED] TV
[02:40:39] [PASSED] eDP
[02:40:39] [PASSED] Virtual
[02:40:39] [PASSED] DSI
[02:40:39] [PASSED] DPI
[02:40:39] [PASSED] Writeback
[02:40:39] [PASSED] SPI
[02:40:39] [PASSED] USB
[02:40:39] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[02:40:39] ======== drm_test_drm_connector_dynamic_init_name  =========
[02:40:39] [PASSED] Unknown
[02:40:39] [PASSED] VGA
[02:40:39] [PASSED] DVI-I
[02:40:39] [PASSED] DVI-D
[02:40:39] [PASSED] DVI-A
[02:40:39] [PASSED] Composite
[02:40:39] [PASSED] SVIDEO
[02:40:39] [PASSED] LVDS
[02:40:39] [PASSED] Component
[02:40:39] [PASSED] DIN
[02:40:39] [PASSED] DP
[02:40:39] [PASSED] HDMI-A
[02:40:39] [PASSED] HDMI-B
[02:40:39] [PASSED] TV
[02:40:39] [PASSED] eDP
[02:40:39] [PASSED] Virtual
[02:40:39] [PASSED] DSI
[02:40:39] [PASSED] DPI
[02:40:39] [PASSED] Writeback
[02:40:39] [PASSED] SPI
[02:40:39] [PASSED] USB
[02:40:39] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[02:40:39] =========== [PASSED] drm_connector_dynamic_init ============
[02:40:39] ==== drm_connector_dynamic_register_early (4 subtests) =====
[02:40:39] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[02:40:39] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[02:40:39] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[02:40:39] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[02:40:39] ====== [PASSED] drm_connector_dynamic_register_early =======
[02:40:39] ======= drm_connector_dynamic_register (7 subtests) ========
[02:40:39] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[02:40:39] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[02:40:39] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[02:40:39] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[02:40:39] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[02:40:39] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[02:40:39] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[02:40:39] ========= [PASSED] drm_connector_dynamic_register ==========
[02:40:39] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[02:40:39] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[02:40:39] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[02:40:39] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[02:40:39] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[02:40:39] ========== drm_test_get_tv_mode_from_name_valid  ===========
[02:40:39] [PASSED] NTSC
[02:40:39] [PASSED] NTSC-443
[02:40:39] [PASSED] NTSC-J
[02:40:39] [PASSED] PAL
[02:40:39] [PASSED] PAL-M
[02:40:39] [PASSED] PAL-N
[02:40:39] [PASSED] SECAM
[02:40:39] [PASSED] Mono
[02:40:39] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[02:40:39] [PASSED] drm_test_get_tv_mode_from_name_truncated
[02:40:39] ============ [PASSED] drm_get_tv_mode_from_name ============
[02:40:39] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[02:40:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[02:40:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[02:40:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[02:40:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[02:40:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[02:40:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[02:40:39] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[02:40:39] [PASSED] VIC 96
[02:40:39] [PASSED] VIC 97
[02:40:39] [PASSED] VIC 101
[02:40:39] [PASSED] VIC 102
[02:40:39] [PASSED] VIC 106
[02:40:39] [PASSED] VIC 107
[02:40:39] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[02:40:39] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[02:40:39] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[02:40:39] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[02:40:39] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[02:40:39] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[02:40:39] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[02:40:39] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[02:40:39] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[02:40:39] [PASSED] Automatic
[02:40:39] [PASSED] Full
[02:40:39] [PASSED] Limited 16:235
[02:40:39] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[02:40:39] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[02:40:39] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[02:40:39] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[02:40:39] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[02:40:39] [PASSED] RGB
[02:40:39] [PASSED] YUV 4:2:0
[02:40:39] [PASSED] YUV 4:2:2
[02:40:39] [PASSED] YUV 4:4:4
[02:40:39] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[02:40:39] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[02:40:39] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[02:40:39] ============= drm_damage_helper (21 subtests) ==============
[02:40:39] [PASSED] drm_test_damage_iter_no_damage
[02:40:39] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[02:40:39] [PASSED] drm_test_damage_iter_no_damage_src_moved
[02:40:39] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[02:40:39] [PASSED] drm_test_damage_iter_no_damage_not_visible
[02:40:39] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[02:40:39] [PASSED] drm_test_damage_iter_no_damage_no_fb
[02:40:39] [PASSED] drm_test_damage_iter_simple_damage
[02:40:39] [PASSED] drm_test_damage_iter_single_damage
[02:40:39] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[02:40:39] [PASSED] drm_test_damage_iter_single_damage_outside_src
[02:40:39] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[02:40:39] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[02:40:39] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[02:40:39] [PASSED] drm_test_damage_iter_single_damage_src_moved
[02:40:39] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[02:40:39] [PASSED] drm_test_damage_iter_damage
[02:40:39] [PASSED] drm_test_damage_iter_damage_one_intersect
[02:40:39] [PASSED] drm_test_damage_iter_damage_one_outside
[02:40:39] [PASSED] drm_test_damage_iter_damage_src_moved
[02:40:39] [PASSED] drm_test_damage_iter_damage_not_visible
[02:40:39] ================ [PASSED] drm_damage_helper ================
[02:40:39] ============== drm_dp_mst_helper (3 subtests) ==============
[02:40:39] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[02:40:39] [PASSED] Clock 154000 BPP 30 DSC disabled
[02:40:39] [PASSED] Clock 234000 BPP 30 DSC disabled
[02:40:39] [PASSED] Clock 297000 BPP 24 DSC disabled
[02:40:39] [PASSED] Clock 332880 BPP 24 DSC enabled
[02:40:39] [PASSED] Clock 324540 BPP 24 DSC enabled
[02:40:39] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[02:40:39] ============== drm_test_dp_mst_calc_pbn_div  ===============
[02:40:39] [PASSED] Link rate 2000000 lane count 4
[02:40:39] [PASSED] Link rate 2000000 lane count 2
[02:40:39] [PASSED] Link rate 2000000 lane count 1
[02:40:39] [PASSED] Link rate 1350000 lane count 4
[02:40:39] [PASSED] Link rate 1350000 lane count 2
[02:40:39] [PASSED] Link rate 1350000 lane count 1
[02:40:39] [PASSED] Link rate 1000000 lane count 4
[02:40:39] [PASSED] Link rate 1000000 lane count 2
[02:40:39] [PASSED] Link rate 1000000 lane count 1
[02:40:39] [PASSED] Link rate 810000 lane count 4
[02:40:39] [PASSED] Link rate 810000 lane count 2
[02:40:39] [PASSED] Link rate 810000 lane count 1
[02:40:39] [PASSED] Link rate 540000 lane count 4
[02:40:39] [PASSED] Link rate 540000 lane count 2
[02:40:39] [PASSED] Link rate 540000 lane count 1
[02:40:39] [PASSED] Link rate 270000 lane count 4
[02:40:39] [PASSED] Link rate 270000 lane count 2
[02:40:39] [PASSED] Link rate 270000 lane count 1
[02:40:39] [PASSED] Link rate 162000 lane count 4
[02:40:39] [PASSED] Link rate 162000 lane count 2
[02:40:39] [PASSED] Link rate 162000 lane count 1
[02:40:39] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[02:40:39] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[02:40:39] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[02:40:39] [PASSED] DP_POWER_UP_PHY with port number
[02:40:39] [PASSED] DP_POWER_DOWN_PHY with port number
[02:40:39] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[02:40:39] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[02:40:39] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[02:40:39] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[02:40:39] [PASSED] DP_QUERY_PAYLOAD with port number
[02:40:39] [PASSED] DP_QUERY_PAYLOAD with VCPI
[02:40:39] [PASSED] DP_REMOTE_DPCD_READ with port number
[02:40:39] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[02:40:39] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[02:40:39] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[02:40:39] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[02:40:39] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[02:40:39] [PASSED] DP_REMOTE_I2C_READ with port number
[02:40:39] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[02:40:39] [PASSED] DP_REMOTE_I2C_READ with transactions array
[02:40:39] [PASSED] DP_REMOTE_I2C_WRITE with port number
[02:40:39] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[02:40:39] [PASSED] DP_REMOTE_I2C_WRITE with data array
[02:40:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[02:40:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[02:40:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[02:40:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[02:40:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[02:40:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[02:40:39] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[02:40:39] ================ [PASSED] drm_dp_mst_helper ================
[02:40:39] ================== drm_exec (7 subtests) ===================
[02:40:39] [PASSED] sanitycheck
[02:40:39] [PASSED] test_lock
[02:40:39] [PASSED] test_lock_unlock
[02:40:39] [PASSED] test_duplicates
[02:40:39] [PASSED] test_prepare
[02:40:39] [PASSED] test_prepare_array
[02:40:39] [PASSED] test_multiple_loops
[02:40:39] ==================== [PASSED] drm_exec =====================
[02:40:39] =========== drm_format_helper_test (17 subtests) ===========
[02:40:39] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[02:40:39] [PASSED] single_pixel_source_buffer
[02:40:39] [PASSED] single_pixel_clip_rectangle
[02:40:39] [PASSED] well_known_colors
[02:40:39] [PASSED] destination_pitch
[02:40:39] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[02:40:39] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[02:40:39] [PASSED] single_pixel_source_buffer
[02:40:39] [PASSED] single_pixel_clip_rectangle
[02:40:39] [PASSED] well_known_colors
[02:40:39] [PASSED] destination_pitch
[02:40:39] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[02:40:39] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[02:40:39] [PASSED] single_pixel_source_buffer
[02:40:39] [PASSED] single_pixel_clip_rectangle
[02:40:39] [PASSED] well_known_colors
[02:40:39] [PASSED] destination_pitch
[02:40:39] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[02:40:39] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[02:40:39] [PASSED] single_pixel_source_buffer
[02:40:39] [PASSED] single_pixel_clip_rectangle
[02:40:39] [PASSED] well_known_colors
[02:40:39] [PASSED] destination_pitch
[02:40:39] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[02:40:39] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[02:40:39] [PASSED] single_pixel_source_buffer
[02:40:39] [PASSED] single_pixel_clip_rectangle
[02:40:39] [PASSED] well_known_colors
[02:40:39] [PASSED] destination_pitch
[02:40:39] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[02:40:39] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[02:40:39] [PASSED] single_pixel_source_buffer
[02:40:39] [PASSED] single_pixel_clip_rectangle
[02:40:39] [PASSED] well_known_colors
[02:40:39] [PASSED] destination_pitch
[02:40:39] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[02:40:39] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[02:40:39] [PASSED] single_pixel_source_buffer
[02:40:39] [PASSED] single_pixel_clip_rectangle
[02:40:39] [PASSED] well_known_colors
[02:40:39] [PASSED] destination_pitch
[02:40:39] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[02:40:39] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[02:40:39] [PASSED] single_pixel_source_buffer
[02:40:39] [PASSED] single_pixel_clip_rectangle
[02:40:39] [PASSED] well_known_colors
[02:40:39] [PASSED] destination_pitch
[02:40:39] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[02:40:39] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[02:40:39] [PASSED] single_pixel_source_buffer
[02:40:39] [PASSED] single_pixel_clip_rectangle
[02:40:39] [PASSED] well_known_colors
[02:40:39] [PASSED] destination_pitch
[02:40:39] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[02:40:39] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[02:40:39] [PASSED] single_pixel_source_buffer
[02:40:39] [PASSED] single_pixel_clip_rectangle
[02:40:39] [PASSED] well_known_colors
[02:40:39] [PASSED] destination_pitch
[02:40:39] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[02:40:39] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[02:40:39] [PASSED] single_pixel_source_buffer
[02:40:39] [PASSED] single_pixel_clip_rectangle
[02:40:39] [PASSED] well_known_colors
[02:40:39] [PASSED] destination_pitch
[02:40:39] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[02:40:39] ============== drm_test_fb_xrgb8888_to_mono  ===============
[02:40:39] [PASSED] single_pixel_source_buffer
[02:40:39] [PASSED] single_pixel_clip_rectangle
[02:40:39] [PASSED] well_known_colors
[02:40:39] [PASSED] destination_pitch
[02:40:39] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[02:40:39] ==================== drm_test_fb_swab  =====================
[02:40:39] [PASSED] single_pixel_source_buffer
[02:40:39] [PASSED] single_pixel_clip_rectangle
[02:40:39] [PASSED] well_known_colors
[02:40:39] [PASSED] destination_pitch
[02:40:39] ================ [PASSED] drm_test_fb_swab =================
[02:40:39] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[02:40:39] [PASSED] single_pixel_source_buffer
[02:40:39] [PASSED] single_pixel_clip_rectangle
[02:40:39] [PASSED] well_known_colors
[02:40:39] [PASSED] destination_pitch
[02:40:39] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[02:40:39] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[02:40:39] [PASSED] single_pixel_source_buffer
[02:40:39] [PASSED] single_pixel_clip_rectangle
[02:40:39] [PASSED] well_known_colors
[02:40:39] [PASSED] destination_pitch
[02:40:39] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[02:40:39] ================= drm_test_fb_clip_offset  =================
[02:40:39] [PASSED] pass through
[02:40:39] [PASSED] horizontal offset
[02:40:39] [PASSED] vertical offset
[02:40:39] [PASSED] horizontal and vertical offset
[02:40:39] [PASSED] horizontal offset (custom pitch)
[02:40:39] [PASSED] vertical offset (custom pitch)
[02:40:39] [PASSED] horizontal and vertical offset (custom pitch)
[02:40:39] ============= [PASSED] drm_test_fb_clip_offset =============
[02:40:39] =================== drm_test_fb_memcpy  ====================
[02:40:39] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[02:40:39] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[02:40:39] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[02:40:39] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[02:40:39] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[02:40:39] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[02:40:39] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[02:40:39] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[02:40:39] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[02:40:39] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[02:40:39] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[02:40:39] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[02:40:39] =============== [PASSED] drm_test_fb_memcpy ================
[02:40:39] ============= [PASSED] drm_format_helper_test ==============
[02:40:39] ================= drm_format (18 subtests) =================
[02:40:39] [PASSED] drm_test_format_block_width_invalid
[02:40:39] [PASSED] drm_test_format_block_width_one_plane
[02:40:39] [PASSED] drm_test_format_block_width_two_plane
[02:40:39] [PASSED] drm_test_format_block_width_three_plane
[02:40:39] [PASSED] drm_test_format_block_width_tiled
[02:40:39] [PASSED] drm_test_format_block_height_invalid
[02:40:39] [PASSED] drm_test_format_block_height_one_plane
[02:40:39] [PASSED] drm_test_format_block_height_two_plane
[02:40:39] [PASSED] drm_test_format_block_height_three_plane
[02:40:39] [PASSED] drm_test_format_block_height_tiled
[02:40:39] [PASSED] drm_test_format_min_pitch_invalid
[02:40:39] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[02:40:39] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[02:40:39] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[02:40:39] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[02:40:39] [PASSED] drm_test_format_min_pitch_two_plane
[02:40:39] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[02:40:39] [PASSED] drm_test_format_min_pitch_tiled
[02:40:39] =================== [PASSED] drm_format ====================
[02:40:39] ============== drm_framebuffer (10 subtests) ===============
[02:40:39] ========== drm_test_framebuffer_check_src_coords  ==========
[02:40:39] [PASSED] Success: source fits into fb
[02:40:39] [PASSED] Fail: overflowing fb with x-axis coordinate
[02:40:39] [PASSED] Fail: overflowing fb with y-axis coordinate
[02:40:39] [PASSED] Fail: overflowing fb with source width
[02:40:39] [PASSED] Fail: overflowing fb with source height
[02:40:39] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[02:40:39] [PASSED] drm_test_framebuffer_cleanup
[02:40:39] =============== drm_test_framebuffer_create  ===============
[02:40:39] [PASSED] ABGR8888 normal sizes
[02:40:39] [PASSED] ABGR8888 max sizes
[02:40:39] [PASSED] ABGR8888 pitch greater than min required
[02:40:39] [PASSED] ABGR8888 pitch less than min required
[02:40:39] [PASSED] ABGR8888 Invalid width
[02:40:39] [PASSED] ABGR8888 Invalid buffer handle
[02:40:39] [PASSED] No pixel format
[02:40:39] [PASSED] ABGR8888 Width 0
[02:40:39] [PASSED] ABGR8888 Height 0
[02:40:39] [PASSED] ABGR8888 Out of bound height * pitch combination
[02:40:39] [PASSED] ABGR8888 Large buffer offset
[02:40:39] [PASSED] ABGR8888 Buffer offset for inexistent plane
[02:40:39] [PASSED] ABGR8888 Invalid flag
[02:40:39] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[02:40:39] [PASSED] ABGR8888 Valid buffer modifier
[02:40:39] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[02:40:39] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[02:40:39] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[02:40:39] [PASSED] NV12 Normal sizes
[02:40:39] [PASSED] NV12 Max sizes
[02:40:39] [PASSED] NV12 Invalid pitch
[02:40:39] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[02:40:39] [PASSED] NV12 different  modifier per-plane
[02:40:39] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[02:40:39] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[02:40:39] [PASSED] NV12 Modifier for inexistent plane
[02:40:39] [PASSED] NV12 Handle for inexistent plane
[02:40:39] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[02:40:39] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[02:40:39] [PASSED] YVU420 Normal sizes
[02:40:39] [PASSED] YVU420 Max sizes
[02:40:39] [PASSED] YVU420 Invalid pitch
[02:40:39] [PASSED] YVU420 Different pitches
[02:40:39] [PASSED] YVU420 Different buffer offsets/pitches
[02:40:39] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[02:40:39] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[02:40:39] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[02:40:39] [PASSED] YVU420 Valid modifier
[02:40:39] [PASSED] YVU420 Different modifiers per plane
[02:40:39] [PASSED] YVU420 Modifier for inexistent plane
[02:40:39] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[02:40:39] [PASSED] X0L2 Normal sizes
[02:40:39] [PASSED] X0L2 Max sizes
[02:40:39] [PASSED] X0L2 Invalid pitch
[02:40:39] [PASSED] X0L2 Pitch greater than minimum required
[02:40:39] [PASSED] X0L2 Handle for inexistent plane
[02:40:39] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[02:40:39] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[02:40:39] [PASSED] X0L2 Valid modifier
[02:40:39] [PASSED] X0L2 Modifier for inexistent plane
[02:40:39] =========== [PASSED] drm_test_framebuffer_create ===========
[02:40:39] [PASSED] drm_test_framebuffer_free
[02:40:39] [PASSED] drm_test_framebuffer_init
[02:40:39] [PASSED] drm_test_framebuffer_init_bad_format
[02:40:39] [PASSED] drm_test_framebuffer_init_dev_mismatch
[02:40:39] [PASSED] drm_test_framebuffer_lookup
[02:40:39] [PASSED] drm_test_framebuffer_lookup_inexistent
[02:40:39] [PASSED] drm_test_framebuffer_modifiers_not_supported
[02:40:39] ================= [PASSED] drm_framebuffer =================
[02:40:39] ================ drm_gem_shmem (8 subtests) ================
[02:40:39] [PASSED] drm_gem_shmem_test_obj_create
[02:40:39] [PASSED] drm_gem_shmem_test_obj_create_private
[02:40:39] [PASSED] drm_gem_shmem_test_pin_pages
[02:40:39] [PASSED] drm_gem_shmem_test_vmap
[02:40:39] [PASSED] drm_gem_shmem_test_get_sg_table
[02:40:39] [PASSED] drm_gem_shmem_test_get_pages_sgt
[02:40:39] [PASSED] drm_gem_shmem_test_madvise
[02:40:39] [PASSED] drm_gem_shmem_test_purge
[02:40:39] ================== [PASSED] drm_gem_shmem ==================
[02:40:39] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[02:40:39] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[02:40:39] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[02:40:39] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[02:40:39] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[02:40:39] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[02:40:39] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[02:40:39] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[02:40:39] [PASSED] Automatic
[02:40:39] [PASSED] Full
[02:40:39] [PASSED] Limited 16:235
[02:40:39] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[02:40:39] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[02:40:39] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[02:40:39] [PASSED] drm_test_check_disable_connector
[02:40:39] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[02:40:39] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[02:40:39] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[02:40:39] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[02:40:39] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[02:40:39] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[02:40:39] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[02:40:39] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[02:40:39] [PASSED] drm_test_check_output_bpc_dvi
[02:40:39] [PASSED] drm_test_check_output_bpc_format_vic_1
[02:40:39] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[02:40:39] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[02:40:39] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[02:40:39] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[02:40:39] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[02:40:39] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[02:40:39] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[02:40:39] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[02:40:39] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[02:40:39] [PASSED] drm_test_check_broadcast_rgb_value
[02:40:39] [PASSED] drm_test_check_bpc_8_value
[02:40:39] [PASSED] drm_test_check_bpc_10_value
[02:40:39] [PASSED] drm_test_check_bpc_12_value
[02:40:39] [PASSED] drm_test_check_format_value
[02:40:39] [PASSED] drm_test_check_tmds_char_value
[02:40:39] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[02:40:39] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[02:40:39] [PASSED] drm_test_check_mode_valid
[02:40:39] [PASSED] drm_test_check_mode_valid_reject
[02:40:39] [PASSED] drm_test_check_mode_valid_reject_rate
[02:40:39] [PASSED] drm_test_check_mode_valid_reject_max_clock
[02:40:39] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[02:40:39] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[02:40:39] [PASSED] drm_test_check_infoframes
[02:40:39] [PASSED] drm_test_check_reject_avi_infoframe
[02:40:39] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[02:40:39] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[02:40:39] [PASSED] drm_test_check_reject_audio_infoframe
[02:40:39] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[02:40:39] ================= drm_managed (2 subtests) =================
[02:40:39] [PASSED] drm_test_managed_release_action
[02:40:39] [PASSED] drm_test_managed_run_action
[02:40:39] =================== [PASSED] drm_managed ===================
[02:40:39] =================== drm_mm (6 subtests) ====================
[02:40:39] [PASSED] drm_test_mm_init
[02:40:39] [PASSED] drm_test_mm_debug
[02:40:39] [PASSED] drm_test_mm_align32
[02:40:39] [PASSED] drm_test_mm_align64
[02:40:39] [PASSED] drm_test_mm_lowest
[02:40:39] [PASSED] drm_test_mm_highest
[02:40:39] ===================== [PASSED] drm_mm ======================
[02:40:39] ============= drm_modes_analog_tv (5 subtests) =============
[02:40:39] [PASSED] drm_test_modes_analog_tv_mono_576i
[02:40:39] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[02:40:39] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[02:40:39] [PASSED] drm_test_modes_analog_tv_pal_576i
[02:40:39] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[02:40:39] =============== [PASSED] drm_modes_analog_tv ===============
[02:40:39] ============== drm_plane_helper (2 subtests) ===============
[02:40:39] =============== drm_test_check_plane_state  ================
[02:40:39] [PASSED] clipping_simple
[02:40:39] [PASSED] clipping_rotate_reflect
[02:40:39] [PASSED] positioning_simple
[02:40:39] [PASSED] upscaling
[02:40:39] [PASSED] downscaling
[02:40:39] [PASSED] rounding1
[02:40:39] [PASSED] rounding2
[02:40:39] [PASSED] rounding3
[02:40:39] [PASSED] rounding4
[02:40:39] =========== [PASSED] drm_test_check_plane_state ============
[02:40:39] =========== drm_test_check_invalid_plane_state  ============
[02:40:39] [PASSED] positioning_invalid
[02:40:39] [PASSED] upscaling_invalid
[02:40:39] [PASSED] downscaling_invalid
[02:40:39] ======= [PASSED] drm_test_check_invalid_plane_state ========
[02:40:39] ================ [PASSED] drm_plane_helper =================
[02:40:39] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[02:40:39] ====== drm_test_connector_helper_tv_get_modes_check  =======
[02:40:39] [PASSED] None
[02:40:39] [PASSED] PAL
[02:40:39] [PASSED] NTSC
[02:40:39] [PASSED] Both, NTSC Default
[02:40:39] [PASSED] Both, PAL Default
[02:40:39] [PASSED] Both, NTSC Default, with PAL on command-line
[02:40:39] [PASSED] Both, PAL Default, with NTSC on command-line
[02:40:39] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[02:40:39] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[02:40:39] ================== drm_rect (9 subtests) ===================
[02:40:39] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[02:40:39] [PASSED] drm_test_rect_clip_scaled_not_clipped
[02:40:39] [PASSED] drm_test_rect_clip_scaled_clipped
[02:40:39] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[02:40:39] ================= drm_test_rect_intersect  =================
[02:40:39] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[02:40:39] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[02:40:39] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[02:40:39] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[02:40:39] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[02:40:39] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[02:40:39] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[02:40:39] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[02:40:39] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[02:40:39] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[02:40:39] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[02:40:39] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[02:40:39] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[02:40:39] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[02:40:39] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[02:40:39] ============= [PASSED] drm_test_rect_intersect =============
[02:40:39] ================ drm_test_rect_calc_hscale  ================
[02:40:39] [PASSED] normal use
[02:40:39] [PASSED] out of max range
[02:40:39] [PASSED] out of min range
[02:40:39] [PASSED] zero dst
[02:40:39] [PASSED] negative src
[02:40:39] [PASSED] negative dst
[02:40:39] ============ [PASSED] drm_test_rect_calc_hscale ============
[02:40:39] ================ drm_test_rect_calc_vscale  ================
[02:40:39] [PASSED] normal use
[02:40:39] [PASSED] out of max range
[02:40:39] [PASSED] out of min range
[02:40:39] [PASSED] zero dst
[02:40:39] [PASSED] negative src
[02:40:39] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[02:40:39] ============ [PASSED] drm_test_rect_calc_vscale ============
[02:40:39] ================== drm_test_rect_rotate  ===================
[02:40:39] [PASSED] reflect-x
[02:40:39] [PASSED] reflect-y
[02:40:39] [PASSED] rotate-0
[02:40:39] [PASSED] rotate-90
[02:40:39] [PASSED] rotate-180
[02:40:39] [PASSED] rotate-270
[02:40:39] ============== [PASSED] drm_test_rect_rotate ===============
[02:40:39] ================ drm_test_rect_rotate_inv  =================
[02:40:39] [PASSED] reflect-x
[02:40:39] [PASSED] reflect-y
[02:40:39] [PASSED] rotate-0
[02:40:39] [PASSED] rotate-90
[02:40:39] [PASSED] rotate-180
[02:40:39] [PASSED] rotate-270
[02:40:39] ============ [PASSED] drm_test_rect_rotate_inv =============
[02:40:39] ==================== [PASSED] drm_rect =====================
[02:40:39] ============ drm_sysfb_modeset_test (1 subtest) ============
[02:40:39] ============ drm_test_sysfb_build_fourcc_list  =============
[02:40:39] [PASSED] no native formats
[02:40:39] [PASSED] XRGB8888 as native format
[02:40:39] [PASSED] remove duplicates
[02:40:39] [PASSED] convert alpha formats
[02:40:39] [PASSED] random formats
[02:40:39] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[02:40:39] ============= [PASSED] drm_sysfb_modeset_test ==============
[02:40:39] ================== drm_fixp (2 subtests) ===================
[02:40:39] [PASSED] drm_test_int2fixp
[02:40:39] [PASSED] drm_test_sm2fixp
[02:40:39] ==================== [PASSED] drm_fixp =====================
[02:40:39] ============================================================
[02:40:39] Testing complete. Ran 621 tests: passed: 621
[02:40:39] Elapsed time: 25.961s total, 1.677s configuring, 24.119s building, 0.151s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[02:40:39] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[02:40:41] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[02:40:50] Starting KUnit Kernel (1/1)...
[02:40:50] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[02:40:50] ================= ttm_device (5 subtests) ==================
[02:40:50] [PASSED] ttm_device_init_basic
[02:40:50] [PASSED] ttm_device_init_multiple
[02:40:50] [PASSED] ttm_device_fini_basic
[02:40:50] [PASSED] ttm_device_init_no_vma_man
[02:40:50] ================== ttm_device_init_pools  ==================
[02:40:50] [PASSED] No DMA allocations, no DMA32 required
[02:40:50] [PASSED] DMA allocations, DMA32 required
[02:40:50] [PASSED] No DMA allocations, DMA32 required
[02:40:50] [PASSED] DMA allocations, no DMA32 required
[02:40:50] ============== [PASSED] ttm_device_init_pools ==============
[02:40:50] =================== [PASSED] ttm_device ====================
[02:40:50] ================== ttm_pool (8 subtests) ===================
[02:40:50] ================== ttm_pool_alloc_basic  ===================
[02:40:50] [PASSED] One page
[02:40:50] [PASSED] More than one page
[02:40:50] [PASSED] Above the allocation limit
[02:40:50] [PASSED] One page, with coherent DMA mappings enabled
[02:40:50] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[02:40:50] ============== [PASSED] ttm_pool_alloc_basic ===============
[02:40:50] ============== ttm_pool_alloc_basic_dma_addr  ==============
[02:40:50] [PASSED] One page
[02:40:50] [PASSED] More than one page
[02:40:50] [PASSED] Above the allocation limit
[02:40:50] [PASSED] One page, with coherent DMA mappings enabled
[02:40:50] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[02:40:50] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[02:40:50] [PASSED] ttm_pool_alloc_order_caching_match
[02:40:50] [PASSED] ttm_pool_alloc_caching_mismatch
[02:40:50] [PASSED] ttm_pool_alloc_order_mismatch
[02:40:50] [PASSED] ttm_pool_free_dma_alloc
[02:40:50] [PASSED] ttm_pool_free_no_dma_alloc
[02:40:50] [PASSED] ttm_pool_fini_basic
[02:40:50] ==================== [PASSED] ttm_pool =====================
[02:40:50] ================ ttm_resource (8 subtests) =================
[02:40:50] ================= ttm_resource_init_basic  =================
[02:40:50] [PASSED] Init resource in TTM_PL_SYSTEM
[02:40:50] [PASSED] Init resource in TTM_PL_VRAM
[02:40:50] [PASSED] Init resource in a private placement
[02:40:50] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[02:40:50] ============= [PASSED] ttm_resource_init_basic =============
[02:40:50] [PASSED] ttm_resource_init_pinned
[02:40:50] [PASSED] ttm_resource_fini_basic
[02:40:50] [PASSED] ttm_resource_manager_init_basic
[02:40:50] [PASSED] ttm_resource_manager_usage_basic
[02:40:50] [PASSED] ttm_resource_manager_set_used_basic
[02:40:50] [PASSED] ttm_sys_man_alloc_basic
[02:40:50] [PASSED] ttm_sys_man_free_basic
[02:40:50] ================== [PASSED] ttm_resource ===================
[02:40:50] =================== ttm_tt (15 subtests) ===================
[02:40:50] ==================== ttm_tt_init_basic  ====================
[02:40:50] [PASSED] Page-aligned size
[02:40:50] [PASSED] Extra pages requested
[02:40:50] ================ [PASSED] ttm_tt_init_basic ================
[02:40:50] [PASSED] ttm_tt_init_misaligned
[02:40:50] [PASSED] ttm_tt_fini_basic
[02:40:50] [PASSED] ttm_tt_fini_sg
[02:40:50] [PASSED] ttm_tt_fini_shmem
[02:40:50] [PASSED] ttm_tt_create_basic
[02:40:50] [PASSED] ttm_tt_create_invalid_bo_type
[02:40:50] [PASSED] ttm_tt_create_ttm_exists
[02:40:50] [PASSED] ttm_tt_create_failed
[02:40:50] [PASSED] ttm_tt_destroy_basic
[02:40:50] [PASSED] ttm_tt_populate_null_ttm
[02:40:50] [PASSED] ttm_tt_populate_populated_ttm
[02:40:50] [PASSED] ttm_tt_unpopulate_basic
[02:40:50] [PASSED] ttm_tt_unpopulate_empty_ttm
[02:40:50] [PASSED] ttm_tt_swapin_basic
[02:40:50] ===================== [PASSED] ttm_tt ======================
[02:40:50] =================== ttm_bo (14 subtests) ===================
[02:40:50] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[02:40:50] [PASSED] Cannot be interrupted and sleeps
[02:40:50] [PASSED] Cannot be interrupted, locks straight away
[02:40:50] [PASSED] Can be interrupted, sleeps
[02:40:50] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[02:40:50] [PASSED] ttm_bo_reserve_locked_no_sleep
[02:40:50] [PASSED] ttm_bo_reserve_no_wait_ticket
[02:40:50] [PASSED] ttm_bo_reserve_double_resv
[02:40:50] [PASSED] ttm_bo_reserve_interrupted
[02:40:50] [PASSED] ttm_bo_reserve_deadlock
[02:40:50] [PASSED] ttm_bo_unreserve_basic
[02:40:50] [PASSED] ttm_bo_unreserve_pinned
[02:40:50] [PASSED] ttm_bo_unreserve_bulk
[02:40:50] [PASSED] ttm_bo_fini_basic
[02:40:50] [PASSED] ttm_bo_fini_shared_resv
[02:40:50] [PASSED] ttm_bo_pin_basic
[02:40:50] [PASSED] ttm_bo_pin_unpin_resource
[02:40:50] [PASSED] ttm_bo_multiple_pin_one_unpin
[02:40:50] ===================== [PASSED] ttm_bo ======================
[02:40:50] ============== ttm_bo_validate (21 subtests) ===============
[02:40:50] ============== ttm_bo_init_reserved_sys_man  ===============
[02:40:50] [PASSED] Buffer object for userspace
[02:40:50] [PASSED] Kernel buffer object
[02:40:50] [PASSED] Shared buffer object
[02:40:50] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[02:40:50] ============== ttm_bo_init_reserved_mock_man  ==============
[02:40:50] [PASSED] Buffer object for userspace
[02:40:50] [PASSED] Kernel buffer object
[02:40:50] [PASSED] Shared buffer object
[02:40:50] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[02:40:50] [PASSED] ttm_bo_init_reserved_resv
[02:40:50] ================== ttm_bo_validate_basic  ==================
[02:40:50] [PASSED] Buffer object for userspace
[02:40:50] [PASSED] Kernel buffer object
[02:40:50] [PASSED] Shared buffer object
[02:40:50] ============== [PASSED] ttm_bo_validate_basic ==============
[02:40:50] [PASSED] ttm_bo_validate_invalid_placement
[02:40:50] ============= ttm_bo_validate_same_placement  ==============
[02:40:50] [PASSED] System manager
[02:40:50] [PASSED] VRAM manager
[02:40:50] ========= [PASSED] ttm_bo_validate_same_placement ==========
[02:40:50] [PASSED] ttm_bo_validate_failed_alloc
[02:40:50] [PASSED] ttm_bo_validate_pinned
[02:40:50] [PASSED] ttm_bo_validate_busy_placement
[02:40:50] ================ ttm_bo_validate_multihop  =================
[02:40:50] [PASSED] Buffer object for userspace
[02:40:50] [PASSED] Kernel buffer object
[02:40:50] [PASSED] Shared buffer object
[02:40:50] ============ [PASSED] ttm_bo_validate_multihop =============
[02:40:50] ========== ttm_bo_validate_no_placement_signaled  ==========
[02:40:50] [PASSED] Buffer object in system domain, no page vector
[02:40:50] [PASSED] Buffer object in system domain with an existing page vector
[02:40:50] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[02:40:50] ======== ttm_bo_validate_no_placement_not_signaled  ========
[02:40:50] [PASSED] Buffer object for userspace
[02:40:50] [PASSED] Kernel buffer object
[02:40:50] [PASSED] Shared buffer object
[02:40:50] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[02:40:50] [PASSED] ttm_bo_validate_move_fence_signaled
[02:40:50] ========= ttm_bo_validate_move_fence_not_signaled  =========
[02:40:50] [PASSED] Waits for GPU
[02:40:50] [PASSED] Tries to lock straight away
[02:40:50] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[02:40:50] [PASSED] ttm_bo_validate_happy_evict
[02:40:50] [PASSED] ttm_bo_validate_all_pinned_evict
[02:40:50] [PASSED] ttm_bo_validate_allowed_only_evict
[02:40:50] [PASSED] ttm_bo_validate_deleted_evict
[02:40:50] [PASSED] ttm_bo_validate_busy_domain_evict
[02:40:50] [PASSED] ttm_bo_validate_evict_gutting
[02:40:50] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[02:40:50] ================= [PASSED] ttm_bo_validate =================
[02:40:50] ============================================================
[02:40:50] Testing complete. Ran 101 tests: passed: 101
[02:40:50] Elapsed time: 11.288s total, 1.718s configuring, 9.353s building, 0.187s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/i915/color: Enable SDR plane color pipeline

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 12344 bytes --]

== Series Details ==

Series: drm/i915/color: Enable SDR plane color pipeline
URL   : https://patchwork.freedesktop.org/series/162786/
State : success

== Summary ==

CI Bug Log - changes from xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a_BAT -> xe-pw-162786v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 14)
------------------------------

  Additional (3): bat-wcl-1 bat-dg2-oem2 bat-atsm-2 

Known issues
------------

  Here are the changes found in xe-pw-162786v1_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@fbdev@info:
    - bat-atsm-2:         NOTRUN -> [SKIP][1] ([Intel XE#2134]) +4 other tests skip
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-atsm-2/igt@fbdev@info.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - bat-wcl-1:          NOTRUN -> [SKIP][2] ([Intel XE#7245])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-wcl-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
    - bat-dg2-oem2:       NOTRUN -> [SKIP][3] ([Intel XE#623])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-dg2-oem2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_addfb_basic@invalid-set-prop-any:
    - bat-atsm-2:         NOTRUN -> [SKIP][4] ([i915#6077]) +30 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-atsm-2/igt@kms_addfb_basic@invalid-set-prop-any.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
    - bat-atsm-2:         NOTRUN -> [SKIP][5] ([Intel XE#1024] / [Intel XE#782] / [Intel XE#947]) +5 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-atsm-2/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html

  * igt@kms_dsc@dsc-basic:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][6] ([Intel XE#2244] / [Intel XE#455])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-dg2-oem2/igt@kms_dsc@dsc-basic.html
    - bat-atsm-2:         NOTRUN -> [SKIP][7] ([Intel XE#1024] / [Intel XE#784] / [Intel XE#947])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-atsm-2/igt@kms_dsc@dsc-basic.html
    - bat-wcl-1:          NOTRUN -> [SKIP][8] ([Intel XE#7244])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-wcl-1/igt@kms_dsc@dsc-basic.html

  * igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1:
    - bat-adlp-7:         [PASS][9] -> [DMESG-WARN][10] ([Intel XE#7483])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html

  * igt@kms_frontbuffer_tracking@basic:
    - bat-atsm-2:         NOTRUN -> [SKIP][11] ([Intel XE#1024] / [Intel XE#783] / [Intel XE#947])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-atsm-2/igt@kms_frontbuffer_tracking@basic.html

  * igt@kms_hdmi_inject@inject-audio:
    - bat-atsm-2:         NOTRUN -> [SKIP][12] ([Intel XE#540]) +3 other tests skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-atsm-2/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_pipe_crc_basic@nonblocking-crc:
    - bat-atsm-2:         NOTRUN -> [SKIP][13] ([Intel XE#829] / [i915#1836]) +6 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-atsm-2/igt@kms_pipe_crc_basic@nonblocking-crc.html

  * igt@kms_prop_blob@basic:
    - bat-atsm-2:         NOTRUN -> [SKIP][14] ([Intel XE#780])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-atsm-2/igt@kms_prop_blob@basic.html

  * igt@kms_psr@psr-cursor-plane-move:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][15] ([Intel XE#2850] / [Intel XE#929]) +2 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-dg2-oem2/igt@kms_psr@psr-cursor-plane-move.html

  * igt@kms_psr@psr-primary-page-flip:
    - bat-atsm-2:         NOTRUN -> [SKIP][16] ([Intel XE#1024] / [Intel XE#947]) +6 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-atsm-2/igt@kms_psr@psr-primary-page-flip.html

  * igt@sriov_basic@enable-vfs-autoprobe-off:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][17] ([Intel XE#1091] / [Intel XE#2849]) +1 other test skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-dg2-oem2/igt@sriov_basic@enable-vfs-autoprobe-off.html

  * igt@xe_evict@evict-small-external-cm:
    - bat-wcl-1:          NOTRUN -> [SKIP][18] ([Intel XE#7238]) +11 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-wcl-1/igt@xe_evict@evict-small-external-cm.html

  * igt@xe_exec_balancer@twice-virtual-rebind:
    - bat-wcl-1:          NOTRUN -> [SKIP][19] ([Intel XE#7482]) +17 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-wcl-1/igt@xe_exec_balancer@twice-virtual-rebind.html

  * igt@xe_exec_fault_mode@twice-bindexecqueue-userptr:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][20] ([Intel XE#288]) +32 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-dg2-oem2/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr.html

  * igt@xe_exec_fault_mode@twice-userptr-invalidate-imm:
    - bat-atsm-2:         NOTRUN -> [SKIP][21] ([Intel XE#288]) +32 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-atsm-2/igt@xe_exec_fault_mode@twice-userptr-invalidate-imm.html

  * igt@xe_huc_copy@huc_copy:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][22] ([Intel XE#255])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-dg2-oem2/igt@xe_huc_copy@huc_copy.html
    - bat-atsm-2:         NOTRUN -> [SKIP][23] ([Intel XE#255])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-atsm-2/igt@xe_huc_copy@huc_copy.html

  * igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][24] ([Intel XE#2229])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-dg2-oem2/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
    - bat-atsm-2:         NOTRUN -> [SKIP][25] ([Intel XE#2229])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-atsm-2/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
    - bat-wcl-1:          NOTRUN -> [SKIP][26] ([Intel XE#7239]) +2 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-wcl-1/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html

  * igt@xe_mmap@vram:
    - bat-wcl-1:          NOTRUN -> [SKIP][27] ([Intel XE#7243])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-wcl-1/igt@xe_mmap@vram.html

  * igt@xe_pat@pat-index-xe2:
    - bat-atsm-2:         NOTRUN -> [SKIP][28] ([Intel XE#977])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-atsm-2/igt@xe_pat@pat-index-xe2.html
    - bat-dg2-oem2:       NOTRUN -> [SKIP][29] ([Intel XE#977])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-dg2-oem2/igt@xe_pat@pat-index-xe2.html

  * igt@xe_pat@pat-index-xehpc:
    - bat-wcl-1:          NOTRUN -> [SKIP][30] ([Intel XE#7247])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-wcl-1/igt@xe_pat@pat-index-xehpc.html
    - bat-dg2-oem2:       NOTRUN -> [SKIP][31] ([Intel XE#2838] / [Intel XE#979])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-dg2-oem2/igt@xe_pat@pat-index-xehpc.html
    - bat-atsm-2:         NOTRUN -> [SKIP][32] ([Intel XE#2838] / [Intel XE#979])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-atsm-2/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_pat@pat-index-xelp:
    - bat-wcl-1:          NOTRUN -> [SKIP][33] ([Intel XE#7242])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-wcl-1/igt@xe_pat@pat-index-xelp.html

  * igt@xe_pat@pat-index-xelpg:
    - bat-wcl-1:          NOTRUN -> [SKIP][34] ([Intel XE#7248])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-wcl-1/igt@xe_pat@pat-index-xelpg.html
    - bat-dg2-oem2:       NOTRUN -> [SKIP][35] ([Intel XE#979])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-dg2-oem2/igt@xe_pat@pat-index-xelpg.html
    - bat-atsm-2:         NOTRUN -> [SKIP][36] ([Intel XE#979])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-atsm-2/igt@xe_pat@pat-index-xelpg.html

  * igt@xe_sriov_flr@flr-vf1-clear:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][37] ([Intel XE#3342])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-dg2-oem2/igt@xe_sriov_flr@flr-vf1-clear.html

  
#### Possible fixes ####

  * igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
    - bat-adlp-7:         [DMESG-WARN][38] ([Intel XE#7483]) -> [PASS][39]
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html

  
  [Intel XE#1024]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1024
  [Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
  [Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
  [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
  [Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
  [Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/540
  [Intel XE#623]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/623
  [Intel XE#7238]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7238
  [Intel XE#7239]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7239
  [Intel XE#7242]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7242
  [Intel XE#7243]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7243
  [Intel XE#7244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7244
  [Intel XE#7245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7245
  [Intel XE#7247]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7247
  [Intel XE#7248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7248
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7483]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7483
  [Intel XE#780]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/780
  [Intel XE#782]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/782
  [Intel XE#783]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/783
  [Intel XE#784]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/784
  [Intel XE#829]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/829
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#947]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/947
  [Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
  [Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
  [i915#1836]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1836
  [i915#6077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6077


Build changes
-------------

  * Linux: xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a -> xe-pw-162786v1

  IGT_8783: b5051dc2e867005c758c707312aa9cf9d1dc3291 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a: fce8d7fb2107068c269b868d51aba5f9cf85998a
  xe-pw-162786v1: 162786v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/index.html

[-- Attachment #2: Type: text/html, Size: 14518 bytes --]

✗ Xe.CI.FULL: failure for drm/i915/color: Enable SDR plane color pipeline

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 22102 bytes --]

== Series Details ==

Series: drm/i915/color: Enable SDR plane color pipeline
URL   : https://patchwork.freedesktop.org/series/162786/
State : failure

== Summary ==

CI Bug Log - changes from xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a_FULL -> xe-pw-162786v1_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-162786v1_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-162786v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-162786v1_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_fault_injection@inject-fault-probe-function-xe_tile_init_early:
    - shard-bmg:          [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-bmg-1/igt@xe_fault_injection@inject-fault-probe-function-xe_tile_init_early.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-5/igt@xe_fault_injection@inject-fault-probe-function-xe_tile_init_early.html

  
New tests
---------

  New tests have been introduced between xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a_FULL and xe-pw-162786v1_FULL:

### New IGT tests (62) ###

  * igt@kms_color_pipeline@plane-ctm3x4@pipe-a-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-ctm3x4@pipe-a-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-ctm3x4@pipe-b-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-ctm3x4@pipe-b-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-ctm3x4@pipe-c-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-ctm3x4@pipe-c-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-a-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-a-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-b-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-b-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-c-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-c-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-b-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-b-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-c-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-c-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-d-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-d-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-a-plane-3:
    - Statuses : 1 fail(s) 1 pass(s)
    - Exec time: [0.16, 0.23] s

  * igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-a-plane-4:
    - Statuses : 1 fail(s) 1 pass(s)
    - Exec time: [0.16, 0.23] s

  * igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-b-plane-3:
    - Statuses : 1 fail(s) 1 pass(s)
    - Exec time: [0.17, 0.23] s

  * igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-b-plane-4:
    - Statuses : 1 fail(s) 1 pass(s)
    - Exec time: [0.15, 0.23] s

  * igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-c-plane-3:
    - Statuses : 1 fail(s) 1 pass(s)
    - Exec time: [0.17, 0.18] s

  * igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-c-plane-4:
    - Statuses : 1 fail(s) 1 pass(s)
    - Exec time: [0.16, 0.18] s

  * igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-d-plane-3:
    - Statuses : 1 pass(s)
    - Exec time: [0.16] s

  * igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-d-plane-4:
    - Statuses : 1 pass(s)
    - Exec time: [0.15] s

  * igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-a-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-a-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-b-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-b-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-c-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-c-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-d-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-d-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-a-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-a-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-b-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-b-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-c-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-c-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-d-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-d-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut1d@pipe-a-plane-3:
    - Statuses : 1 fail(s) 1 pass(s)
    - Exec time: [0.16, 0.24] s

  * igt@kms_color_pipeline@plane-lut1d@pipe-a-plane-4:
    - Statuses : 1 fail(s) 1 pass(s)
    - Exec time: [0.16, 0.23] s

  * igt@kms_color_pipeline@plane-lut1d@pipe-b-plane-3:
    - Statuses : 1 fail(s) 1 pass(s)
    - Exec time: [0.16, 0.22] s

  * igt@kms_color_pipeline@plane-lut1d@pipe-b-plane-4:
    - Statuses : 1 fail(s) 1 pass(s)
    - Exec time: [0.16, 0.25] s

  * igt@kms_color_pipeline@plane-lut1d@pipe-c-plane-3:
    - Statuses : 1 fail(s) 1 pass(s)
    - Exec time: [0.16, 0.18] s

  * igt@kms_color_pipeline@plane-lut1d@pipe-c-plane-4:
    - Statuses : 1 fail(s) 1 pass(s)
    - Exec time: [0.16, 0.18] s

  * igt@kms_color_pipeline@plane-lut1d@pipe-d-plane-3:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_color_pipeline@plane-lut1d@pipe-d-plane-4:
    - Statuses : 1 pass(s)
    - Exec time: [0.16] s

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-a-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-a-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-b-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-b-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.0] s

  * igt@kms_pm_rpm@universal-planes-dpms@plane-184:
    - Statuses : 2 pass(s)
    - Exec time: [2.47, 7.87] s

  * igt@kms_pm_rpm@universal-planes@plane-184:
    - Statuses : 2 pass(s)
    - Exec time: [2.54, 7.84] s

  

Known issues
------------

  Here are the changes found in xe-pw-162786v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-180:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#1124])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-8/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html

  * igt@kms_bw@linear-tiling-4-displays-3840x2160p:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#367] / [Intel XE#7354])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-8/igt@kms_bw@linear-tiling-4-displays-3840x2160p.html

  * {igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-4} (NEW):
    - shard-lnl:          NOTRUN -> [SKIP][5] ([Intel XE#6969]) +34 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-lnl-1/igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-4.html

  * {igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-a-plane-3} (NEW):
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#6969]) +30 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-2/igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-a-plane-3.html

  * {igt@kms_color_pipeline@plane-lut1d@pipe-b-plane-4} (NEW):
    - shard-lnl:          NOTRUN -> [FAIL][7] ([Intel XE#7305]) +11 other tests fail
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-lnl-8/igt@kms_color_pipeline@plane-lut1d@pipe-b-plane-4.html

  * {igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-4} (NEW):
    - shard-lnl:          NOTRUN -> [SKIP][8] ([Intel XE#6969] / [Intel XE#7006])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-lnl-4/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-4.html

  * {igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-4} (NEW):
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#6969] / [Intel XE#7006])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-9/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-4.html

  * igt@kms_fbcon_fbt@psr:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#6126] / [Intel XE#776])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-8/igt@kms_fbcon_fbt@psr.html

  * igt@kms_flip@2x-dpms-vs-vblank-race-interruptible:
    - shard-bmg:          [PASS][11] -> [FAIL][12] ([Intel XE#3098]) +1 other test fail
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-bmg-9/igt@kms_flip@2x-dpms-vs-vblank-race-interruptible.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-1/igt@kms_flip@2x-dpms-vs-vblank-race-interruptible.html

  * igt@kms_flip@basic-flip-vs-dpms@a-hdmi-a3:
    - shard-bmg:          [PASS][13] -> [ABORT][14] ([Intel XE#5545] / [Intel XE#6652]) +1 other test abort
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-bmg-6/igt@kms_flip@basic-flip-vs-dpms@a-hdmi-a3.html
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-2/igt@kms_flip@basic-flip-vs-dpms@a-hdmi-a3.html

  * igt@kms_flip@flip-vs-suspend@c-dp2:
    - shard-bmg:          [PASS][15] -> [INCOMPLETE][16] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-bmg-3/igt@kms_flip@flip-vs-suspend@c-dp2.html
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-5/igt@kms_flip@flip-vs-suspend@c-dp2.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#4141])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#2311])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#2313])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#1489])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-8/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area.html

  * igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-dyn-priority:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#6874])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-8/igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-dyn-priority.html

  * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma:
    - shard-lnl:          [PASS][22] -> [FAIL][23] ([Intel XE#5625])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-lnl-1/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-lnl-8/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html

  * igt@xe_exec_threads@threads-multi-queue-cm-fd-basic:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#7138])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-8/igt@xe_exec_threads@threads-multi-queue-cm-fd-basic.html

  * igt@xe_pm@d3cold-i2c:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#5694] / [Intel XE#7370])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-8/igt@xe_pm@d3cold-i2c.html

  
#### Possible fixes ####

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-bmg:          [FAIL][26] ([Intel XE#7545]) -> [PASS][27]
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-bmg-9/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-9/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-lnl:          [FAIL][28] ([Intel XE#301]) -> [PASS][29] +2 other tests pass
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a3:
    - shard-bmg:          [FAIL][30] -> [PASS][31]
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-bmg-9/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a3.html
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-9/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a3.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [SKIP][32] ([Intel XE#1503]) -> [PASS][33]
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-bmg-9/igt@kms_hdr@invalid-hdr.html
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-1/igt@kms_hdr@invalid-hdr.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [INCOMPLETE][34] ([Intel XE#6321]) -> [PASS][35]
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-bmg-7/igt@xe_evict@evict-mixed-many-threads-small.html
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-2/igt@xe_evict@evict-mixed-many-threads-small.html

  
#### Warnings ####

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-2:
    - shard-lnl:          [SKIP][36] ([Intel XE#6969] / [Intel XE#7006]) -> [SKIP][37] ([Intel XE#6969])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-lnl-4/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-2.html
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-lnl-4/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-2.html

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-2:
    - shard-bmg:          [SKIP][38] ([Intel XE#6969] / [Intel XE#7006]) -> [SKIP][39] ([Intel XE#6969])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-bmg-9/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-2.html
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-9/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-2.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][40] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][41] ([Intel XE#3544])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-bmg-3/igt@kms_hdr@brightness-with-hdr.html
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-2/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][42] ([Intel XE#2426] / [Intel XE#5848]) -> [SKIP][43] ([Intel XE#2509] / [Intel XE#7437])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/shard-bmg-10/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
  [Intel XE#5694]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5694
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#6126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6126
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6652
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
  [Intel XE#7006]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7006
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7305]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7305
  [Intel XE#7354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7354
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
  [Intel XE#7545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7545
  [Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776


Build changes
-------------

  * Linux: xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a -> xe-pw-162786v1

  IGT_8783: b5051dc2e867005c758c707312aa9cf9d1dc3291 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a: fce8d7fb2107068c269b868d51aba5f9cf85998a
  xe-pw-162786v1: 162786v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v1/index.html

[-- Attachment #2: Type: text/html, Size: 25934 bytes --]