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From: "Anoop, Vijay" <anoop.c.vijay@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: umesh.nerlige.ramappa@intel.com, badal.nilawar@intel.com,
	rodrigo.vivi@intel.com, aravind.iddamsetty@intel.com,
	riana.tauro@intel.com, anshuman.gupta@intel.com,
	matthew.d.roper@intel.com, michael.j.ruhl@intel.com,
	paul.e.luse@intel.com, mohamed.mansoor.v@intel.com,
	kam.nasim@intel.com, anoop.c.vijay@intel.com
Subject: [PATCH v11 7/7] drm/xe/xe_pci: Enable System Controller support on CRI platform
Date: Thu, 19 Mar 2026 10:30:37 -0700	[thread overview]
Message-ID: <20260319173031.1320708-16-anoop.c.vijay@intel.com> (raw)
In-Reply-To: <20260319173031.1320708-9-anoop.c.vijay@intel.com>

From: Anoop Vijay <anoop.c.vijay@intel.com>

Enable System Controller support on CRI by setting has_sysctrl capability
flag in device descriptor and runtime device information.

This allows sysctrl subsystem and mailbox communication to be initialized
on CRI platforms.

Signed-off-by: Anoop Vijay <anoop.c.vijay@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
v8: (Matt, Michal)
- Reordered patches for logical flow

v10: (Riana)
- Cleaned up commit message
---
 drivers/gpu/drm/xe/xe_pci.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 189e2a1c29f9..f5dd77b6680f 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -465,6 +465,7 @@ static const struct xe_device_desc cri_desc = {
 	.has_soc_remapper_sysctrl = true,
 	.has_soc_remapper_telem = true,
 	.has_sriov = true,
+	.has_sysctrl = true,
 	.max_gt_per_tile = 2,
 	MULTI_LRC_MASK,
 	.require_force_probe = true,
@@ -764,6 +765,7 @@ static int xe_info_init_early(struct xe_device *xe,
 	xe->info.has_soc_remapper_telem = desc->has_soc_remapper_telem;
 	xe->info.has_sriov = xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.dev)) &&
 		desc->has_sriov;
+	xe->info.has_sysctrl = desc->has_sysctrl;
 	xe->info.skip_guc_pc = desc->skip_guc_pc;
 	xe->info.skip_mtcfg = desc->skip_mtcfg;
 	xe->info.skip_pcode = desc->skip_pcode;
-- 
2.43.0


  parent reply	other threads:[~2026-03-19 17:31 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-19 17:30 [PATCH v11 0/7] drm/xe/xe_sysctrl: Add system controller component for Xe3p dGPU platforms Anoop, Vijay
2026-03-19 17:30 ` [PATCH v11 1/7] drm/xe/xe_sysctrl: Add System Controller types and device integration Anoop, Vijay
2026-03-19 17:30 ` [PATCH v11 2/7] drm/xe/xe_sysctrl: Add System Controller mailbox register definitions Anoop, Vijay
2026-03-19 17:30 ` [PATCH v11 3/7] drm/xe/xe_sysctrl: Add ABI and mailbox interface headers Anoop, Vijay
2026-03-19 17:30 ` [PATCH v11 4/7] drm/xe/xe_sysctrl: Add System Controller initialization support Anoop, Vijay
2026-03-19 17:30 ` [PATCH v11 5/7] drm/xe/xe_sysctrl: Add System Controller mailbox communication support Anoop, Vijay
2026-03-19 17:30 ` [PATCH v11 6/7] drm/xe/xe_sysctrl: Add System Controller power management support Anoop, Vijay
2026-03-20  8:35   ` Nilawar, Badal
2026-03-19 17:30 ` Anoop, Vijay [this message]
2026-03-19 17:37 ` ✗ CI.checkpatch: warning for drm/xe/xe_sysctrl: Add system controller component for Xe3p dGPU platforms (rev2) Patchwork
2026-03-19 17:38 ` ✓ CI.KUnit: success " Patchwork
2026-03-19 18:13 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-20 17:37 ` ✗ Xe.CI.FULL: failure " Patchwork

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