From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 42F961099B42 for ; Fri, 20 Mar 2026 20:54:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D77E210E1F6; Fri, 20 Mar 2026 20:54:52 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Z3D/sE/t"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5F91210E1F6 for ; Fri, 20 Mar 2026 20:54:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774040091; x=1805576091; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NvhQCs4aQGtqO2namQj6cHbr7MQ3SwSVn2xV2ogny8Q=; b=Z3D/sE/trSZ3ivf/hyZfVsS9UF3sJJ9fuujWbSbadvBoq7g3XyBFdGCh xdVS5q/7JonRuKT10tbp/pWqxpyxFwXSkzLsKdoO6lJtqHZV+u+QVY4PM 0aF3i+E8kz64OVEbBx7FvY2hv+y04YsFbgaiKG/stD7PBnlW49gfc4i+O EYMPMHTzTqicz2FO1GGMSzETkxZryh5AxeryoY6Qh5B/IoRLN3F8Q/j6p XRH1wu5DbmW9f0dTM/Hcak9COMTv1/XaHoQmdm7EDW7dYHRMDWcFk15KJ KY5cgW7QVVq0lO0d9VlvuOmVW60zizG9EXXb5AV7D6YFpi+aL5w52jAcQ A==; X-CSE-ConnectionGUID: 2uANjIHXTkih3WltayNhYg== X-CSE-MsgGUID: Hbuk3A+KSyqhwPIAjOwG2w== X-IronPort-AV: E=McAfee;i="6800,10657,11735"; a="62693875" X-IronPort-AV: E=Sophos;i="6.23,130,1770624000"; d="scan'208";a="62693875" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Mar 2026 13:54:51 -0700 X-CSE-ConnectionGUID: o/uSmMVjSIWAXUWg4dn/5A== X-CSE-MsgGUID: MNxkDzDJSfScQamJWBjGeA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,130,1770624000"; d="scan'208";a="223425725" Received: from dut4407arlh.fm.intel.com ([10.105.10.118]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Mar 2026 13:54:50 -0700 From: Stuart Summers To: Cc: piotr.piorkowski@intel.com, michal.wajdeczko@intel.com, michal.winiarski@intel.com, niranjana.vishwanathapura@intel.com, intel-xe@lists.freedesktop.org, Stuart Summers Subject: [PATCH 1/2] drm/xe: Add an assert that the TLB invalidation op is available Date: Fri, 20 Mar 2026 20:54:41 +0000 Message-ID: <20260320205448.95132-2-stuart.summers@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260320205448.95132-1-stuart.summers@intel.com> References: <20260320205448.95132-1-stuart.summers@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" Basically, it is the responsibility of the caller to ensure the given TLB invalidation operation is available before calling it. Signed-off-by: Stuart Summers --- drivers/gpu/drm/xe/xe_tlb_inval.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c index 10dcd4abb00f..3bcdeecfa3d8 100644 --- a/drivers/gpu/drm/xe/xe_tlb_inval.c +++ b/drivers/gpu/drm/xe/xe_tlb_inval.c @@ -271,6 +271,7 @@ static void xe_tlb_inval_fence_prep(struct xe_tlb_inval_fence *fence) int __ret; \ \ xe_assert((__tlb_inval)->xe, (__tlb_inval)->ops); \ + xe_assert((__tlb_inval)->xe, (op)); \ xe_assert((__tlb_inval)->xe, (__fence)); \ \ mutex_lock(&(__tlb_inval)->seqno_lock); \ -- 2.43.0