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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
Subject: [PATCH 1/9] drm/i915/wm: Reject SAGV consistently when block_time_us==0
Date: Tue, 24 Mar 2026 15:48:35 +0200	[thread overview]
Message-ID: <20260324134843.2364-2-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20260324134843.2364-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We have three ways for the platform to indicate that
SAGV is not supported:
- pcode returns zero block time
- pcode returns only a single QGV point (icl+)
- pcode rejects the SAGV enable/disable command (pre-icl)

We don't currently consider all those factors when computing
pipe_sagv_reject, meaning we might still try to enable
SAGV when we should not.

I think one plausible scenario is when pcode returns a
zero block time, and all the pipes are disabled. In
that case intel_crtc_can_enable_sagv() will return true
for all pipes, and thus we might try to enable SAGV
despite pcode indicating that it's not supported.

Make sure pipe_sagv_reject will consistently reject
SAGV when our cached block time is zero. That will cover
all the aforementioned mechanisms by which SAGV can be
disabled.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index d45b3bcc6ef0..09988f46e083 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -308,9 +308,6 @@ static bool skl_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state)
 	enum plane_id plane_id;
 	int max_level = INT_MAX;
 
-	if (!intel_has_sagv(display))
-		return false;
-
 	if (!crtc_state->hw.active)
 		return true;
 
@@ -377,6 +374,9 @@ bool intel_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(crtc_state);
 
+	if (!display->sagv.block_time_us)
+		return false;
+
 	if (!display->params.enable_sagv)
 		return false;
 
-- 
2.52.0


  reply	other threads:[~2026-03-24 13:48 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-24 13:48 [PATCH 0/9] drm/i915/wm: Watermark/SAGV fixes/cleanups/etc Ville Syrjala
2026-03-24 13:48 ` Ville Syrjala [this message]
2026-04-08  9:56   ` [PATCH 1/9] drm/i915/wm: Reject SAGV consistently when block_time_us==0 Govindapillai, Vinod
2026-03-24 13:48 ` [PATCH 2/9] drm/i915/wm: Don't compute separate SAGV watermarks for RKL Ville Syrjala
2026-04-08 11:48   ` Govindapillai, Vinod
2026-03-24 13:48 ` [PATCH 3/9] drm/i915/wm: Consolidate SAGV pipe active/interlace checks to common code Ville Syrjala
2026-04-08 11:49   ` Govindapillai, Vinod
2026-03-24 13:48 ` [PATCH 4/9] drm/i915/wm: Verify the correct plane DDB entry Ville Syrjala
2026-04-08 11:53   ` Govindapillai, Vinod
2026-03-24 13:48 ` [PATCH 5/9] drm/i915/wm: Extract skl_wm_level_verify() Ville Syrjala
2026-04-08 11:55   ` Govindapillai, Vinod
2026-03-24 13:48 ` [PATCH 6/9] drm/i915/wm: Extract skl_ddb_entry_verify() Ville Syrjala
2026-04-08 11:57   ` Govindapillai, Vinod
2026-03-24 13:48 ` [PATCH 7/9] drm/i915/wm: Verify 'ddb_y' as well as 'ddb' Ville Syrjala
2026-04-08 11:59   ` Govindapillai, Vinod
2026-03-24 13:48 ` [PATCH 8/9] drm/i915/wm: Reduce copy-pasta in skl_print_plane_wm_changes() Ville Syrjala
2026-04-08 12:04   ` Govindapillai, Vinod
2026-03-24 13:48 ` [PATCH 9/9] drm/i915/wm: Allow SAGV with multiple pipes on pre-icl Ville Syrjala
2026-04-08 12:10   ` Govindapillai, Vinod
2026-03-24 13:58 ` ✗ CI.checkpatch: warning for drm/i915/wm: Watermark/SAGV fixes/cleanups/etc Patchwork
2026-03-24 14:00 ` ✓ CI.KUnit: success " Patchwork
2026-03-24 14:40 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-25  2:08 ` ✓ Xe.CI.FULL: " Patchwork

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