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* [PATCH] drm/xe: use the asid based invalidation
@ 2026-03-26 21:29 Xin Wang
  2026-03-26 22:04 ` ✓ CI.KUnit: success for " Patchwork
  2026-03-26 22:38 ` ✓ Xe.CI.BAT: " Patchwork
  0 siblings, 2 replies; 3+ messages in thread
From: Xin Wang @ 2026-03-26 21:29 UTC (permalink / raw)
  To: intel-xe; +Cc: Xin Wang

Experiment only not for review

Signed-off-by: Xin Wang <x.wang@intel.com>
---
 drivers/gpu/drm/xe/xe_guc_tlb_inval.c | 11 ++++++++++-
 drivers/gpu/drm/xe/xe_module.c        |  4 ++++
 drivers/gpu/drm/xe/xe_module.h        |  1 +
 drivers/gpu/drm/xe/xe_pci.c           |  2 ++
 4 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
index ced58f46f846..bccb105af9a7 100644
--- a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
+++ b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c
@@ -16,6 +16,7 @@
 #include "xe_guc_tlb_inval.h"
 #include "xe_force_wake.h"
 #include "xe_mmio.h"
+#include "xe_module.h"
 #include "xe_sa.h"
 #include "xe_tlb_inval.h"
 #include "xe_vm.h"
@@ -174,7 +175,15 @@ static int send_tlb_inval_ppgtt(struct xe_guc *guc, u32 seqno, u64 start,
 	action[len++] = !prl_sa ? seqno : TLB_INVALIDATION_SEQNO_INVALID;
 	if (!gt_to_xe(gt)->info.has_range_tlb_inval ||
 	    length > MAX_RANGE_TLB_INVALIDATION_LENGTH) {
-		action[len++] = MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL);
+		if (xe_modparam.enable_asid_tlb_inval) {
+			action[len++] = MAKE_INVAL_OP_FLUSH(XE_GUC_TLB_INVAL_PAGE_SELECTIVE, true);
+			action[len++] = id;
+			action[len++] = 1;
+			action[len++] = 0;
+			action[len++] = 0;
+		} else {
+			action[len++] = MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL);
+		}
 	} else {
 		u64 normalize_len = normalize_invalidation_range(gt, &start,
 								 &end);
diff --git a/drivers/gpu/drm/xe/xe_module.c b/drivers/gpu/drm/xe/xe_module.c
index 4cb578182912..fdfae7fbb231 100644
--- a/drivers/gpu/drm/xe/xe_module.c
+++ b/drivers/gpu/drm/xe/xe_module.c
@@ -83,6 +83,10 @@ MODULE_PARM_DESC(wedged_mode,
 		 "Module's default policy for the wedged mode (0=never, 1=upon-critical-error, 2=upon-any-hang-no-reset "
 		 "[default=" XE_DEFAULT_WEDGED_MODE_STR "])");
 
+module_param_named_unsafe(enable_asid_tlb_inval, xe_modparam.enable_asid_tlb_inval, bool, 0600);
+MODULE_PARM_DESC(enable_asid_tlb_inval,
+		 "Use ASID-based page-selective TLB invalidation instead of full invalidation (experimental)");
+
 static int xe_check_nomodeset(void)
 {
 	if (drm_firmware_drivers_only())
diff --git a/drivers/gpu/drm/xe/xe_module.h b/drivers/gpu/drm/xe/xe_module.h
index 79cb9639c0f3..648ac49fef76 100644
--- a/drivers/gpu/drm/xe/xe_module.h
+++ b/drivers/gpu/drm/xe/xe_module.h
@@ -23,6 +23,7 @@ struct xe_modparam {
 #endif
 	unsigned int wedged_mode;
 	u32 svm_notifier_size;
+	bool enable_asid_tlb_inval;
 };
 
 extern struct xe_modparam xe_modparam;
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 189e2a1c29f9..0566a915abe5 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -955,6 +955,8 @@ static int xe_info_init(struct xe_device *xe,
 		xe->info.has_device_atomics_on_smem = 1;
 
 	xe->info.has_range_tlb_inval = graphics_desc->has_range_tlb_inval;
+	if (xe_modparam.enable_asid_tlb_inval)
+		xe->info.has_range_tlb_inval = 0;
 	xe->info.has_ctx_tlb_inval = graphics_desc->has_ctx_tlb_inval;
 	xe->info.has_usm = graphics_desc->has_usm;
 	xe->info.has_64bit_timestamp = graphics_desc->has_64bit_timestamp;
-- 
2.43.0


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2026-03-26 21:29 [PATCH] drm/xe: use the asid based invalidation Xin Wang
2026-03-26 22:04 ` ✓ CI.KUnit: success for " Patchwork
2026-03-26 22:38 ` ✓ Xe.CI.BAT: " Patchwork

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