[PATCH v2] drm/xe: expose multi_lrc_engine_classes in debugfs info

[Xin Wang <x.wang@intel.com>]

Add multi_lrc_engine_classes to the per-device info printed via debugfs
(/sys/kernel/debug/dri/<N>/info). This value indicates which engine
classes support multi-LRC submission and varies across platforms.

Exposing it through debugfs allows userspace tools like IGT to query
the actual kernel configuration rather than hardcoding platform-specific
values in test code. This avoids duplicating KMD logic in IGT and makes
tests automatically adapt to platform differences.

V2:
 - Print human-readable engine class names (e.g. "vcs vecs") instead
of a raw bitmask value.

Cc: Daniel Charles <daniel.charles@intel.com>
Signed-off-by: Xin Wang <x.wang@intel.com>
---
 drivers/gpu/drm/xe/xe_debugfs.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
index 844cfafe1ec7..a410ee971980 100644
--- a/drivers/gpu/drm/xe/xe_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_debugfs.c
@@ -18,6 +18,7 @@
 #include "xe_gt_debugfs.h"
 #include "xe_gt_printk.h"
 #include "xe_guc_ads.h"
+#include "xe_hw_engine.h"
 #include "xe_mmio.h"
 #include "xe_pm.h"
 #include "xe_psmi.h"
@@ -88,6 +89,16 @@ static int info(struct seq_file *m, void *data)
 	drm_printf(&p, "has_flat_ccs %s\n", str_yes_no(xe->info.has_flat_ccs));
 	drm_printf(&p, "has_usm %s\n", str_yes_no(xe->info.has_usm));
 	drm_printf(&p, "skip_guc_pc %s\n", str_yes_no(xe->info.skip_guc_pc));
+	drm_printf(&p, "multi_lrc_engine_classes");
+	if (xe->info.multi_lrc_mask) {
+		for (enum xe_engine_class ec = 0; ec < XE_ENGINE_CLASS_MAX; ec++) {
+			if (xe->info.multi_lrc_mask & BIT(ec))
+				drm_printf(&p, " %s", xe_hw_engine_class_to_str(ec));
+		}
+	} else {
+		drm_printf(&p, " none");
+	}
+	drm_printf(&p, "\n");
 	for_each_gt(gt, xe, id) {
 		drm_printf(&p, "gt%d force wake %d\n", id,
 			   xe_force_wake_ref(gt_to_fw(gt), XE_FW_GT));
-- 
2.43.0