[PATCH 3/3] drm/i915/display: Do not program color pipeline for Y plane

[Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>]

The Y plane is only responsible for fetching luma data from a YCbCr
frame buffer. After chroma upsampling, pixel data is forwarded
through the UV plane for further processing. Programming the color
pipeline on the Y plane is therefore unnecessary.

The Y plane may still carry color pipeline state due to state copying
between the Y and UV planes. The hw state copying needs to be more
nuanced but until then, skip programming the color pipeline for the
Y plane.

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
 drivers/gpu/drm/i915/display/skl_universal_plane.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 11ba42c67e3e..2f622a2d5e04 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1567,7 +1567,8 @@ icl_plane_update_noarm(struct intel_dsb *dsb,
 	plane_color_ctl = plane_state->color_ctl |
 		glk_plane_color_ctl_crtc(crtc_state);
 
-	intel_color_plane_program_pipeline(dsb, plane_state);
+	if (!plane_state->is_y_plane)
+		intel_color_plane_program_pipeline(dsb, plane_state);
 
 	/* The scaler will handle the output position */
 	if (plane_state->scaler_id >= 0) {
-- 
2.25.1