* [PATCH v1 00/16] VS/PE Override support
@ 2026-03-31 18:33 Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 01/16] drm/i915/lt: align xe3plpd with VS/PE Override layout Michał Grzelak
` (19 more replies)
0 siblings, 20 replies; 23+ messages in thread
From: Michał Grzelak @ 2026-03-31 18:33 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Michał Grzelak
First version the series with RFC tag being removed [1]. No changelog at
commit-level since the series transformed vastly.
Already pointed out issue with the series is that I still haven't came
up yet with better platform-depedent checks than just doing a never-
ending if-ladder. It seems especially unnecessary in case of
intel_ddi_buf_trans.c where it repeats the work that has already been
done.
Thanks for all the feedback regarding the RFC.
Booted & successfully loaded i915/xe on MTL+ and EHL.
[1] https://lore.kernel.org/intel-gfx/20260308132446.3320848-1-michal.grzelak@intel.com
BR,
Michał
Michał Grzelak (16):
drm/i915/lt: align xe3plpd with VS/PE Override layout
drm/i915/buf_trans: switch from u8 to u32
drm/i915/buf_trans: describe VS/PE Override layout
drm/i915/bios: prepare for parsing VBT #57
drm/i915/bios: parse LT's VS/PE Override Block #57
drm/i915/bios: parse Snps's VS/PE Override Block #57
drm/i915/bios: parse EHL's VS/PE Override Block #57
drm/i915/bios: support VS/PE Override per each ddi port
drm/i915/bios: print VS/PE Override port info
drm/i915/ddi: cache VS/PE struct pointer into intel_encoder
drm/i915/buf_trans: override encoder->get_buf_trans when asked
drm/i915/buf_trans: compute LT's VS/PE Override index
drm/i915/buf_trans: compute Snps's VS/PE Override index
drm/i915/buf_trans: compute EHL's VS/PE Override index
drm/i915/bios: search for VBT #57 by default
drm/i915/bios: remove VS/PE Override warning
drivers/gpu/drm/i915/display/intel_bios.c | 197 ++++++++++++++++-
drivers/gpu/drm/i915/display/intel_bios.h | 3 +
drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
.../drm/i915/display/intel_ddi_buf_trans.c | 201 ++++++++++++++----
.../drm/i915/display/intel_ddi_buf_trans.h | 51 ++++-
.../gpu/drm/i915/display/intel_display_core.h | 9 +
.../drm/i915/display/intel_display_types.h | 1 +
7 files changed, 410 insertions(+), 53 deletions(-)
--
2.45.2
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH v1 01/16] drm/i915/lt: align xe3plpd with VS/PE Override layout
2026-03-31 18:33 [PATCH v1 00/16] VS/PE Override support Michał Grzelak
@ 2026-03-31 18:33 ` Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 02/16] drm/i915/buf_trans: switch from u8 to u32 Michał Grzelak
` (18 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Michał Grzelak @ 2026-03-31 18:33 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Michał Grzelak
Align struct xe3plpd_lt_phy_buf_trans to match layout found in
Vswing / Preemphasis Override tables.
Move txswing & txswing_level to the end of the struct. Keep order
between txswing & txswing_level columns in xe3plpd_lt_* tables.
Move post_cursor from third field to second.
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
.../drm/i915/display/intel_ddi_buf_trans.c | 72 +++++++++----------
.../drm/i915/display/intel_ddi_buf_trans.h | 6 +-
2 files changed, 39 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 395dba8c9e4d..de5f6f89374e 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1118,50 +1118,50 @@ static const struct intel_ddi_buf_trans mtl_c20_trans_uhbr = {
/* DP1.4 */
static const union intel_ddi_buf_trans_entry _xe3plpd_lt_trans_dp14[] = {
- { .lt = { 1, 0, 0, 21, 0 } },
- { .lt = { 1, 1, 0, 24, 3 } },
- { .lt = { 1, 2, 0, 28, 7 } },
- { .lt = { 0, 3, 0, 35, 13 } },
- { .lt = { 1, 1, 0, 27, 0 } },
- { .lt = { 1, 2, 0, 31, 4 } },
- { .lt = { 0, 3, 0, 39, 9 } },
- { .lt = { 1, 2, 0, 35, 0 } },
- { .lt = { 0, 3, 0, 41, 7 } },
- { .lt = { 0, 3, 0, 48, 0 } },
+ { .lt = { 21, 0, 0 , 1, 0 } },
+ { .lt = { 24, 0, 3 , 1, 1 } },
+ { .lt = { 28, 0, 7 , 1, 2 } },
+ { .lt = { 35, 0, 13, 0, 3 } },
+ { .lt = { 27, 0, 0 , 1, 1 } },
+ { .lt = { 31, 0, 4 , 1, 2 } },
+ { .lt = { 39, 0, 9 , 0, 3 } },
+ { .lt = { 35, 0, 0 , 1, 2 } },
+ { .lt = { 41, 0, 7 , 0, 3 } },
+ { .lt = { 48, 0, 0 , 0, 3 } },
};
/* DP2.1 */
static const union intel_ddi_buf_trans_entry _xe3plpd_lt_trans_uhbr[] = {
- { .lt = { 0, 0, 0, 48, 0 } },
- { .lt = { 0, 0, 0, 43, 5 } },
- { .lt = { 0, 0, 0, 40, 8 } },
- { .lt = { 0, 0, 0, 37, 11 } },
- { .lt = { 0, 0, 0, 33, 15 } },
- { .lt = { 0, 0, 2, 46, 0 } },
- { .lt = { 0, 0, 2, 42, 4 } },
- { .lt = { 0, 0, 2, 38, 8 } },
- { .lt = { 0, 0, 2, 35, 11 } },
- { .lt = { 0, 0, 2, 33, 13 } },
- { .lt = { 0, 0, 4, 44, 0 } },
- { .lt = { 0, 0, 4, 40, 4 } },
- { .lt = { 0, 0, 4, 37, 7 } },
- { .lt = { 0, 0, 4, 33, 11 } },
- { .lt = { 0, 0, 8, 40, 0 } },
- { .lt = { 1, 0, 2, 26, 2 } },
+ { .lt = { 48, 0, 0 , 0, 0 } },
+ { .lt = { 43, 0, 5 , 0, 0 } },
+ { .lt = { 40, 0, 8 , 0, 0 } },
+ { .lt = { 37, 0, 11, 0, 0 } },
+ { .lt = { 33, 0, 15, 0, 0 } },
+ { .lt = { 46, 2, 0 , 0, 0 } },
+ { .lt = { 42, 2, 4 , 0, 0 } },
+ { .lt = { 38, 2, 8 , 0, 0 } },
+ { .lt = { 35, 2, 11, 0, 0 } },
+ { .lt = { 33, 2, 13, 0, 0 } },
+ { .lt = { 44, 4, 0 , 0, 0 } },
+ { .lt = { 40, 4, 4 , 0, 0 } },
+ { .lt = { 37, 4, 7 , 0, 0 } },
+ { .lt = { 33, 4, 11, 0, 0 } },
+ { .lt = { 40, 8, 0 , 0, 0 } },
+ { .lt = { 26, 2, 2 , 1, 0 } },
};
/* eDp */
static const union intel_ddi_buf_trans_entry _xe3plpd_lt_trans_edp[] = {
- { .lt = { 1, 0, 0, 12, 0 } },
- { .lt = { 1, 1, 0, 13, 1 } },
- { .lt = { 1, 2, 0, 15, 3 } },
- { .lt = { 1, 3, 0, 19, 7 } },
- { .lt = { 1, 1, 0, 14, 0 } },
- { .lt = { 1, 2, 0, 16, 2 } },
- { .lt = { 1, 3, 0, 21, 5 } },
- { .lt = { 1, 2, 0, 18, 0 } },
- { .lt = { 1, 3, 0, 22, 4 } },
- { .lt = { 1, 3, 0, 26, 0 } },
+ { .lt = { 12, 0, 0, 1, 0 } },
+ { .lt = { 13, 0, 1, 1, 1 } },
+ { .lt = { 15, 0, 3, 1, 2 } },
+ { .lt = { 19, 0, 7, 1, 3 } },
+ { .lt = { 14, 0, 0, 1, 1 } },
+ { .lt = { 16, 0, 2, 1, 2 } },
+ { .lt = { 21, 0, 5, 1, 3 } },
+ { .lt = { 18, 0, 0, 1, 2 } },
+ { .lt = { 22, 0, 4, 1, 3 } },
+ { .lt = { 26, 0, 0, 1, 3 } },
};
static const struct intel_ddi_buf_trans xe3plpd_lt_trans_dp14 = {
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
index cec332090a20..7703c6c0a0cb 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
@@ -51,11 +51,11 @@ struct dg2_snps_phy_buf_trans {
};
struct xe3plpd_lt_phy_buf_trans {
- u8 txswing;
- u8 txswing_level;
- u8 pre_cursor;
u8 main_cursor;
+ u8 pre_cursor;
u8 post_cursor;
+ u8 txswing;
+ u8 txswing_level;
};
union intel_ddi_buf_trans_entry {
--
2.45.2
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v1 02/16] drm/i915/buf_trans: switch from u8 to u32
2026-03-31 18:33 [PATCH v1 00/16] VS/PE Override support Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 01/16] drm/i915/lt: align xe3plpd with VS/PE Override layout Michał Grzelak
@ 2026-03-31 18:33 ` Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 03/16] drm/i915/buf_trans: describe VS/PE Override layout Michał Grzelak
` (17 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Michał Grzelak @ 2026-03-31 18:33 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Michał Grzelak
Match width of fields of struct xe3plpd_lt_* & struct dg2_snps_*
with Vswing / Preemphasis Override tables layout.
This change affects DG2 and MTL+ cases.
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
.../gpu/drm/i915/display/intel_ddi_buf_trans.h | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
index 7703c6c0a0cb..bea6fb2ec6f4 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
@@ -45,17 +45,17 @@ struct tgl_dkl_phy_ddi_buf_trans {
};
struct dg2_snps_phy_buf_trans {
- u8 vswing;
- u8 pre_cursor;
- u8 post_cursor;
+ u32 vswing;
+ u32 pre_cursor;
+ u32 post_cursor;
};
struct xe3plpd_lt_phy_buf_trans {
- u8 main_cursor;
- u8 pre_cursor;
- u8 post_cursor;
- u8 txswing;
- u8 txswing_level;
+ u32 main_cursor;
+ u32 pre_cursor;
+ u32 post_cursor;
+ u32 txswing;
+ u32 txswing_level;
};
union intel_ddi_buf_trans_entry {
--
2.45.2
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v1 03/16] drm/i915/buf_trans: describe VS/PE Override layout
2026-03-31 18:33 [PATCH v1 00/16] VS/PE Override support Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 01/16] drm/i915/lt: align xe3plpd with VS/PE Override layout Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 02/16] drm/i915/buf_trans: switch from u8 to u32 Michał Grzelak
@ 2026-03-31 18:33 ` Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 04/16] drm/i915/bios: prepare for parsing VBT #57 Michał Grzelak
` (16 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Michał Grzelak @ 2026-03-31 18:33 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Michał Grzelak
Name indices of each present VS/PE Override table. Reflect tables'
layout by grouping indices into enums. Pack & unify all enums into union
ddi_vswing_preemph_index.
Naming of the data structures is far from perfect and should be a
subject to renaming.
Capture Vswing / Preemphasis Override tables' layout from MTL onward.
Add a placeholder for ICL+.
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
.../drm/i915/display/intel_ddi_buf_trans.h | 35 +++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
index bea6fb2ec6f4..20bf1d749344 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
@@ -74,6 +74,41 @@ struct intel_ddi_buf_trans {
u8 hdmi_default_entry;
};
+enum lt_vswing_preemph_index {
+ XE3P_VS_PE_UNSET = -1,
+ XE3P_VS_PE_DEFAULT = 0,
+ XE3P_VS_PE_EDP = 3,
+ XE3P_VS_PE_DP14 = 4,
+ XE3P_VS_PE_DP21 = 5
+};
+
+enum snps_vswing_preemph_index {
+ MTL_C10_VS_PE_UNSET = -1,
+ MTL_C10_VS_PE_DP14_RBR_HBR = 0,
+ MTL_C10_VS_PE_DP14_HBR2_HBR3 = 1,
+ MTL_C10_VS_PE_EDP_NON_HBR3 = 2,
+ MTL_C10_VS_PE_EDP_HBR3 = 3,
+
+ MTL_C20_VS_PE_DP14 = 4,
+ MTL_C20_VS_PE_DP20 = 5
+};
+
+enum icl_vswing_preemph_index {
+ ICL_VS_PE_UNSET = -1,
+ ICL_VS_PE_DEFAULT = 0
+};
+
+union ddi_vswing_preemph_index {
+ enum lt_vswing_preemph_index lt;
+ enum snps_vswing_preemph_index snps;
+ enum icl_vswing_preemph_index icl;
+};
+
+struct ddi_vswing_preemph {
+ struct intel_ddi_buf_trans *buf_trans;
+ union ddi_vswing_preemph_index index;
+};
+
bool is_hobl_buf_trans(const struct intel_ddi_buf_trans *table);
void intel_ddi_buf_trans_init(struct intel_encoder *encoder);
--
2.45.2
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v1 04/16] drm/i915/bios: prepare for parsing VBT #57
2026-03-31 18:33 [PATCH v1 00/16] VS/PE Override support Michał Grzelak
` (2 preceding siblings ...)
2026-03-31 18:33 ` [PATCH v1 03/16] drm/i915/buf_trans: describe VS/PE Override layout Michał Grzelak
@ 2026-03-31 18:33 ` Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 05/16] drm/i915/bios: parse LT's VS/PE Override Block #57 Michał Grzelak
` (15 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Michał Grzelak @ 2026-03-31 18:33 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Michał Grzelak
Add dead, generic VBT #57 parsing code since searching for VBT #57 at
the moment is switched off by default.
Add a struct storing all VS/PE relevant data into intel_vbt_data.
Add other possible renames into the comment.
Allocate matrix of intel_ddi_buf_trans_entry. This "buffers' table" (or
"buffers' block", or "tables' block") will be used to store all deparsed
values from VBT #57. Store matrix's pointer in intel_vbt_data.
Deallocate whole matrix on driver removal.
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 44 +++++++++++++++++++
.../gpu/drm/i915/display/intel_display_core.h | 9 ++++
2 files changed, 53 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index b6fe87c29aa7..778584c59fc6 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -34,6 +34,7 @@
#include <drm/drm_fixed.h>
#include <drm/drm_print.h>
+#include "intel_ddi_buf_trans.h"
#include "intel_display.h"
#include "intel_display_core.h"
#include "intel_display_rpm.h"
@@ -2183,6 +2184,38 @@ parse_compression_parameters(struct intel_display *display)
}
}
+static void
+parse_vswing_preemph_override(struct intel_display *display)
+{
+ union intel_ddi_buf_trans_entry **bufs_table;
+ const struct bdb_vswing_preemph *block;
+ u8 num_rows;
+
+ if (display->vbt.version < 218)
+ return;
+
+ block = bdb_find_section(display, BDB_VSWING_PREEMPH);
+
+ /* pre-ICL GOP don't have VBT #57 */
+ if (!block)
+ return;
+
+ num_rows = DISPLAY_VER(display) >= 14 ? 16 : 10;
+
+ bufs_table = kzalloc(block->num_tables * sizeof(*bufs_table), GFP_KERNEL);
+
+ for (int idx = 0; idx < block->num_tables; idx++)
+ bufs_table[idx] = kzalloc(num_rows * sizeof(**bufs_table), GFP_KERNEL);
+
+ drm_dbg_kms(display->drm, "Vswing / Preemph Override not yet supported on the platform\n");
+ bufs_table = NULL;
+
+ display->vbt.vswing_preemph.bufs_table = bufs_table;
+ display->vbt.vswing_preemph.num_tables = block->num_tables;
+ display->vbt.vswing_preemph.num_rows = num_rows;
+ display->vbt.vswing_preemph.num_cols = block->num_columns;
+}
+
static u8 translate_iboost(struct intel_display *display, u8 val)
{
static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
@@ -2978,6 +3011,9 @@ init_vbt_defaults(struct intel_display *display)
!HAS_PCH_SPLIT(display));
drm_dbg_kms(display->drm, "Set default to SSC at %d kHz\n",
display->vbt.lvds_ssc_freq);
+
+ /* Vswing / Preemphasis Override */
+ display->vbt.vswing_preemph.bufs_table = NULL;
}
/* Common defaults which may be overridden by VBT. */
@@ -3274,6 +3310,7 @@ void intel_bios_init(struct intel_display *display)
/* Depends on child device list */
parse_compression_parameters(display);
+ parse_vswing_preemph_override(display);
out:
if (!vbt) {
@@ -3358,6 +3395,13 @@ void intel_bios_driver_remove(struct intel_display *display)
list_del(&entry->node);
kfree(entry);
}
+
+ if (display->vbt.vswing_preemph.bufs_table) {
+ for (int idx = 0; idx < display->vbt.vswing_preemph.num_tables; idx++)
+ kfree(display->vbt.vswing_preemph.bufs_table[idx]);
+
+ kfree(display->vbt.vswing_preemph.bufs_table);
+ }
}
void intel_bios_fini_panel(struct intel_panel *panel)
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index d708d322aa85..c18465b1018b 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -233,6 +233,15 @@ struct intel_vbt_data {
struct list_head display_devices;
struct list_head bdb_blocks;
+ struct {
+ // union intel_ddi_buf_trans_entry **tables_block;
+ // union intel_ddi_buf_trans_entry **bufs_block;
+ union intel_ddi_buf_trans_entry **bufs_table;
+ int num_tables;
+ int num_cols;
+ int num_rows;
+ } vswing_preemph;
+
struct sdvo_device_mapping {
u8 initialized;
u8 dvo_port;
--
2.45.2
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v1 05/16] drm/i915/bios: parse LT's VS/PE Override Block #57
2026-03-31 18:33 [PATCH v1 00/16] VS/PE Override support Michał Grzelak
` (3 preceding siblings ...)
2026-03-31 18:33 ` [PATCH v1 04/16] drm/i915/bios: prepare for parsing VBT #57 Michał Grzelak
@ 2026-03-31 18:33 ` Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 06/16] drm/i915/bios: parse Snps's " Michał Grzelak
` (14 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Michał Grzelak @ 2026-03-31 18:33 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Michał Grzelak
Parse content of VBT #57 into buffers' table. In case of LT we cannot
parse the content by simply casting pointer to the memory location since
VBT #57 contains more fields than it is actually needed.
Parse VBT #57 going row-wise since VBT #57 is a contiguous block.
Add FIXME to confirm LT's tables' layout.
Add LOW() macro for extracting lower byte out of u32 value read from
Block 57.
Equivalently, extraction of lower byte could be done by cast to (u8).
This approach would have the advantage of dropping "drm/i915/buf_trans:
switch from u8 to u32" patch.
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 44 +++++++++++++++++++++--
1 file changed, 42 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 778584c59fc6..4b2d86bac2de 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -47,6 +47,10 @@
#define _INTEL_BIOS_PRIVATE
#include "intel_vbt_defs.h"
+#define VS_PE_MASK 0x000000ff
+
+#define LOW(x) ((x) & (VS_PE_MASK))
+
/**
* DOC: Video BIOS Table (VBT)
*
@@ -2184,6 +2188,38 @@ parse_compression_parameters(struct intel_display *display)
}
}
+static void
+parse_vswing_preemph_lt(union intel_ddi_buf_trans_entry **bufs_table,
+ const struct bdb_vswing_preemph *block)
+{
+ union intel_ddi_buf_trans_entry *entry;
+ const u32 *tables = block->tables;
+ u32 num_rows = 16;
+ size_t offset = 0;
+ size_t row_width;
+ const u32 *vals;
+
+ row_width = block->num_columns * sizeof(*tables);
+
+ for (int idx = 0; idx < block->num_tables; idx++) {
+ for (int row = 0; row < num_rows; row++) {
+ vals = &tables[offset];
+
+ entry = &bufs_table[idx][row];
+ entry->lt.main_cursor = LOW(vals[0]);
+ entry->lt.pre_cursor = LOW(vals[1]);
+ entry->lt.post_cursor = LOW(vals[2]);
+ /* FIXME confirm LT's tables' layout
+ * should this ever trigger.
+ * entry->lt.txswing = LOW(vals[3]);
+ * entry->lt.txswing_level = LOW(vals[4]);
+ */
+
+ offset += row_width;
+ }
+ }
+}
+
static void
parse_vswing_preemph_override(struct intel_display *display)
{
@@ -2207,8 +2243,12 @@ parse_vswing_preemph_override(struct intel_display *display)
for (int idx = 0; idx < block->num_tables; idx++)
bufs_table[idx] = kzalloc(num_rows * sizeof(**bufs_table), GFP_KERNEL);
- drm_dbg_kms(display->drm, "Vswing / Preemph Override not yet supported on the platform\n");
- bufs_table = NULL;
+ if (HAS_LT_PHY(display)) {
+ parse_vswing_preemph_lt(bufs_table, block);
+ } else {
+ drm_dbg_kms(display->drm, "Vswing / Preemph Override not yet supported on the platform\n");
+ bufs_table = NULL;
+ }
display->vbt.vswing_preemph.bufs_table = bufs_table;
display->vbt.vswing_preemph.num_tables = block->num_tables;
--
2.45.2
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v1 06/16] drm/i915/bios: parse Snps's VS/PE Override Block #57
2026-03-31 18:33 [PATCH v1 00/16] VS/PE Override support Michał Grzelak
` (4 preceding siblings ...)
2026-03-31 18:33 ` [PATCH v1 05/16] drm/i915/bios: parse LT's VS/PE Override Block #57 Michał Grzelak
@ 2026-03-31 18:33 ` Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 07/16] drm/i915/bios: parse EHL's " Michał Grzelak
` (13 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Michał Grzelak @ 2026-03-31 18:33 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Michał Grzelak
Parse content of VBT #57 into buffers' table. In case of Snps we can
also parse the content by casting pointer to the memory location.
Parse VBT #57 going row-wise since VBT #57 is a contiguous block.
Reuse LOW() macro for extracting lower byte out of u32 value read from
Block 57.
Equivalently, extraction of lower byte could be done by cast to (u8).
This approach would have the advantage of dropping "drm/i915/buf_trans:
switch from u8 to u32" patch.
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 31 +++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 4b2d86bac2de..c09af91ab55f 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2188,6 +2188,33 @@ parse_compression_parameters(struct intel_display *display)
}
}
+static void
+parse_vswing_preemph_snps(union intel_ddi_buf_trans_entry **bufs_table,
+ const struct bdb_vswing_preemph *block)
+{
+ union intel_ddi_buf_trans_entry *entry;
+ const u32 *tables = block->tables;
+ u32 num_rows = 16;
+ size_t offset = 0;
+ size_t row_width;
+ const u32 *vals;
+
+ row_width = block->num_columns * sizeof(*tables);
+
+ for (int idx = 0; idx < block->num_tables; idx++) {
+ for (int row = 0; row < num_rows; row++) {
+ vals = &tables[offset];
+
+ entry = &bufs_table[idx][row];
+ entry->snps.vswing = LOW(vals[0]);
+ entry->snps.pre_cursor = LOW(vals[1]);
+ entry->snps.post_cursor = LOW(vals[2]);
+
+ offset += row_width;
+ }
+ }
+}
+
static void
parse_vswing_preemph_lt(union intel_ddi_buf_trans_entry **bufs_table,
const struct bdb_vswing_preemph *block)
@@ -2245,6 +2272,10 @@ parse_vswing_preemph_override(struct intel_display *display)
if (HAS_LT_PHY(display)) {
parse_vswing_preemph_lt(bufs_table, block);
+ } else if (DISPLAY_VER(display) >= 14) {
+ parse_vswing_preemph_snps(bufs_table, block);
+ } else if (display->platform.battlemage) {
+ parse_vswing_preemph_snps(bufs_table, block);
} else {
drm_dbg_kms(display->drm, "Vswing / Preemph Override not yet supported on the platform\n");
bufs_table = NULL;
--
2.45.2
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v1 07/16] drm/i915/bios: parse EHL's VS/PE Override Block #57
2026-03-31 18:33 [PATCH v1 00/16] VS/PE Override support Michał Grzelak
` (5 preceding siblings ...)
2026-03-31 18:33 ` [PATCH v1 06/16] drm/i915/bios: parse Snps's " Michał Grzelak
@ 2026-03-31 18:33 ` Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 08/16] drm/i915/bios: support VS/PE Override per each ddi port Michał Grzelak
` (12 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Michał Grzelak @ 2026-03-31 18:33 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Michał Grzelak
Parse content of VBT #57 into buffers' table. In case of EHL we cannot
parse the content by simply casting pointer to the memory location since
VBT #57 contains more fields than it is actually needed.
Parse VBT #57 going row-wise since VBT #57 is a contiguous block.
Reuse LOW() macro for extracting lower byte out of u32 value read from
Block 57.
Equivalently, extraction of lower byte could be done by cast to (u8).
This approach would have the advantage of dropping "drm/i915/buf_trans:
switch from u8 to u32" patch.
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 31 +++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index c09af91ab55f..f2f1a57dbdbc 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2188,6 +2188,35 @@ parse_compression_parameters(struct intel_display *display)
}
}
+static void
+parse_vswing_preemph_icl(union intel_ddi_buf_trans_entry **bufs_table,
+ const struct bdb_vswing_preemph *block)
+{
+ union intel_ddi_buf_trans_entry *entry;
+ const u32 *tables = block->tables;
+ u32 num_rows = 10;
+ size_t offset = 0;
+ size_t row_width;
+ const u32 *vals;
+
+ row_width = block->num_columns * sizeof(*tables);
+
+ for (int idx = 0; idx < block->num_tables; idx++) {
+ for (int row = 0; row < num_rows; row++) {
+ vals = &tables[offset];
+
+ entry = &bufs_table[idx][row];
+ entry->icl.dw2_swing_sel = LOW(vals[0]);
+ entry->icl.dw7_n_scalar = LOW(vals[1]);
+ entry->icl.dw4_cursor_coeff = LOW(vals[2]);
+ entry->icl.dw4_post_cursor_2 = LOW(vals[3]);
+ entry->icl.dw4_post_cursor_1 = LOW(vals[4]);
+
+ offset += row_width;
+ }
+ }
+}
+
static void
parse_vswing_preemph_snps(union intel_ddi_buf_trans_entry **bufs_table,
const struct bdb_vswing_preemph *block)
@@ -2276,6 +2305,8 @@ parse_vswing_preemph_override(struct intel_display *display)
parse_vswing_preemph_snps(bufs_table, block);
} else if (display->platform.battlemage) {
parse_vswing_preemph_snps(bufs_table, block);
+ } else if (display->platform.elkhartlake) {
+ parse_vswing_preemph_icl(bufs_table, block);
} else {
drm_dbg_kms(display->drm, "Vswing / Preemph Override not yet supported on the platform\n");
bufs_table = NULL;
--
2.45.2
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v1 08/16] drm/i915/bios: support VS/PE Override per each ddi port
2026-03-31 18:33 [PATCH v1 00/16] VS/PE Override support Michał Grzelak
` (6 preceding siblings ...)
2026-03-31 18:33 ` [PATCH v1 07/16] drm/i915/bios: parse EHL's " Michał Grzelak
@ 2026-03-31 18:33 ` Michał Grzelak
2026-04-03 8:39 ` kernel test robot
2026-03-31 18:33 ` [PATCH v1 09/16] drm/i915/bios: print VS/PE Override port info Michał Grzelak
` (11 subsequent siblings)
19 siblings, 1 reply; 23+ messages in thread
From: Michał Grzelak @ 2026-03-31 18:33 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Michał Grzelak
Add helper function to check if port asks for overriding default VS/PE
tables.
Add ddi_vswing_preemph into bios_encoder_data. This is required because
every devdata needs a separate intel_ddi_buf_trans since each port can
request an override. Store buffer's pointer in ddi_vswing_preemph. Treat
setting .buf_trans to NULL as if the request was invalid.
Initialize port's buffer pointer to NULL when no VBT was provided.
Allocate intel_ddi_buf_trans buffer per port if the request is valid.
Defer index computing to occur later during override_buf_trans(). Set
the index to being not yet computed.
Deallocate buffer on driver removal when port asked for an allocation.
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 29 +++++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_bios.h | 1 +
2 files changed, 30 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index f2f1a57dbdbc..016696de2870 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -77,6 +77,7 @@
struct intel_bios_encoder_data {
struct intel_display *display;
+ struct ddi_vswing_preemph vswing_preemph;
struct child_device_config child;
struct dsc_compression_parameters_entry *dsc;
struct list_head node;
@@ -2758,6 +2759,20 @@ static void sanitize_hdmi_level_shift(struct intel_bios_encoder_data *devdata,
}
}
+static void override_vswing_preemph(struct intel_bios_encoder_data *devdata)
+{
+ struct intel_ddi_buf_trans *buf_trans;
+
+ devdata->vswing_preemph.buf_trans = NULL;
+ devdata->vswing_preemph.index = (union ddi_vswing_preemph_index) -1;
+
+ if (!intel_bios_encoder_overrides_vswing(devdata))
+ return;
+
+ buf_trans = kzalloc(sizeof(*buf_trans), GFP_KERNEL);
+ devdata->vswing_preemph.buf_trans = buf_trans;
+}
+
static bool
intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata)
{
@@ -2949,6 +2964,7 @@ static void parse_ddi_port(struct intel_bios_encoder_data *devdata)
sanitize_dedicated_external(devdata, port);
sanitize_device_type(devdata, port);
sanitize_hdmi_level_shift(devdata, port);
+ override_vswing_preemph(devdata);
}
static bool has_ddi_port_info(struct intel_display *display)
@@ -3157,6 +3173,9 @@ init_vbt_missing_defaults(struct intel_display *display)
break;
devdata->display = display;
+ devdata->vswing_preemph.buf_trans = NULL;
+ devdata->vswing_preemph.index =
+ (union ddi_vswing_preemph_index) -1;
child = &devdata->child;
if (port == PORT_F)
@@ -3490,6 +3509,10 @@ void intel_bios_driver_remove(struct intel_display *display)
node) {
list_del(&devdata->node);
kfree(devdata->dsc);
+
+ if (devdata->vswing_preemph.buf_trans)
+ kfree(devdata->vswing_preemph.buf_trans);
+
kfree(devdata);
}
@@ -3937,6 +3960,12 @@ bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devda
return devdata->display->vbt.version >= 209 && devdata->child.tbt;
}
+bool intel_bios_encoder_overrides_vswing(const struct intel_bios_encoder_data *devdata)
+{
+ return devdata->display->vbt.version >= 218 &&
+ devdata->child.use_vbt_vswing;
+}
+
bool intel_bios_encoder_is_dedicated_external(const struct intel_bios_encoder_data *devdata)
{
return devdata->display->vbt.version >= 264 &&
diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h
index 75dff27b4228..50c8fc91fbe8 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -73,6 +73,7 @@ bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
const struct intel_bios_encoder_data *
intel_bios_encoder_data_lookup(struct intel_display *display, enum port port);
+bool intel_bios_encoder_overrides_vswing(const struct intel_bios_encoder_data *devdata);
bool intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata);
bool intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata);
bool intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata);
--
2.45.2
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v1 09/16] drm/i915/bios: print VS/PE Override port info
2026-03-31 18:33 [PATCH v1 00/16] VS/PE Override support Michał Grzelak
` (7 preceding siblings ...)
2026-03-31 18:33 ` [PATCH v1 08/16] drm/i915/bios: support VS/PE Override per each ddi port Michał Grzelak
@ 2026-03-31 18:33 ` Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 10/16] drm/i915/ddi: cache VS/PE struct pointer into intel_encoder Michał Grzelak
` (10 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Michał Grzelak @ 2026-03-31 18:33 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Michał Grzelak
Issue a debug message when port asks to override default Vswing /
Preemphasis tables.
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 016696de2870..f94093379df0 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2904,6 +2904,11 @@ static void print_ddi_port(const struct intel_bios_encoder_data *devdata)
"Port %c supports dynamic DDI allocation in TCSS\n",
port_name(port));
+ if (intel_bios_encoder_overrides_vswing(devdata))
+ drm_dbg_kms(display->drm,
+ "Port %c overrides VBT vswing/preemphasis tables\n",
+ port_name(port));
+
hdmi_level_shift = intel_bios_hdmi_level_shift(devdata);
if (hdmi_level_shift >= 0) {
drm_dbg_kms(display->drm,
--
2.45.2
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v1 10/16] drm/i915/ddi: cache VS/PE struct pointer into intel_encoder
2026-03-31 18:33 [PATCH v1 00/16] VS/PE Override support Michał Grzelak
` (8 preceding siblings ...)
2026-03-31 18:33 ` [PATCH v1 09/16] drm/i915/bios: print VS/PE Override port info Michał Grzelak
@ 2026-03-31 18:33 ` Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 11/16] drm/i915/buf_trans: override encoder->get_buf_trans when asked Michał Grzelak
` (9 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Michał Grzelak @ 2026-03-31 18:33 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Michał Grzelak
Add ddi_vswing_preemph's pointer into struct intel_encoder. Track with
it struct ddi_vswing_preemph from each encoder.
Add into intel_bios.[ch] a helper function to extract the pointer. Cache
the pointer by default into each encoder in intel_ddi.c.
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 6 ++++++
drivers/gpu/drm/i915/display/intel_bios.h | 2 ++
drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
4 files changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index f94093379df0..a0a5399711d6 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -3965,6 +3965,12 @@ bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devda
return devdata->display->vbt.version >= 209 && devdata->child.tbt;
}
+const struct ddi_vswing_preemph *
+intel_bios_encoder_extract_vswing(const struct intel_bios_encoder_data *devdata)
+{
+ return &devdata->vswing_preemph;
+}
+
bool intel_bios_encoder_overrides_vswing(const struct intel_bios_encoder_data *devdata)
{
return devdata->display->vbt.version >= 218 &&
diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h
index 50c8fc91fbe8..2cf32ee58ed0 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -73,6 +73,8 @@ bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
const struct intel_bios_encoder_data *
intel_bios_encoder_data_lookup(struct intel_display *display, enum port port);
+const struct ddi_vswing_preemph *
+intel_bios_encoder_extract_vswing(const struct intel_bios_encoder_data *devdata);
bool intel_bios_encoder_overrides_vswing(const struct intel_bios_encoder_data *devdata);
bool intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata);
bool intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata);
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index ebefa889bc8c..f2497d20e6bd 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -5249,6 +5249,7 @@ void intel_ddi_init(struct intel_display *display,
encoder = &dig_port->base;
encoder->devdata = devdata;
+ encoder->vswing_preemph = intel_bios_encoder_extract_vswing(devdata);
drm_encoder_init(display->drm, &encoder->base, &intel_ddi_funcs,
DRM_MODE_ENCODER_TMDS, "%s",
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index e2496db1642a..e879c2c9b394 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -297,6 +297,7 @@ struct intel_encoder {
/* VBT information for this encoder (may be NULL for older platforms) */
const struct intel_bios_encoder_data *devdata;
+ const struct ddi_vswing_preemph *vswing_preemph;
};
struct intel_panel_bl_funcs {
--
2.45.2
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v1 11/16] drm/i915/buf_trans: override encoder->get_buf_trans when asked
2026-03-31 18:33 [PATCH v1 00/16] VS/PE Override support Michał Grzelak
` (9 preceding siblings ...)
2026-03-31 18:33 ` [PATCH v1 10/16] drm/i915/ddi: cache VS/PE struct pointer into intel_encoder Michał Grzelak
@ 2026-03-31 18:33 ` Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 12/16] drm/i915/buf_trans: compute LT's VS/PE Override index Michał Grzelak
` (8 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Michał Grzelak @ 2026-03-31 18:33 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Michał Grzelak
Overwrite encoder->get_buf_trans with override_buf_trans() hook when
port asks to override default Vswing / Preemphasis tables.
Overriding proper consists of:
1) getting buffers' table via cached pointer in intel_encoder;
2) checking if the index to the table has already been computed;
3) computing & storing the most appropriate index;
4) accessing desired buf_trans with the index;
5) pointing allocated buf_trans_entry to the accessed buf_trans.
Assume 0 as the default index when finding the most specific index
failed.
There are no changes to intel_ddi_dp_level() since selection of correct
row of intel_ddi_buf_trans_entry is same as when no override request has
been done.
vswing_preemph_compute_index() feels like should be done in
override_vswing_preemph() during parse_ddi_ports() from intel_bios.c
instead of override_buf_trans(). Points 2) & 3) then could be omitted
from override_buf_trans(). In reality it is not trivial because index
computation depends on port_clock properties from crtc_state. Checking
those in intel_bios.c is out of my idea as of now.
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
.../drm/i915/display/intel_ddi_buf_trans.c | 55 +++++++++++++++++++
1 file changed, 55 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index de5f6f89374e..06c2869d3e7a 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -3,6 +3,8 @@
* Copyright © 2020 Intel Corporation
*/
+#include <drm/drm_print.h>
+
#include "intel_cx0_phy.h"
#include "intel_ddi.h"
#include "intel_ddi_buf_trans.h"
@@ -1784,6 +1786,56 @@ xe3plpd_get_lt_buf_trans(struct intel_encoder *encoder,
return intel_get_buf_trans(&xe3plpd_lt_trans_dp14, n_entries);
}
+static union ddi_vswing_preemph_index
+vswing_preemph_compute_index(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(encoder);
+ union ddi_vswing_preemph_index index;
+
+ drm_dbg_kms(display->drm, "using default VS/PE Override index");
+ index = (union ddi_vswing_preemph_index) 0;
+
+ return index;
+}
+
+static int
+vswing_preemph_cast_index(struct intel_display *display,
+ union ddi_vswing_preemph_index index)
+{
+ return 0;
+}
+
+static const struct intel_ddi_buf_trans *
+override_buf_trans(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state,
+ int *n_entries)
+{
+ struct intel_display *display = to_intel_display(encoder);
+
+ struct intel_ddi_buf_trans *buf_trans;
+ struct ddi_vswing_preemph *vswing_preemph;
+ union ddi_vswing_preemph_index index;
+ u32 idx;
+
+ index = encoder->vswing_preemph->index;
+ idx = vswing_preemph_cast_index(display, index);
+
+ if (idx < 0) {
+ index = vswing_preemph_compute_index(encoder, crtc_state);
+ vswing_preemph = (void *) encoder->vswing_preemph;
+ vswing_preemph->index = index;
+ idx = vswing_preemph_cast_index(display, index);
+ }
+
+ buf_trans = (void *) encoder->vswing_preemph->buf_trans;
+
+ buf_trans->entries = display->vbt.vswing_preemph.bufs_table[idx];
+ buf_trans->num_entries = display->vbt.vswing_preemph.num_rows;
+
+ return intel_get_buf_trans(buf_trans, n_entries);
+}
+
void intel_ddi_buf_trans_init(struct intel_encoder *encoder)
{
struct intel_display *display = to_intel_display(encoder);
@@ -1851,4 +1903,7 @@ void intel_ddi_buf_trans_init(struct intel_encoder *encoder)
MISSING_CASE(pdev->device);
}
+
+ if (encoder->vswing_preemph->buf_trans)
+ encoder->get_buf_trans = override_buf_trans;
}
--
2.45.2
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v1 12/16] drm/i915/buf_trans: compute LT's VS/PE Override index
2026-03-31 18:33 [PATCH v1 00/16] VS/PE Override support Michał Grzelak
` (10 preceding siblings ...)
2026-03-31 18:33 ` [PATCH v1 11/16] drm/i915/buf_trans: override encoder->get_buf_trans when asked Michał Grzelak
@ 2026-03-31 18:33 ` Michał Grzelak
2026-04-01 7:16 ` kernel test robot
2026-03-31 18:33 ` [PATCH v1 13/16] drm/i915/buf_trans: compute Snps's " Michał Grzelak
` (7 subsequent siblings)
19 siblings, 1 reply; 23+ messages in thread
From: Michał Grzelak @ 2026-03-31 18:33 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Michał Grzelak
Add support for VS/PE Override on LT. Basing on the mode & CRTC type
found, compute the most appropriate index. Assume default index as 0.
Add FIXME & warning when EDP is requested to be overridden.
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
.../drm/i915/display/intel_ddi_buf_trans.c | 31 +++++++++++++++++--
1 file changed, 29 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 06c2869d3e7a..e94b1eb84e58 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1786,6 +1786,25 @@ xe3plpd_get_lt_buf_trans(struct intel_encoder *encoder,
return intel_get_buf_trans(&xe3plpd_lt_trans_dp14, n_entries);
}
+static enum lt_vswing_preemph_index
+_compute_index_lt(const struct intel_crtc_state *crtc_state)
+{
+ if (intel_crtc_has_dp_encoder(crtc_state) && intel_dp_is_uhbr(crtc_state)) {
+ return XE3P_VS_PE_DP21;
+ } else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
+ /* FIXME need to check correct parsing & table index should
+ * this ever trigger.
+ */
+ drm_WARN(to_intel_display(crtc_state)->drm, 1,
+ "Ask to override EDP's vswing/preemph tables\n");
+ return XE3P_VS_PE_EDP;
+ } else {
+ return XE3P_VS_PE_DP14;
+ }
+
+ return (enum lt_vswing_preemph_index) 0;
+}
+
static union ddi_vswing_preemph_index
vswing_preemph_compute_index(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
@@ -1793,8 +1812,12 @@ vswing_preemph_compute_index(struct intel_encoder *encoder,
struct intel_display *display = to_intel_display(encoder);
union ddi_vswing_preemph_index index;
- drm_dbg_kms(display->drm, "using default VS/PE Override index");
- index = (union ddi_vswing_preemph_index) 0;
+ if (HAS_LT_PHY(display)) {
+ index.lt = _compute_index_lt(crtc_state);
+ } else {
+ drm_dbg_kms(display->drm, "using default VS/PE Override index");
+ index = (union ddi_vswing_preemph_index) 0;
+ }
return index;
}
@@ -1803,6 +1826,10 @@ static int
vswing_preemph_cast_index(struct intel_display *display,
union ddi_vswing_preemph_index index)
{
+ if (HAS_LT_PHY(display)) {
+ return index.lt;
+ }
+
return 0;
}
--
2.45.2
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v1 13/16] drm/i915/buf_trans: compute Snps's VS/PE Override index
2026-03-31 18:33 [PATCH v1 00/16] VS/PE Override support Michał Grzelak
` (11 preceding siblings ...)
2026-03-31 18:33 ` [PATCH v1 12/16] drm/i915/buf_trans: compute LT's VS/PE Override index Michał Grzelak
@ 2026-03-31 18:33 ` Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 14/16] drm/i915/buf_trans: compute EHL's " Michał Grzelak
` (6 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Michał Grzelak @ 2026-03-31 18:33 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Michał Grzelak
Add support for VS/PE Override on Snps platforms. Basing on the mode &
CRTC type found, compute the most appropriate index. Assume default
index as 0.
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
.../drm/i915/display/intel_ddi_buf_trans.c | 37 +++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index e94b1eb84e58..6978ad32ef2a 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1786,6 +1786,36 @@ xe3plpd_get_lt_buf_trans(struct intel_encoder *encoder,
return intel_get_buf_trans(&xe3plpd_lt_trans_dp14, n_entries);
}
+static enum snps_vswing_preemph_index
+_compute_index_snps_c10(const struct intel_crtc_state *crtc_state)
+{
+ if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP)) {
+ if (crtc_state->port_clock > 270000)
+ return MTL_C10_VS_PE_DP14_HBR2_HBR3;
+ else
+ return MTL_C10_VS_PE_DP14_RBR_HBR;
+ } else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)){
+ if (crtc_state->port_clock > 540000)
+ return MTL_C10_VS_PE_EDP_HBR3;
+ else
+ return MTL_C10_VS_PE_EDP_NON_HBR3;
+ }
+
+ return (enum snps_vswing_preemph_index) 0;
+}
+
+static enum snps_vswing_preemph_index
+_compute_index_snps_c20(const struct intel_crtc_state *crtc_state)
+{
+ if (intel_crtc_has_dp_encoder(crtc_state) && intel_dp_is_uhbr(crtc_state)) {
+ return MTL_C20_VS_PE_DP20;
+ } else if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
+ return MTL_C20_VS_PE_DP14;
+ }
+
+ return (enum snps_vswing_preemph_index) 0;
+}
+
static enum lt_vswing_preemph_index
_compute_index_lt(const struct intel_crtc_state *crtc_state)
{
@@ -1814,6 +1844,11 @@ vswing_preemph_compute_index(struct intel_encoder *encoder,
if (HAS_LT_PHY(display)) {
index.lt = _compute_index_lt(crtc_state);
+ } else if (DISPLAY_VER(display) >= 14) {
+ if (intel_encoder_is_c10phy(encoder))
+ index.snps = _compute_index_snps_c10(crtc_state);
+ else
+ index.snps = _compute_index_snps_c20(crtc_state);
} else {
drm_dbg_kms(display->drm, "using default VS/PE Override index");
index = (union ddi_vswing_preemph_index) 0;
@@ -1828,6 +1863,8 @@ vswing_preemph_cast_index(struct intel_display *display,
{
if (HAS_LT_PHY(display)) {
return index.lt;
+ } else if (DISPLAY_VER(display) >= 14) {
+ return index.snps;
}
return 0;
--
2.45.2
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v1 14/16] drm/i915/buf_trans: compute EHL's VS/PE Override index
2026-03-31 18:33 [PATCH v1 00/16] VS/PE Override support Michał Grzelak
` (12 preceding siblings ...)
2026-03-31 18:33 ` [PATCH v1 13/16] drm/i915/buf_trans: compute Snps's " Michał Grzelak
@ 2026-03-31 18:33 ` Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 15/16] drm/i915/bios: search for VBT #57 by default Michał Grzelak
` (5 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Michał Grzelak @ 2026-03-31 18:33 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Michał Grzelak
Add a placeholder for VS/PE Override index computation on EHL. Assume
default index as 0.
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 6978ad32ef2a..7ebc1480c4b4 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1786,6 +1786,12 @@ xe3plpd_get_lt_buf_trans(struct intel_encoder *encoder,
return intel_get_buf_trans(&xe3plpd_lt_trans_dp14, n_entries);
}
+static enum icl_vswing_preemph_index
+_compute_index_icl(const struct intel_crtc_state *crtc_state)
+{
+ return (enum icl_vswing_preemph_index) 0;
+}
+
static enum snps_vswing_preemph_index
_compute_index_snps_c10(const struct intel_crtc_state *crtc_state)
{
@@ -1849,6 +1855,8 @@ vswing_preemph_compute_index(struct intel_encoder *encoder,
index.snps = _compute_index_snps_c10(crtc_state);
else
index.snps = _compute_index_snps_c20(crtc_state);
+ } else if (display->platform.elkhartlake) {
+ index.icl = _compute_index_icl(crtc_state);
} else {
drm_dbg_kms(display->drm, "using default VS/PE Override index");
index = (union ddi_vswing_preemph_index) 0;
@@ -1865,6 +1873,8 @@ vswing_preemph_cast_index(struct intel_display *display,
return index.lt;
} else if (DISPLAY_VER(display) >= 14) {
return index.snps;
+ } else if (display->platform.elkhartlake) {
+ return index.icl;
}
return 0;
--
2.45.2
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v1 15/16] drm/i915/bios: search for VBT #57 by default
2026-03-31 18:33 [PATCH v1 00/16] VS/PE Override support Michał Grzelak
` (13 preceding siblings ...)
2026-03-31 18:33 ` [PATCH v1 14/16] drm/i915/buf_trans: compute EHL's " Michał Grzelak
@ 2026-03-31 18:33 ` Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 16/16] drm/i915/bios: remove VS/PE Override warning Michał Grzelak
` (4 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Michał Grzelak @ 2026-03-31 18:33 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Michał Grzelak
Start searching for Vswing / Preemphasis Override Block on VBT parsing.
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index a0a5399711d6..89c479925f6d 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -206,6 +206,8 @@ static const struct {
.min_size = sizeof(struct bdb_mipi_sequence) },
{ .section_id = BDB_COMPRESSION_PARAMETERS,
.min_size = sizeof(struct bdb_compression_parameters), },
+ { .section_id = BDB_VSWING_PREEMPH,
+ .min_size = sizeof(struct bdb_vswing_preemph), },
{ .section_id = BDB_GENERIC_DTD,
.min_size = sizeof(struct bdb_generic_dtd), },
};
--
2.45.2
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v1 16/16] drm/i915/bios: remove VS/PE Override warning
2026-03-31 18:33 [PATCH v1 00/16] VS/PE Override support Michał Grzelak
` (14 preceding siblings ...)
2026-03-31 18:33 ` [PATCH v1 15/16] drm/i915/bios: search for VBT #57 by default Michał Grzelak
@ 2026-03-31 18:33 ` Michał Grzelak
2026-03-31 20:52 ` ✗ CI.checkpatch: warning for VS/PE Override support Patchwork
` (3 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Michał Grzelak @ 2026-03-31 18:33 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Michał Grzelak
There is not much use of drm_WARN() from print_ddi_port() since
searching for VBT #57 is switched on by default. Remove it and
child_device from print_ddi_port() since drm_WARN() was the only user of
it.
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 9 ---------
1 file changed, 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 89c479925f6d..78ae953e040a 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2869,7 +2869,6 @@ static bool is_port_valid(struct intel_display *display, enum port port)
static void print_ddi_port(const struct intel_bios_encoder_data *devdata)
{
struct intel_display *display = devdata->display;
- const struct child_device_config *child = &devdata->child;
bool is_dvi, is_hdmi, is_dp, is_edp, is_dsi, is_crt, supports_typec_usb, supports_tbt;
int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
enum port port;
@@ -2942,14 +2941,6 @@ static void print_ddi_port(const struct intel_bios_encoder_data *devdata)
drm_dbg_kms(display->drm,
"Port %c VBT DP max link rate: %d\n",
port_name(port), dp_max_link_rate);
-
- /*
- * FIXME need to implement support for VBT
- * vswing/preemph tables should this ever trigger.
- */
- drm_WARN(display->drm, child->use_vbt_vswing,
- "Port %c asks to use VBT vswing/preemph tables\n",
- port_name(port));
}
static void parse_ddi_port(struct intel_bios_encoder_data *devdata)
--
2.45.2
^ permalink raw reply related [flat|nested] 23+ messages in thread
* ✗ CI.checkpatch: warning for VS/PE Override support
2026-03-31 18:33 [PATCH v1 00/16] VS/PE Override support Michał Grzelak
` (15 preceding siblings ...)
2026-03-31 18:33 ` [PATCH v1 16/16] drm/i915/bios: remove VS/PE Override warning Michał Grzelak
@ 2026-03-31 20:52 ` Patchwork
2026-03-31 20:53 ` ✓ CI.KUnit: success " Patchwork
` (2 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2026-03-31 20:52 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-xe
== Series Details ==
Series: VS/PE Override support
URL : https://patchwork.freedesktop.org/series/164195/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 7c6e91cdbf73dd708206ef6c3f94d32014f0b1e7
Author: Michał Grzelak <michal.grzelak@intel.com>
Date: Tue Mar 31 20:33:32 2026 +0200
drm/i915/bios: remove VS/PE Override warning
There is not much use of drm_WARN() from print_ddi_port() since
searching for VBT #57 is switched on by default. Remove it and
child_device from print_ddi_port() since drm_WARN() was the only user of
it.
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
+ /mt/dim checkpatch 3ad1bb41eb2b0a6f40601c2b69ebf4b8a2f09e69 drm-intel
0b110b591562 drm/i915/lt: align xe3plpd with VS/PE Override layout
-:37: ERROR:SPACING: space prohibited before that ',' (ctx:WxW)
#37: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1121:
+ { .lt = { 21, 0, 0 , 1, 0 } },
^
-:38: ERROR:SPACING: space prohibited before that ',' (ctx:WxW)
#38: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1122:
+ { .lt = { 24, 0, 3 , 1, 1 } },
^
-:39: ERROR:SPACING: space prohibited before that ',' (ctx:WxW)
#39: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1123:
+ { .lt = { 28, 0, 7 , 1, 2 } },
^
-:41: ERROR:SPACING: space prohibited before that ',' (ctx:WxW)
#41: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1125:
+ { .lt = { 27, 0, 0 , 1, 1 } },
^
-:42: ERROR:SPACING: space prohibited before that ',' (ctx:WxW)
#42: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1126:
+ { .lt = { 31, 0, 4 , 1, 2 } },
^
-:43: ERROR:SPACING: space prohibited before that ',' (ctx:WxW)
#43: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1127:
+ { .lt = { 39, 0, 9 , 0, 3 } },
^
-:44: ERROR:SPACING: space prohibited before that ',' (ctx:WxW)
#44: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1128:
+ { .lt = { 35, 0, 0 , 1, 2 } },
^
-:45: ERROR:SPACING: space prohibited before that ',' (ctx:WxW)
#45: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1129:
+ { .lt = { 41, 0, 7 , 0, 3 } },
^
-:46: ERROR:SPACING: space prohibited before that ',' (ctx:WxW)
#46: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1130:
+ { .lt = { 48, 0, 0 , 0, 3 } },
^
-:67: ERROR:SPACING: space prohibited before that ',' (ctx:WxW)
#67: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1135:
+ { .lt = { 48, 0, 0 , 0, 0 } },
^
-:68: ERROR:SPACING: space prohibited before that ',' (ctx:WxW)
#68: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1136:
+ { .lt = { 43, 0, 5 , 0, 0 } },
^
-:69: ERROR:SPACING: space prohibited before that ',' (ctx:WxW)
#69: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1137:
+ { .lt = { 40, 0, 8 , 0, 0 } },
^
-:72: ERROR:SPACING: space prohibited before that ',' (ctx:WxW)
#72: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1140:
+ { .lt = { 46, 2, 0 , 0, 0 } },
^
-:73: ERROR:SPACING: space prohibited before that ',' (ctx:WxW)
#73: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1141:
+ { .lt = { 42, 2, 4 , 0, 0 } },
^
-:74: ERROR:SPACING: space prohibited before that ',' (ctx:WxW)
#74: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1142:
+ { .lt = { 38, 2, 8 , 0, 0 } },
^
-:77: ERROR:SPACING: space prohibited before that ',' (ctx:WxW)
#77: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1145:
+ { .lt = { 44, 4, 0 , 0, 0 } },
^
-:78: ERROR:SPACING: space prohibited before that ',' (ctx:WxW)
#78: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1146:
+ { .lt = { 40, 4, 4 , 0, 0 } },
^
-:79: ERROR:SPACING: space prohibited before that ',' (ctx:WxW)
#79: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1147:
+ { .lt = { 37, 4, 7 , 0, 0 } },
^
-:81: ERROR:SPACING: space prohibited before that ',' (ctx:WxW)
#81: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1149:
+ { .lt = { 40, 8, 0 , 0, 0 } },
^
-:82: ERROR:SPACING: space prohibited before that ',' (ctx:WxW)
#82: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1150:
+ { .lt = { 26, 2, 2 , 1, 0 } },
^
total: 20 errors, 0 warnings, 0 checks, 100 lines checked
46e3f981ef0e drm/i915/buf_trans: switch from u8 to u32
e3bae6adba7a drm/i915/buf_trans: describe VS/PE Override layout
-:30: ERROR:CODE_INDENT: code indent should use tabs where possible
#30: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:78:
+ XE3P_VS_PE_UNSET = -1,$
-:30: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#30: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:78:
+ XE3P_VS_PE_UNSET = -1,$
-:32: ERROR:CODE_INDENT: code indent should use tabs where possible
#32: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:80:
+ XE3P_VS_PE_EDP = 3,$
-:32: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#32: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:80:
+ XE3P_VS_PE_EDP = 3,$
-:33: ERROR:CODE_INDENT: code indent should use tabs where possible
#33: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:81:
+ XE3P_VS_PE_DP14 = 4,$
-:33: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#33: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:81:
+ XE3P_VS_PE_DP14 = 4,$
-:34: ERROR:CODE_INDENT: code indent should use tabs where possible
#34: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:82:
+ XE3P_VS_PE_DP21 = 5$
-:34: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#34: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:82:
+ XE3P_VS_PE_DP21 = 5$
-:38: ERROR:CODE_INDENT: code indent should use tabs where possible
#38: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:86:
+ MTL_C10_VS_PE_UNSET = -1,$
-:38: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#38: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:86:
+ MTL_C10_VS_PE_UNSET = -1,$
-:39: ERROR:CODE_INDENT: code indent should use tabs where possible
#39: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:87:
+ MTL_C10_VS_PE_DP14_RBR_HBR = 0,$
-:39: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#39: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:87:
+ MTL_C10_VS_PE_DP14_RBR_HBR = 0,$
-:40: ERROR:CODE_INDENT: code indent should use tabs where possible
#40: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:88:
+ MTL_C10_VS_PE_DP14_HBR2_HBR3 = 1,$
-:40: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#40: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:88:
+ MTL_C10_VS_PE_DP14_HBR2_HBR3 = 1,$
-:41: ERROR:CODE_INDENT: code indent should use tabs where possible
#41: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:89:
+ MTL_C10_VS_PE_EDP_NON_HBR3 = 2,$
-:41: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#41: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:89:
+ MTL_C10_VS_PE_EDP_NON_HBR3 = 2,$
-:42: ERROR:CODE_INDENT: code indent should use tabs where possible
#42: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:90:
+ MTL_C10_VS_PE_EDP_HBR3 = 3,$
-:42: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#42: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:90:
+ MTL_C10_VS_PE_EDP_HBR3 = 3,$
-:44: ERROR:CODE_INDENT: code indent should use tabs where possible
#44: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:92:
+ MTL_C20_VS_PE_DP14 = 4,$
-:44: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#44: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:92:
+ MTL_C20_VS_PE_DP14 = 4,$
-:45: ERROR:CODE_INDENT: code indent should use tabs where possible
#45: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:93:
+ MTL_C20_VS_PE_DP20 = 5$
-:45: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#45: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:93:
+ MTL_C20_VS_PE_DP20 = 5$
-:49: ERROR:CODE_INDENT: code indent should use tabs where possible
#49: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:97:
+ ICL_VS_PE_UNSET = -1,$
-:49: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#49: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:97:
+ ICL_VS_PE_UNSET = -1,$
-:50: ERROR:CODE_INDENT: code indent should use tabs where possible
#50: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:98:
+ ICL_VS_PE_DEFAULT = 0$
-:50: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#50: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:98:
+ ICL_VS_PE_DEFAULT = 0$
-:54: ERROR:CODE_INDENT: code indent should use tabs where possible
#54: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:102:
+ enum lt_vswing_preemph_index lt;$
-:54: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#54: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:102:
+ enum lt_vswing_preemph_index lt;$
-:55: ERROR:CODE_INDENT: code indent should use tabs where possible
#55: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:103:
+ enum snps_vswing_preemph_index snps;$
-:55: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#55: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:103:
+ enum snps_vswing_preemph_index snps;$
-:56: ERROR:CODE_INDENT: code indent should use tabs where possible
#56: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:104:
+ enum icl_vswing_preemph_index icl;$
-:56: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#56: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:104:
+ enum icl_vswing_preemph_index icl;$
-:60: ERROR:CODE_INDENT: code indent should use tabs where possible
#60: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:108:
+ struct intel_ddi_buf_trans *buf_trans;$
-:60: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#60: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:108:
+ struct intel_ddi_buf_trans *buf_trans;$
-:61: ERROR:CODE_INDENT: code indent should use tabs where possible
#61: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:109:
+ union ddi_vswing_preemph_index index;$
-:61: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#61: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h:109:
+ union ddi_vswing_preemph_index index;$
total: 18 errors, 18 warnings, 0 checks, 41 lines checked
7ed62266408e drm/i915/bios: prepare for parsing VBT #57
-:58: WARNING:ALLOC_WITH_MULTIPLY: Prefer kzalloc_objs over kzalloc with multiply
#58: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2205:
+ bufs_table = kzalloc(block->num_tables * sizeof(*bufs_table), GFP_KERNEL);
-:61: WARNING:ALLOC_WITH_MULTIPLY: Prefer kzalloc_objs over kzalloc with multiply
#61: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2208:
+ bufs_table[idx] = kzalloc(num_rows * sizeof(**bufs_table), GFP_KERNEL);
total: 0 errors, 2 warnings, 0 checks, 89 lines checked
428d1c55339a drm/i915/bios: parse LT's VS/PE Override Block #57
22f1846e1307 drm/i915/bios: parse Snps's VS/PE Override Block #57
916a01a248cd drm/i915/bios: parse EHL's VS/PE Override Block #57
-:34: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#34: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2193:
+parse_vswing_preemph_icl(union intel_ddi_buf_trans_entry **bufs_table,
+ const struct bdb_vswing_preemph *block)
total: 0 errors, 0 warnings, 1 checks, 43 lines checked
bec2eacf64df drm/i915/bios: support VS/PE Override per each ddi port
-:48: CHECK:SPACING: No space is necessary after a cast
#48: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2767:
+ devdata->vswing_preemph.index = (union ddi_vswing_preemph_index) -1;
-:53: WARNING:ALLOC_WITH_SIZEOF: Prefer kzalloc_obj over kzalloc with sizeof
#53: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2772:
+ buf_trans = kzalloc(sizeof(*buf_trans), GFP_KERNEL);
-:74: CHECK:SPACING: No space is necessary after a cast
#74: FILE: drivers/gpu/drm/i915/display/intel_bios.c:3178:
+ (union ddi_vswing_preemph_index) -1;
-:84: WARNING:NEEDLESS_IF: kfree(NULL) is safe and this check is probably not required
#84: FILE: drivers/gpu/drm/i915/display/intel_bios.c:3514:
+ if (devdata->vswing_preemph.buf_trans)
+ kfree(devdata->vswing_preemph.buf_trans);
total: 0 errors, 2 warnings, 2 checks, 72 lines checked
49c21d7e12ca drm/i915/bios: print VS/PE Override port info
24fab0471e03 drm/i915/ddi: cache VS/PE struct pointer into intel_encoder
9db9b055c14d drm/i915/buf_trans: override encoder->get_buf_trans when asked
-:61: CHECK:SPACING: No space is necessary after a cast
#61: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1797:
+ index = (union ddi_vswing_preemph_index) 0;
-:68: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#68: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1804:
+vswing_preemph_cast_index(struct intel_display *display,
+ union ddi_vswing_preemph_index index)
-:90: CHECK:SPACING: No space is necessary after a cast
#90: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1826:
+ vswing_preemph = (void *) encoder->vswing_preemph;
-:95: CHECK:SPACING: No space is necessary after a cast
#95: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1831:
+ buf_trans = (void *) encoder->vswing_preemph->buf_trans;
total: 0 errors, 0 warnings, 4 checks, 71 lines checked
e7535085d2de drm/i915/buf_trans: compute LT's VS/PE Override index
-:27: ERROR:CODE_INDENT: code indent should use tabs where possible
#27: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1792:
+ if (intel_crtc_has_dp_encoder(crtc_state) && intel_dp_is_uhbr(crtc_state)) {$
-:27: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#27: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1792:
+ if (intel_crtc_has_dp_encoder(crtc_state) && intel_dp_is_uhbr(crtc_state)) {$
-:28: ERROR:CODE_INDENT: code indent should use tabs where possible
#28: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1793:
+ return XE3P_VS_PE_DP21;$
-:28: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#28: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1793:
+ return XE3P_VS_PE_DP21;$
-:29: ERROR:CODE_INDENT: code indent should use tabs where possible
#29: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1794:
+ } else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {$
-:29: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#29: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1794:
+ } else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {$
-:30: ERROR:CODE_INDENT: code indent should use tabs where possible
#30: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1795:
+ /* FIXME need to check correct parsing & table index should$
-:31: ERROR:CODE_INDENT: code indent should use tabs where possible
#31: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1796:
+ * this ever trigger.$
-:31: WARNING:BLOCK_COMMENT_STYLE: Block comments should align the * on each line
#31: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1796:
+ /* FIXME need to check correct parsing & table index should
+ * this ever trigger.
-:32: ERROR:CODE_INDENT: code indent should use tabs where possible
#32: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1797:
+ */$
-:33: ERROR:CODE_INDENT: code indent should use tabs where possible
#33: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1798:
+ drm_WARN(to_intel_display(crtc_state)->drm, 1,$
-:33: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#33: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1798:
+ drm_WARN(to_intel_display(crtc_state)->drm, 1,$
-:34: ERROR:CODE_INDENT: code indent should use tabs where possible
#34: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1799:
+ "Ask to override EDP's vswing/preemph tables\n");$
-:34: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#34: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1799:
+ "Ask to override EDP's vswing/preemph tables\n");$
-:35: ERROR:CODE_INDENT: code indent should use tabs where possible
#35: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1800:
+ return XE3P_VS_PE_EDP;$
-:35: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#35: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1800:
+ return XE3P_VS_PE_EDP;$
-:36: ERROR:CODE_INDENT: code indent should use tabs where possible
#36: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1801:
+ } else {$
-:36: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#36: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1801:
+ } else {$
-:37: ERROR:CODE_INDENT: code indent should use tabs where possible
#37: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1802:
+ return XE3P_VS_PE_DP14;$
-:37: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#37: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1802:
+ return XE3P_VS_PE_DP14;$
-:38: ERROR:CODE_INDENT: code indent should use tabs where possible
#38: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1803:
+ }$
-:38: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#38: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1803:
+ }$
-:40: ERROR:CODE_INDENT: code indent should use tabs where possible
#40: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1805:
+ return (enum lt_vswing_preemph_index) 0;$
-:40: CHECK:SPACING: No space is necessary after a cast
#40: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1805:
+ return (enum lt_vswing_preemph_index) 0;
-:40: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#40: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1805:
+ return (enum lt_vswing_preemph_index) 0;$
-:56: CHECK:SPACING: No space is necessary after a cast
#56: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1819:
+ index = (union ddi_vswing_preemph_index) 0;
-:65: WARNING:BRACES: braces {} are not necessary for single statement blocks
#65: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1829:
+ if (HAS_LT_PHY(display)) {
+ return index.lt;
+ }
total: 13 errors, 12 warnings, 2 checks, 49 lines checked
356efcbabbd8 drm/i915/buf_trans: compute Snps's VS/PE Override index
-:26: ERROR:CODE_INDENT: code indent should use tabs where possible
#26: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1792:
+ if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP)) {$
-:26: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#26: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1792:
+ if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP)) {$
-:28: ERROR:CODE_INDENT: code indent should use tabs where possible
#28: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1794:
+ return MTL_C10_VS_PE_DP14_HBR2_HBR3;$
-:28: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#28: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1794:
+ return MTL_C10_VS_PE_DP14_HBR2_HBR3;$
-:29: ERROR:CODE_INDENT: code indent should use tabs where possible
#29: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1795:
+ else$
-:29: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#29: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1795:
+ else$
-:30: ERROR:CODE_INDENT: code indent should use tabs where possible
#30: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1796:
+ return MTL_C10_VS_PE_DP14_RBR_HBR;$
-:30: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#30: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1796:
+ return MTL_C10_VS_PE_DP14_RBR_HBR;$
-:31: ERROR:CODE_INDENT: code indent should use tabs where possible
#31: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1797:
+ } else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)){$
-:31: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#31: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1797:
+ } else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)){$
-:31: ERROR:SPACING: space required before the open brace '{'
#31: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1797:
+ } else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)){
-:33: ERROR:CODE_INDENT: code indent should use tabs where possible
#33: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1799:
+ return MTL_C10_VS_PE_EDP_HBR3;$
-:33: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#33: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1799:
+ return MTL_C10_VS_PE_EDP_HBR3;$
-:34: ERROR:CODE_INDENT: code indent should use tabs where possible
#34: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1800:
+ else$
-:34: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#34: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1800:
+ else$
-:35: ERROR:CODE_INDENT: code indent should use tabs where possible
#35: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1801:
+ return MTL_C10_VS_PE_EDP_NON_HBR3;$
-:35: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#35: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1801:
+ return MTL_C10_VS_PE_EDP_NON_HBR3;$
-:36: ERROR:CODE_INDENT: code indent should use tabs where possible
#36: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1802:
+ }$
-:36: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#36: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1802:
+ }$
-:38: ERROR:CODE_INDENT: code indent should use tabs where possible
#38: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1804:
+ return (enum snps_vswing_preemph_index) 0;$
-:38: CHECK:SPACING: No space is necessary after a cast
#38: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1804:
+ return (enum snps_vswing_preemph_index) 0;
-:38: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#38: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1804:
+ return (enum snps_vswing_preemph_index) 0;$
-:44: ERROR:CODE_INDENT: code indent should use tabs where possible
#44: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1810:
+ if (intel_crtc_has_dp_encoder(crtc_state) && intel_dp_is_uhbr(crtc_state)) {$
-:44: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#44: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1810:
+ if (intel_crtc_has_dp_encoder(crtc_state) && intel_dp_is_uhbr(crtc_state)) {$
-:44: WARNING:BRACES: braces {} are not necessary for any arm of this statement
#44: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1810:
+ if (intel_crtc_has_dp_encoder(crtc_state) && intel_dp_is_uhbr(crtc_state)) {
[...]
+ } else if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
[...]
-:45: ERROR:CODE_INDENT: code indent should use tabs where possible
#45: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1811:
+ return MTL_C20_VS_PE_DP20;$
-:45: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#45: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1811:
+ return MTL_C20_VS_PE_DP20;$
-:46: ERROR:CODE_INDENT: code indent should use tabs where possible
#46: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1812:
+ } else if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {$
-:46: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#46: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1812:
+ } else if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {$
-:47: ERROR:CODE_INDENT: code indent should use tabs where possible
#47: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1813:
+ return MTL_C20_VS_PE_DP14;$
-:47: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#47: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1813:
+ return MTL_C20_VS_PE_DP14;$
-:48: ERROR:CODE_INDENT: code indent should use tabs where possible
#48: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1814:
+ }$
-:48: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#48: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1814:
+ }$
-:50: ERROR:CODE_INDENT: code indent should use tabs where possible
#50: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1816:
+ return (enum snps_vswing_preemph_index) 0;$
-:50: CHECK:SPACING: No space is necessary after a cast
#50: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1816:
+ return (enum snps_vswing_preemph_index) 0;
-:50: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#50: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1816:
+ return (enum snps_vswing_preemph_index) 0;$
total: 17 errors, 17 warnings, 2 checks, 55 lines checked
37f17d9475bb drm/i915/buf_trans: compute EHL's VS/PE Override index
-:25: ERROR:CODE_INDENT: code indent should use tabs where possible
#25: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1792:
+ return (enum icl_vswing_preemph_index) 0;$
-:25: CHECK:SPACING: No space is necessary after a cast
#25: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1792:
+ return (enum icl_vswing_preemph_index) 0;
-:25: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#25: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1792:
+ return (enum icl_vswing_preemph_index) 0;$
total: 1 errors, 1 warnings, 1 checks, 28 lines checked
ca5894469ad2 drm/i915/bios: search for VBT #57 by default
7c6e91cdbf73 drm/i915/bios: remove VS/PE Override warning
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✓ CI.KUnit: success for VS/PE Override support
2026-03-31 18:33 [PATCH v1 00/16] VS/PE Override support Michał Grzelak
` (16 preceding siblings ...)
2026-03-31 20:52 ` ✗ CI.checkpatch: warning for VS/PE Override support Patchwork
@ 2026-03-31 20:53 ` Patchwork
2026-03-31 21:35 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-01 4:45 ` ✓ Xe.CI.FULL: " Patchwork
19 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2026-03-31 20:53 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-xe
== Series Details ==
Series: VS/PE Override support
URL : https://patchwork.freedesktop.org/series/164195/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[20:52:41] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:52:45] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:53:17] Starting KUnit Kernel (1/1)...
[20:53:17] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:53:17] ================== guc_buf (11 subtests) ===================
[20:53:17] [PASSED] test_smallest
[20:53:17] [PASSED] test_largest
[20:53:17] [PASSED] test_granular
[20:53:17] [PASSED] test_unique
[20:53:17] [PASSED] test_overlap
[20:53:17] [PASSED] test_reusable
[20:53:17] [PASSED] test_too_big
[20:53:17] [PASSED] test_flush
[20:53:17] [PASSED] test_lookup
[20:53:17] [PASSED] test_data
[20:53:17] [PASSED] test_class
[20:53:17] ===================== [PASSED] guc_buf =====================
[20:53:17] =================== guc_dbm (7 subtests) ===================
[20:53:17] [PASSED] test_empty
[20:53:17] [PASSED] test_default
[20:53:17] ======================== test_size ========================
[20:53:17] [PASSED] 4
[20:53:17] [PASSED] 8
[20:53:17] [PASSED] 32
[20:53:17] [PASSED] 256
[20:53:17] ==================== [PASSED] test_size ====================
[20:53:17] ======================= test_reuse ========================
[20:53:17] [PASSED] 4
[20:53:17] [PASSED] 8
[20:53:17] [PASSED] 32
[20:53:17] [PASSED] 256
[20:53:17] =================== [PASSED] test_reuse ====================
[20:53:17] =================== test_range_overlap ====================
[20:53:17] [PASSED] 4
[20:53:17] [PASSED] 8
[20:53:17] [PASSED] 32
[20:53:17] [PASSED] 256
[20:53:17] =============== [PASSED] test_range_overlap ================
[20:53:17] =================== test_range_compact ====================
[20:53:17] [PASSED] 4
[20:53:17] [PASSED] 8
[20:53:17] [PASSED] 32
[20:53:17] [PASSED] 256
[20:53:17] =============== [PASSED] test_range_compact ================
[20:53:17] ==================== test_range_spare =====================
[20:53:17] [PASSED] 4
[20:53:17] [PASSED] 8
[20:53:17] [PASSED] 32
[20:53:17] [PASSED] 256
[20:53:17] ================ [PASSED] test_range_spare =================
[20:53:17] ===================== [PASSED] guc_dbm =====================
[20:53:17] =================== guc_idm (6 subtests) ===================
[20:53:17] [PASSED] bad_init
[20:53:17] [PASSED] no_init
[20:53:17] [PASSED] init_fini
[20:53:17] [PASSED] check_used
[20:53:17] [PASSED] check_quota
[20:53:17] [PASSED] check_all
[20:53:17] ===================== [PASSED] guc_idm =====================
[20:53:17] ================== no_relay (3 subtests) ===================
[20:53:17] [PASSED] xe_drops_guc2pf_if_not_ready
[20:53:17] [PASSED] xe_drops_guc2vf_if_not_ready
[20:53:17] [PASSED] xe_rejects_send_if_not_ready
[20:53:17] ==================== [PASSED] no_relay =====================
[20:53:17] ================== pf_relay (14 subtests) ==================
[20:53:17] [PASSED] pf_rejects_guc2pf_too_short
[20:53:17] [PASSED] pf_rejects_guc2pf_too_long
[20:53:17] [PASSED] pf_rejects_guc2pf_no_payload
[20:53:17] [PASSED] pf_fails_no_payload
[20:53:17] [PASSED] pf_fails_bad_origin
[20:53:17] [PASSED] pf_fails_bad_type
[20:53:17] [PASSED] pf_txn_reports_error
[20:53:17] [PASSED] pf_txn_sends_pf2guc
[20:53:17] [PASSED] pf_sends_pf2guc
[20:53:17] [SKIPPED] pf_loopback_nop
[20:53:17] [SKIPPED] pf_loopback_echo
[20:53:17] [SKIPPED] pf_loopback_fail
[20:53:17] [SKIPPED] pf_loopback_busy
[20:53:17] [SKIPPED] pf_loopback_retry
[20:53:17] ==================== [PASSED] pf_relay =====================
[20:53:17] ================== vf_relay (3 subtests) ===================
[20:53:17] [PASSED] vf_rejects_guc2vf_too_short
[20:53:17] [PASSED] vf_rejects_guc2vf_too_long
[20:53:17] [PASSED] vf_rejects_guc2vf_no_payload
[20:53:17] ==================== [PASSED] vf_relay =====================
[20:53:17] ================ pf_gt_config (9 subtests) =================
[20:53:17] [PASSED] fair_contexts_1vf
[20:53:17] [PASSED] fair_doorbells_1vf
[20:53:17] [PASSED] fair_ggtt_1vf
[20:53:17] ====================== fair_vram_1vf ======================
[20:53:17] [PASSED] 3.50 GiB
[20:53:17] [PASSED] 11.5 GiB
[20:53:17] [PASSED] 15.5 GiB
[20:53:17] [PASSED] 31.5 GiB
[20:53:17] [PASSED] 63.5 GiB
[20:53:17] [PASSED] 1.91 GiB
[20:53:17] ================== [PASSED] fair_vram_1vf ==================
[20:53:17] ================ fair_vram_1vf_admin_only =================
[20:53:17] [PASSED] 3.50 GiB
[20:53:17] [PASSED] 11.5 GiB
[20:53:17] [PASSED] 15.5 GiB
[20:53:17] [PASSED] 31.5 GiB
[20:53:17] [PASSED] 63.5 GiB
[20:53:17] [PASSED] 1.91 GiB
[20:53:17] ============ [PASSED] fair_vram_1vf_admin_only =============
[20:53:17] ====================== fair_contexts ======================
[20:53:17] [PASSED] 1 VF
[20:53:17] [PASSED] 2 VFs
[20:53:17] [PASSED] 3 VFs
[20:53:17] [PASSED] 4 VFs
[20:53:17] [PASSED] 5 VFs
[20:53:17] [PASSED] 6 VFs
[20:53:17] [PASSED] 7 VFs
[20:53:17] [PASSED] 8 VFs
[20:53:17] [PASSED] 9 VFs
[20:53:17] [PASSED] 10 VFs
[20:53:17] [PASSED] 11 VFs
[20:53:17] [PASSED] 12 VFs
[20:53:17] [PASSED] 13 VFs
[20:53:17] [PASSED] 14 VFs
[20:53:17] [PASSED] 15 VFs
[20:53:17] [PASSED] 16 VFs
[20:53:17] [PASSED] 17 VFs
[20:53:17] [PASSED] 18 VFs
[20:53:17] [PASSED] 19 VFs
[20:53:17] [PASSED] 20 VFs
[20:53:17] [PASSED] 21 VFs
[20:53:17] [PASSED] 22 VFs
[20:53:17] [PASSED] 23 VFs
[20:53:17] [PASSED] 24 VFs
[20:53:17] [PASSED] 25 VFs
[20:53:17] [PASSED] 26 VFs
[20:53:17] [PASSED] 27 VFs
[20:53:17] [PASSED] 28 VFs
[20:53:17] [PASSED] 29 VFs
[20:53:17] [PASSED] 30 VFs
[20:53:17] [PASSED] 31 VFs
[20:53:17] [PASSED] 32 VFs
[20:53:17] [PASSED] 33 VFs
[20:53:17] [PASSED] 34 VFs
[20:53:17] [PASSED] 35 VFs
[20:53:17] [PASSED] 36 VFs
[20:53:17] [PASSED] 37 VFs
[20:53:17] [PASSED] 38 VFs
[20:53:17] [PASSED] 39 VFs
[20:53:17] [PASSED] 40 VFs
[20:53:17] [PASSED] 41 VFs
[20:53:17] [PASSED] 42 VFs
[20:53:17] [PASSED] 43 VFs
[20:53:17] [PASSED] 44 VFs
[20:53:17] [PASSED] 45 VFs
[20:53:17] [PASSED] 46 VFs
[20:53:17] [PASSED] 47 VFs
[20:53:17] [PASSED] 48 VFs
[20:53:17] [PASSED] 49 VFs
[20:53:17] [PASSED] 50 VFs
[20:53:17] [PASSED] 51 VFs
[20:53:17] [PASSED] 52 VFs
[20:53:17] [PASSED] 53 VFs
[20:53:17] [PASSED] 54 VFs
[20:53:17] [PASSED] 55 VFs
[20:53:17] [PASSED] 56 VFs
[20:53:17] [PASSED] 57 VFs
[20:53:17] [PASSED] 58 VFs
[20:53:17] [PASSED] 59 VFs
[20:53:17] [PASSED] 60 VFs
[20:53:17] [PASSED] 61 VFs
[20:53:17] [PASSED] 62 VFs
[20:53:17] [PASSED] 63 VFs
[20:53:17] ================== [PASSED] fair_contexts ==================
[20:53:17] ===================== fair_doorbells ======================
[20:53:17] [PASSED] 1 VF
[20:53:17] [PASSED] 2 VFs
[20:53:17] [PASSED] 3 VFs
[20:53:17] [PASSED] 4 VFs
[20:53:17] [PASSED] 5 VFs
[20:53:17] [PASSED] 6 VFs
[20:53:17] [PASSED] 7 VFs
[20:53:17] [PASSED] 8 VFs
[20:53:17] [PASSED] 9 VFs
[20:53:17] [PASSED] 10 VFs
[20:53:17] [PASSED] 11 VFs
[20:53:17] [PASSED] 12 VFs
[20:53:17] [PASSED] 13 VFs
[20:53:17] [PASSED] 14 VFs
[20:53:17] [PASSED] 15 VFs
[20:53:17] [PASSED] 16 VFs
[20:53:17] [PASSED] 17 VFs
[20:53:17] [PASSED] 18 VFs
[20:53:17] [PASSED] 19 VFs
[20:53:17] [PASSED] 20 VFs
[20:53:17] [PASSED] 21 VFs
[20:53:17] [PASSED] 22 VFs
[20:53:17] [PASSED] 23 VFs
[20:53:17] [PASSED] 24 VFs
[20:53:17] [PASSED] 25 VFs
[20:53:17] [PASSED] 26 VFs
[20:53:17] [PASSED] 27 VFs
[20:53:17] [PASSED] 28 VFs
[20:53:17] [PASSED] 29 VFs
[20:53:17] [PASSED] 30 VFs
[20:53:17] [PASSED] 31 VFs
[20:53:17] [PASSED] 32 VFs
[20:53:17] [PASSED] 33 VFs
[20:53:17] [PASSED] 34 VFs
[20:53:17] [PASSED] 35 VFs
[20:53:17] [PASSED] 36 VFs
[20:53:17] [PASSED] 37 VFs
[20:53:17] [PASSED] 38 VFs
[20:53:17] [PASSED] 39 VFs
[20:53:17] [PASSED] 40 VFs
[20:53:17] [PASSED] 41 VFs
[20:53:17] [PASSED] 42 VFs
[20:53:17] [PASSED] 43 VFs
[20:53:17] [PASSED] 44 VFs
[20:53:17] [PASSED] 45 VFs
[20:53:17] [PASSED] 46 VFs
[20:53:17] [PASSED] 47 VFs
[20:53:17] [PASSED] 48 VFs
[20:53:17] [PASSED] 49 VFs
[20:53:17] [PASSED] 50 VFs
[20:53:17] [PASSED] 51 VFs
[20:53:17] [PASSED] 52 VFs
[20:53:17] [PASSED] 53 VFs
[20:53:17] [PASSED] 54 VFs
[20:53:17] [PASSED] 55 VFs
[20:53:17] [PASSED] 56 VFs
[20:53:17] [PASSED] 57 VFs
[20:53:17] [PASSED] 58 VFs
[20:53:17] [PASSED] 59 VFs
[20:53:17] [PASSED] 60 VFs
[20:53:17] [PASSED] 61 VFs
[20:53:17] [PASSED] 62 VFs
[20:53:17] [PASSED] 63 VFs
[20:53:17] ================= [PASSED] fair_doorbells ==================
[20:53:17] ======================== fair_ggtt ========================
[20:53:17] [PASSED] 1 VF
[20:53:17] [PASSED] 2 VFs
[20:53:17] [PASSED] 3 VFs
[20:53:17] [PASSED] 4 VFs
[20:53:17] [PASSED] 5 VFs
[20:53:17] [PASSED] 6 VFs
[20:53:17] [PASSED] 7 VFs
[20:53:17] [PASSED] 8 VFs
[20:53:17] [PASSED] 9 VFs
[20:53:17] [PASSED] 10 VFs
[20:53:17] [PASSED] 11 VFs
[20:53:17] [PASSED] 12 VFs
[20:53:17] [PASSED] 13 VFs
[20:53:17] [PASSED] 14 VFs
[20:53:17] [PASSED] 15 VFs
[20:53:17] [PASSED] 16 VFs
[20:53:17] [PASSED] 17 VFs
[20:53:17] [PASSED] 18 VFs
[20:53:17] [PASSED] 19 VFs
[20:53:17] [PASSED] 20 VFs
[20:53:17] [PASSED] 21 VFs
[20:53:17] [PASSED] 22 VFs
[20:53:17] [PASSED] 23 VFs
[20:53:17] [PASSED] 24 VFs
[20:53:17] [PASSED] 25 VFs
[20:53:17] [PASSED] 26 VFs
[20:53:17] [PASSED] 27 VFs
[20:53:17] [PASSED] 28 VFs
[20:53:17] [PASSED] 29 VFs
[20:53:17] [PASSED] 30 VFs
[20:53:17] [PASSED] 31 VFs
[20:53:17] [PASSED] 32 VFs
[20:53:17] [PASSED] 33 VFs
[20:53:17] [PASSED] 34 VFs
[20:53:17] [PASSED] 35 VFs
[20:53:17] [PASSED] 36 VFs
[20:53:17] [PASSED] 37 VFs
[20:53:17] [PASSED] 38 VFs
[20:53:17] [PASSED] 39 VFs
[20:53:17] [PASSED] 40 VFs
[20:53:17] [PASSED] 41 VFs
[20:53:17] [PASSED] 42 VFs
[20:53:17] [PASSED] 43 VFs
[20:53:17] [PASSED] 44 VFs
[20:53:17] [PASSED] 45 VFs
[20:53:17] [PASSED] 46 VFs
[20:53:17] [PASSED] 47 VFs
[20:53:17] [PASSED] 48 VFs
[20:53:17] [PASSED] 49 VFs
[20:53:17] [PASSED] 50 VFs
[20:53:17] [PASSED] 51 VFs
[20:53:17] [PASSED] 52 VFs
[20:53:17] [PASSED] 53 VFs
[20:53:17] [PASSED] 54 VFs
[20:53:17] [PASSED] 55 VFs
[20:53:17] [PASSED] 56 VFs
[20:53:17] [PASSED] 57 VFs
[20:53:17] [PASSED] 58 VFs
[20:53:17] [PASSED] 59 VFs
[20:53:17] [PASSED] 60 VFs
[20:53:17] [PASSED] 61 VFs
[20:53:17] [PASSED] 62 VFs
[20:53:17] [PASSED] 63 VFs
[20:53:17] ==================== [PASSED] fair_ggtt ====================
[20:53:17] ======================== fair_vram ========================
[20:53:17] [PASSED] 1 VF
[20:53:17] [PASSED] 2 VFs
[20:53:17] [PASSED] 3 VFs
[20:53:17] [PASSED] 4 VFs
[20:53:17] [PASSED] 5 VFs
[20:53:17] [PASSED] 6 VFs
[20:53:17] [PASSED] 7 VFs
[20:53:17] [PASSED] 8 VFs
[20:53:17] [PASSED] 9 VFs
[20:53:17] [PASSED] 10 VFs
[20:53:17] [PASSED] 11 VFs
[20:53:17] [PASSED] 12 VFs
[20:53:17] [PASSED] 13 VFs
[20:53:17] [PASSED] 14 VFs
[20:53:17] [PASSED] 15 VFs
[20:53:17] [PASSED] 16 VFs
[20:53:17] [PASSED] 17 VFs
[20:53:17] [PASSED] 18 VFs
[20:53:17] [PASSED] 19 VFs
[20:53:17] [PASSED] 20 VFs
[20:53:17] [PASSED] 21 VFs
[20:53:17] [PASSED] 22 VFs
[20:53:17] [PASSED] 23 VFs
[20:53:17] [PASSED] 24 VFs
[20:53:17] [PASSED] 25 VFs
[20:53:17] [PASSED] 26 VFs
[20:53:17] [PASSED] 27 VFs
[20:53:17] [PASSED] 28 VFs
[20:53:17] [PASSED] 29 VFs
[20:53:17] [PASSED] 30 VFs
[20:53:17] [PASSED] 31 VFs
[20:53:17] [PASSED] 32 VFs
[20:53:17] [PASSED] 33 VFs
[20:53:17] [PASSED] 34 VFs
[20:53:17] [PASSED] 35 VFs
[20:53:17] [PASSED] 36 VFs
[20:53:17] [PASSED] 37 VFs
[20:53:17] [PASSED] 38 VFs
[20:53:17] [PASSED] 39 VFs
[20:53:17] [PASSED] 40 VFs
[20:53:17] [PASSED] 41 VFs
[20:53:17] [PASSED] 42 VFs
[20:53:17] [PASSED] 43 VFs
[20:53:17] [PASSED] 44 VFs
[20:53:17] [PASSED] 45 VFs
[20:53:17] [PASSED] 46 VFs
[20:53:17] [PASSED] 47 VFs
[20:53:17] [PASSED] 48 VFs
[20:53:17] [PASSED] 49 VFs
[20:53:17] [PASSED] 50 VFs
[20:53:17] [PASSED] 51 VFs
[20:53:17] [PASSED] 52 VFs
[20:53:17] [PASSED] 53 VFs
[20:53:17] [PASSED] 54 VFs
[20:53:17] [PASSED] 55 VFs
[20:53:17] [PASSED] 56 VFs
[20:53:17] [PASSED] 57 VFs
[20:53:17] [PASSED] 58 VFs
[20:53:17] [PASSED] 59 VFs
[20:53:17] [PASSED] 60 VFs
[20:53:17] [PASSED] 61 VFs
[20:53:17] [PASSED] 62 VFs
[20:53:17] [PASSED] 63 VFs
[20:53:17] ==================== [PASSED] fair_vram ====================
[20:53:17] ================== [PASSED] pf_gt_config ===================
[20:53:17] ===================== lmtt (1 subtest) =====================
[20:53:17] ======================== test_ops =========================
[20:53:17] [PASSED] 2-level
[20:53:17] [PASSED] multi-level
[20:53:17] ==================== [PASSED] test_ops =====================
[20:53:17] ====================== [PASSED] lmtt =======================
[20:53:17] ================= pf_service (11 subtests) =================
[20:53:17] [PASSED] pf_negotiate_any
[20:53:17] [PASSED] pf_negotiate_base_match
[20:53:17] [PASSED] pf_negotiate_base_newer
[20:53:17] [PASSED] pf_negotiate_base_next
[20:53:17] [SKIPPED] pf_negotiate_base_older
[20:53:17] [PASSED] pf_negotiate_base_prev
[20:53:17] [PASSED] pf_negotiate_latest_match
[20:53:17] [PASSED] pf_negotiate_latest_newer
[20:53:17] [PASSED] pf_negotiate_latest_next
[20:53:17] [SKIPPED] pf_negotiate_latest_older
[20:53:17] [SKIPPED] pf_negotiate_latest_prev
[20:53:17] =================== [PASSED] pf_service ====================
[20:53:17] ================= xe_guc_g2g (2 subtests) ==================
[20:53:17] ============== xe_live_guc_g2g_kunit_default ==============
[20:53:17] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[20:53:17] ============== xe_live_guc_g2g_kunit_allmem ===============
[20:53:17] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[20:53:17] =================== [SKIPPED] xe_guc_g2g ===================
[20:53:17] =================== xe_mocs (2 subtests) ===================
[20:53:17] ================ xe_live_mocs_kernel_kunit ================
[20:53:17] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[20:53:17] ================ xe_live_mocs_reset_kunit =================
[20:53:17] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[20:53:17] ==================== [SKIPPED] xe_mocs =====================
[20:53:17] ================= xe_migrate (2 subtests) ==================
[20:53:17] ================= xe_migrate_sanity_kunit =================
[20:53:17] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[20:53:17] ================== xe_validate_ccs_kunit ==================
[20:53:17] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[20:53:17] =================== [SKIPPED] xe_migrate ===================
[20:53:17] ================== xe_dma_buf (1 subtest) ==================
[20:53:17] ==================== xe_dma_buf_kunit =====================
[20:53:17] ================ [SKIPPED] xe_dma_buf_kunit ================
[20:53:17] =================== [SKIPPED] xe_dma_buf ===================
[20:53:17] ================= xe_bo_shrink (1 subtest) =================
[20:53:17] =================== xe_bo_shrink_kunit ====================
[20:53:17] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[20:53:17] ================== [SKIPPED] xe_bo_shrink ==================
[20:53:17] ==================== xe_bo (2 subtests) ====================
[20:53:17] ================== xe_ccs_migrate_kunit ===================
[20:53:17] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[20:53:17] ==================== xe_bo_evict_kunit ====================
[20:53:17] =============== [SKIPPED] xe_bo_evict_kunit ================
[20:53:17] ===================== [SKIPPED] xe_bo ======================
[20:53:17] ==================== args (13 subtests) ====================
[20:53:17] [PASSED] count_args_test
[20:53:17] [PASSED] call_args_example
[20:53:17] [PASSED] call_args_test
[20:53:17] [PASSED] drop_first_arg_example
[20:53:17] [PASSED] drop_first_arg_test
[20:53:17] [PASSED] first_arg_example
[20:53:17] [PASSED] first_arg_test
[20:53:17] [PASSED] last_arg_example
[20:53:17] [PASSED] last_arg_test
[20:53:17] [PASSED] pick_arg_example
[20:53:17] [PASSED] if_args_example
[20:53:17] [PASSED] if_args_test
[20:53:17] [PASSED] sep_comma_example
[20:53:17] ====================== [PASSED] args =======================
[20:53:17] =================== xe_pci (3 subtests) ====================
[20:53:17] ==================== check_graphics_ip ====================
[20:53:17] [PASSED] 12.00 Xe_LP
[20:53:17] [PASSED] 12.10 Xe_LP+
[20:53:17] [PASSED] 12.55 Xe_HPG
[20:53:17] [PASSED] 12.60 Xe_HPC
[20:53:17] [PASSED] 12.70 Xe_LPG
[20:53:17] [PASSED] 12.71 Xe_LPG
[20:53:17] [PASSED] 12.74 Xe_LPG+
[20:53:17] [PASSED] 20.01 Xe2_HPG
[20:53:17] [PASSED] 20.02 Xe2_HPG
[20:53:17] [PASSED] 20.04 Xe2_LPG
[20:53:17] [PASSED] 30.00 Xe3_LPG
[20:53:17] [PASSED] 30.01 Xe3_LPG
[20:53:17] [PASSED] 30.03 Xe3_LPG
[20:53:17] [PASSED] 30.04 Xe3_LPG
[20:53:17] [PASSED] 30.05 Xe3_LPG
[20:53:17] [PASSED] 35.10 Xe3p_LPG
[20:53:17] [PASSED] 35.11 Xe3p_XPC
[20:53:17] ================ [PASSED] check_graphics_ip ================
[20:53:17] ===================== check_media_ip ======================
[20:53:17] [PASSED] 12.00 Xe_M
[20:53:17] [PASSED] 12.55 Xe_HPM
[20:53:17] [PASSED] 13.00 Xe_LPM+
[20:53:17] [PASSED] 13.01 Xe2_HPM
[20:53:17] [PASSED] 20.00 Xe2_LPM
[20:53:17] [PASSED] 30.00 Xe3_LPM
[20:53:17] [PASSED] 30.02 Xe3_LPM
[20:53:17] [PASSED] 35.00 Xe3p_LPM
[20:53:17] [PASSED] 35.03 Xe3p_HPM
[20:53:17] ================= [PASSED] check_media_ip ==================
[20:53:17] =================== check_platform_desc ===================
[20:53:17] [PASSED] 0x9A60 (TIGERLAKE)
[20:53:17] [PASSED] 0x9A68 (TIGERLAKE)
[20:53:17] [PASSED] 0x9A70 (TIGERLAKE)
[20:53:17] [PASSED] 0x9A40 (TIGERLAKE)
[20:53:17] [PASSED] 0x9A49 (TIGERLAKE)
[20:53:17] [PASSED] 0x9A59 (TIGERLAKE)
[20:53:17] [PASSED] 0x9A78 (TIGERLAKE)
[20:53:17] [PASSED] 0x9AC0 (TIGERLAKE)
[20:53:17] [PASSED] 0x9AC9 (TIGERLAKE)
[20:53:17] [PASSED] 0x9AD9 (TIGERLAKE)
[20:53:17] [PASSED] 0x9AF8 (TIGERLAKE)
[20:53:17] [PASSED] 0x4C80 (ROCKETLAKE)
[20:53:17] [PASSED] 0x4C8A (ROCKETLAKE)
[20:53:17] [PASSED] 0x4C8B (ROCKETLAKE)
[20:53:17] [PASSED] 0x4C8C (ROCKETLAKE)
[20:53:17] [PASSED] 0x4C90 (ROCKETLAKE)
[20:53:17] [PASSED] 0x4C9A (ROCKETLAKE)
[20:53:17] [PASSED] 0x4680 (ALDERLAKE_S)
[20:53:17] [PASSED] 0x4682 (ALDERLAKE_S)
[20:53:17] [PASSED] 0x4688 (ALDERLAKE_S)
[20:53:17] [PASSED] 0x468A (ALDERLAKE_S)
[20:53:17] [PASSED] 0x468B (ALDERLAKE_S)
[20:53:17] [PASSED] 0x4690 (ALDERLAKE_S)
[20:53:17] [PASSED] 0x4692 (ALDERLAKE_S)
[20:53:17] [PASSED] 0x4693 (ALDERLAKE_S)
[20:53:17] [PASSED] 0x46A0 (ALDERLAKE_P)
[20:53:17] [PASSED] 0x46A1 (ALDERLAKE_P)
[20:53:17] [PASSED] 0x46A2 (ALDERLAKE_P)
[20:53:17] [PASSED] 0x46A3 (ALDERLAKE_P)
[20:53:17] [PASSED] 0x46A6 (ALDERLAKE_P)
[20:53:17] [PASSED] 0x46A8 (ALDERLAKE_P)
[20:53:17] [PASSED] 0x46AA (ALDERLAKE_P)
[20:53:17] [PASSED] 0x462A (ALDERLAKE_P)
[20:53:17] [PASSED] 0x4626 (ALDERLAKE_P)
[20:53:17] [PASSED] 0x4628 (ALDERLAKE_P)
[20:53:17] [PASSED] 0x46B0 (ALDERLAKE_P)
[20:53:17] [PASSED] 0x46B1 (ALDERLAKE_P)
[20:53:17] [PASSED] 0x46B2 (ALDERLAKE_P)
[20:53:17] [PASSED] 0x46B3 (ALDERLAKE_P)
[20:53:17] [PASSED] 0x46C0 (ALDERLAKE_P)
[20:53:17] [PASSED] 0x46C1 (ALDERLAKE_P)
[20:53:17] [PASSED] 0x46C2 (ALDERLAKE_P)
[20:53:17] [PASSED] 0x46C3 (ALDERLAKE_P)
[20:53:17] [PASSED] 0x46D0 (ALDERLAKE_N)
[20:53:17] [PASSED] 0x46D1 (ALDERLAKE_N)
[20:53:17] [PASSED] 0x46D2 (ALDERLAKE_N)
[20:53:17] [PASSED] 0x46D3 (ALDERLAKE_N)
[20:53:17] [PASSED] 0x46D4 (ALDERLAKE_N)
[20:53:17] [PASSED] 0xA721 (ALDERLAKE_P)
[20:53:17] [PASSED] 0xA7A1 (ALDERLAKE_P)
[20:53:17] [PASSED] 0xA7A9 (ALDERLAKE_P)
[20:53:17] [PASSED] 0xA7AC (ALDERLAKE_P)
[20:53:17] [PASSED] 0xA7AD (ALDERLAKE_P)
[20:53:17] [PASSED] 0xA720 (ALDERLAKE_P)
[20:53:17] [PASSED] 0xA7A0 (ALDERLAKE_P)
[20:53:17] [PASSED] 0xA7A8 (ALDERLAKE_P)
[20:53:17] [PASSED] 0xA7AA (ALDERLAKE_P)
[20:53:17] [PASSED] 0xA7AB (ALDERLAKE_P)
[20:53:17] [PASSED] 0xA780 (ALDERLAKE_S)
[20:53:17] [PASSED] 0xA781 (ALDERLAKE_S)
[20:53:17] [PASSED] 0xA782 (ALDERLAKE_S)
[20:53:17] [PASSED] 0xA783 (ALDERLAKE_S)
[20:53:17] [PASSED] 0xA788 (ALDERLAKE_S)
[20:53:17] [PASSED] 0xA789 (ALDERLAKE_S)
[20:53:17] [PASSED] 0xA78A (ALDERLAKE_S)
[20:53:17] [PASSED] 0xA78B (ALDERLAKE_S)
[20:53:17] [PASSED] 0x4905 (DG1)
[20:53:17] [PASSED] 0x4906 (DG1)
[20:53:17] [PASSED] 0x4907 (DG1)
[20:53:17] [PASSED] 0x4908 (DG1)
[20:53:17] [PASSED] 0x4909 (DG1)
[20:53:17] [PASSED] 0x56C0 (DG2)
[20:53:17] [PASSED] 0x56C2 (DG2)
[20:53:17] [PASSED] 0x56C1 (DG2)
[20:53:17] [PASSED] 0x7D51 (METEORLAKE)
[20:53:17] [PASSED] 0x7DD1 (METEORLAKE)
[20:53:17] [PASSED] 0x7D41 (METEORLAKE)
[20:53:17] [PASSED] 0x7D67 (METEORLAKE)
[20:53:17] [PASSED] 0xB640 (METEORLAKE)
[20:53:17] [PASSED] 0x56A0 (DG2)
[20:53:17] [PASSED] 0x56A1 (DG2)
[20:53:17] [PASSED] 0x56A2 (DG2)
[20:53:17] [PASSED] 0x56BE (DG2)
[20:53:17] [PASSED] 0x56BF (DG2)
[20:53:17] [PASSED] 0x5690 (DG2)
[20:53:17] [PASSED] 0x5691 (DG2)
[20:53:17] [PASSED] 0x5692 (DG2)
[20:53:17] [PASSED] 0x56A5 (DG2)
[20:53:17] [PASSED] 0x56A6 (DG2)
[20:53:17] [PASSED] 0x56B0 (DG2)
[20:53:17] [PASSED] 0x56B1 (DG2)
[20:53:17] [PASSED] 0x56BA (DG2)
[20:53:17] [PASSED] 0x56BB (DG2)
[20:53:17] [PASSED] 0x56BC (DG2)
[20:53:17] [PASSED] 0x56BD (DG2)
[20:53:17] [PASSED] 0x5693 (DG2)
[20:53:17] [PASSED] 0x5694 (DG2)
[20:53:17] [PASSED] 0x5695 (DG2)
[20:53:17] [PASSED] 0x56A3 (DG2)
[20:53:17] [PASSED] 0x56A4 (DG2)
[20:53:17] [PASSED] 0x56B2 (DG2)
[20:53:17] [PASSED] 0x56B3 (DG2)
[20:53:17] [PASSED] 0x5696 (DG2)
[20:53:17] [PASSED] 0x5697 (DG2)
[20:53:17] [PASSED] 0xB69 (PVC)
[20:53:17] [PASSED] 0xB6E (PVC)
[20:53:17] [PASSED] 0xBD4 (PVC)
[20:53:17] [PASSED] 0xBD5 (PVC)
[20:53:17] [PASSED] 0xBD6 (PVC)
[20:53:17] [PASSED] 0xBD7 (PVC)
[20:53:17] [PASSED] 0xBD8 (PVC)
[20:53:17] [PASSED] 0xBD9 (PVC)
[20:53:17] [PASSED] 0xBDA (PVC)
[20:53:17] [PASSED] 0xBDB (PVC)
[20:53:17] [PASSED] 0xBE0 (PVC)
[20:53:17] [PASSED] 0xBE1 (PVC)
[20:53:17] [PASSED] 0xBE5 (PVC)
[20:53:17] [PASSED] 0x7D40 (METEORLAKE)
[20:53:17] [PASSED] 0x7D45 (METEORLAKE)
[20:53:17] [PASSED] 0x7D55 (METEORLAKE)
[20:53:17] [PASSED] 0x7D60 (METEORLAKE)
[20:53:17] [PASSED] 0x7DD5 (METEORLAKE)
[20:53:17] [PASSED] 0x6420 (LUNARLAKE)
[20:53:17] [PASSED] 0x64A0 (LUNARLAKE)
[20:53:17] [PASSED] 0x64B0 (LUNARLAKE)
[20:53:17] [PASSED] 0xE202 (BATTLEMAGE)
[20:53:17] [PASSED] 0xE209 (BATTLEMAGE)
[20:53:17] [PASSED] 0xE20B (BATTLEMAGE)
[20:53:17] [PASSED] 0xE20C (BATTLEMAGE)
[20:53:17] [PASSED] 0xE20D (BATTLEMAGE)
[20:53:17] [PASSED] 0xE210 (BATTLEMAGE)
[20:53:17] [PASSED] 0xE211 (BATTLEMAGE)
[20:53:17] [PASSED] 0xE212 (BATTLEMAGE)
[20:53:17] [PASSED] 0xE216 (BATTLEMAGE)
[20:53:17] [PASSED] 0xE220 (BATTLEMAGE)
[20:53:17] [PASSED] 0xE221 (BATTLEMAGE)
[20:53:17] [PASSED] 0xE222 (BATTLEMAGE)
[20:53:17] [PASSED] 0xE223 (BATTLEMAGE)
[20:53:17] [PASSED] 0xB080 (PANTHERLAKE)
[20:53:17] [PASSED] 0xB081 (PANTHERLAKE)
[20:53:17] [PASSED] 0xB082 (PANTHERLAKE)
[20:53:17] [PASSED] 0xB083 (PANTHERLAKE)
[20:53:17] [PASSED] 0xB084 (PANTHERLAKE)
[20:53:17] [PASSED] 0xB085 (PANTHERLAKE)
[20:53:17] [PASSED] 0xB086 (PANTHERLAKE)
[20:53:17] [PASSED] 0xB087 (PANTHERLAKE)
[20:53:17] [PASSED] 0xB08F (PANTHERLAKE)
[20:53:17] [PASSED] 0xB090 (PANTHERLAKE)
[20:53:17] [PASSED] 0xB0A0 (PANTHERLAKE)
[20:53:17] [PASSED] 0xB0B0 (PANTHERLAKE)
[20:53:17] [PASSED] 0xFD80 (PANTHERLAKE)
[20:53:17] [PASSED] 0xFD81 (PANTHERLAKE)
[20:53:17] [PASSED] 0xD740 (NOVALAKE_S)
[20:53:17] [PASSED] 0xD741 (NOVALAKE_S)
[20:53:17] [PASSED] 0xD742 (NOVALAKE_S)
[20:53:17] [PASSED] 0xD743 (NOVALAKE_S)
[20:53:17] [PASSED] 0xD744 (NOVALAKE_S)
[20:53:17] [PASSED] 0xD745 (NOVALAKE_S)
[20:53:17] [PASSED] 0x674C (CRESCENTISLAND)
[20:53:17] [PASSED] 0xD750 (NOVALAKE_P)
[20:53:17] [PASSED] 0xD751 (NOVALAKE_P)
[20:53:17] [PASSED] 0xD752 (NOVALAKE_P)
[20:53:17] [PASSED] 0xD753 (NOVALAKE_P)
[20:53:17] [PASSED] 0xD754 (NOVALAKE_P)
[20:53:17] [PASSED] 0xD755 (NOVALAKE_P)
[20:53:17] [PASSED] 0xD756 (NOVALAKE_P)
[20:53:17] [PASSED] 0xD757 (NOVALAKE_P)
[20:53:17] [PASSED] 0xD75F (NOVALAKE_P)
[20:53:17] =============== [PASSED] check_platform_desc ===============
[20:53:17] ===================== [PASSED] xe_pci ======================
[20:53:17] =================== xe_rtp (2 subtests) ====================
[20:53:17] =============== xe_rtp_process_to_sr_tests ================
[20:53:17] [PASSED] coalesce-same-reg
[20:53:17] [PASSED] no-match-no-add
[20:53:17] [PASSED] match-or
[20:53:17] [PASSED] match-or-xfail
[20:53:17] [PASSED] no-match-no-add-multiple-rules
[20:53:17] [PASSED] two-regs-two-entries
[20:53:17] [PASSED] clr-one-set-other
[20:53:17] [PASSED] set-field
[20:53:17] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[20:53:17] [PASSED] conflict-not-disjoint
[20:53:17] [PASSED] conflict-reg-type
[20:53:17] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[20:53:17] ================== xe_rtp_process_tests ===================
[20:53:17] [PASSED] active1
[20:53:17] [PASSED] active2
[20:53:17] [PASSED] active-inactive
[20:53:17] [PASSED] inactive-active
[20:53:17] [PASSED] inactive-1st_or_active-inactive
[20:53:17] [PASSED] inactive-2nd_or_active-inactive
[20:53:17] [PASSED] inactive-last_or_active-inactive
[20:53:17] [PASSED] inactive-no_or_active-inactive
[20:53:17] ============== [PASSED] xe_rtp_process_tests ===============
[20:53:17] ===================== [PASSED] xe_rtp ======================
[20:53:17] ==================== xe_wa (1 subtest) =====================
[20:53:17] ======================== xe_wa_gt =========================
[20:53:17] [PASSED] TIGERLAKE B0
[20:53:17] [PASSED] DG1 A0
[20:53:17] [PASSED] DG1 B0
[20:53:17] [PASSED] ALDERLAKE_S A0
[20:53:17] [PASSED] ALDERLAKE_S B0
[20:53:17] [PASSED] ALDERLAKE_S C0
[20:53:17] [PASSED] ALDERLAKE_S D0
[20:53:17] [PASSED] ALDERLAKE_P A0
[20:53:17] [PASSED] ALDERLAKE_P B0
[20:53:17] [PASSED] ALDERLAKE_P C0
[20:53:17] [PASSED] ALDERLAKE_S RPLS D0
[20:53:17] [PASSED] ALDERLAKE_P RPLU E0
[20:53:17] [PASSED] DG2 G10 C0
[20:53:17] [PASSED] DG2 G11 B1
[20:53:17] [PASSED] DG2 G12 A1
[20:53:17] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[20:53:17] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[20:53:17] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[20:53:17] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[20:53:17] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[20:53:17] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[20:53:17] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[20:53:17] ==================== [PASSED] xe_wa_gt =====================
[20:53:17] ====================== [PASSED] xe_wa ======================
[20:53:17] ============================================================
[20:53:17] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[20:53:17] Elapsed time: 36.267s total, 4.290s configuring, 31.359s building, 0.589s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[20:53:18] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:53:19] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:53:44] Starting KUnit Kernel (1/1)...
[20:53:44] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:53:44] ============ drm_test_pick_cmdline (2 subtests) ============
[20:53:44] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[20:53:44] =============== drm_test_pick_cmdline_named ===============
[20:53:44] [PASSED] NTSC
[20:53:44] [PASSED] NTSC-J
[20:53:44] [PASSED] PAL
[20:53:44] [PASSED] PAL-M
[20:53:44] =========== [PASSED] drm_test_pick_cmdline_named ===========
[20:53:44] ============== [PASSED] drm_test_pick_cmdline ==============
[20:53:44] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[20:53:44] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[20:53:44] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[20:53:44] =========== drm_validate_clone_mode (2 subtests) ===========
[20:53:44] ============== drm_test_check_in_clone_mode ===============
[20:53:44] [PASSED] in_clone_mode
[20:53:44] [PASSED] not_in_clone_mode
[20:53:44] ========== [PASSED] drm_test_check_in_clone_mode ===========
[20:53:44] =============== drm_test_check_valid_clones ===============
[20:53:44] [PASSED] not_in_clone_mode
[20:53:44] [PASSED] valid_clone
[20:53:44] [PASSED] invalid_clone
[20:53:44] =========== [PASSED] drm_test_check_valid_clones ===========
[20:53:44] ============= [PASSED] drm_validate_clone_mode =============
[20:53:44] ============= drm_validate_modeset (1 subtest) =============
[20:53:44] [PASSED] drm_test_check_connector_changed_modeset
[20:53:44] ============== [PASSED] drm_validate_modeset ===============
[20:53:44] ====== drm_test_bridge_get_current_state (2 subtests) ======
[20:53:44] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[20:53:44] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[20:53:44] ======== [PASSED] drm_test_bridge_get_current_state ========
[20:53:44] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[20:53:44] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[20:53:44] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[20:53:44] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[20:53:44] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[20:53:44] ============== drm_bridge_alloc (2 subtests) ===============
[20:53:44] [PASSED] drm_test_drm_bridge_alloc_basic
[20:53:44] [PASSED] drm_test_drm_bridge_alloc_get_put
[20:53:44] ================ [PASSED] drm_bridge_alloc =================
[20:53:44] ============= drm_cmdline_parser (40 subtests) =============
[20:53:44] [PASSED] drm_test_cmdline_force_d_only
[20:53:44] [PASSED] drm_test_cmdline_force_D_only_dvi
[20:53:44] [PASSED] drm_test_cmdline_force_D_only_hdmi
[20:53:44] [PASSED] drm_test_cmdline_force_D_only_not_digital
[20:53:44] [PASSED] drm_test_cmdline_force_e_only
[20:53:44] [PASSED] drm_test_cmdline_res
[20:53:44] [PASSED] drm_test_cmdline_res_vesa
[20:53:44] [PASSED] drm_test_cmdline_res_vesa_rblank
[20:53:44] [PASSED] drm_test_cmdline_res_rblank
[20:53:44] [PASSED] drm_test_cmdline_res_bpp
[20:53:44] [PASSED] drm_test_cmdline_res_refresh
[20:53:44] [PASSED] drm_test_cmdline_res_bpp_refresh
[20:53:44] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[20:53:44] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[20:53:44] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[20:53:44] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[20:53:44] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[20:53:44] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[20:53:44] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[20:53:44] [PASSED] drm_test_cmdline_res_margins_force_on
[20:53:44] [PASSED] drm_test_cmdline_res_vesa_margins
[20:53:44] [PASSED] drm_test_cmdline_name
[20:53:44] [PASSED] drm_test_cmdline_name_bpp
[20:53:44] [PASSED] drm_test_cmdline_name_option
[20:53:44] [PASSED] drm_test_cmdline_name_bpp_option
[20:53:44] [PASSED] drm_test_cmdline_rotate_0
[20:53:44] [PASSED] drm_test_cmdline_rotate_90
[20:53:44] [PASSED] drm_test_cmdline_rotate_180
[20:53:44] [PASSED] drm_test_cmdline_rotate_270
[20:53:44] [PASSED] drm_test_cmdline_hmirror
[20:53:44] [PASSED] drm_test_cmdline_vmirror
[20:53:44] [PASSED] drm_test_cmdline_margin_options
[20:53:44] [PASSED] drm_test_cmdline_multiple_options
[20:53:44] [PASSED] drm_test_cmdline_bpp_extra_and_option
[20:53:44] [PASSED] drm_test_cmdline_extra_and_option
[20:53:44] [PASSED] drm_test_cmdline_freestanding_options
[20:53:44] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[20:53:44] [PASSED] drm_test_cmdline_panel_orientation
[20:53:44] ================ drm_test_cmdline_invalid =================
[20:53:44] [PASSED] margin_only
[20:53:44] [PASSED] interlace_only
[20:53:44] [PASSED] res_missing_x
[20:53:44] [PASSED] res_missing_y
[20:53:44] [PASSED] res_bad_y
[20:53:44] [PASSED] res_missing_y_bpp
[20:53:44] [PASSED] res_bad_bpp
[20:53:44] [PASSED] res_bad_refresh
[20:53:44] [PASSED] res_bpp_refresh_force_on_off
[20:53:44] [PASSED] res_invalid_mode
[20:53:44] [PASSED] res_bpp_wrong_place_mode
[20:53:44] [PASSED] name_bpp_refresh
[20:53:44] [PASSED] name_refresh
[20:53:44] [PASSED] name_refresh_wrong_mode
[20:53:44] [PASSED] name_refresh_invalid_mode
[20:53:44] [PASSED] rotate_multiple
[20:53:44] [PASSED] rotate_invalid_val
[20:53:44] [PASSED] rotate_truncated
[20:53:44] [PASSED] invalid_option
[20:53:44] [PASSED] invalid_tv_option
[20:53:44] [PASSED] truncated_tv_option
[20:53:44] ============ [PASSED] drm_test_cmdline_invalid =============
[20:53:44] =============== drm_test_cmdline_tv_options ===============
[20:53:44] [PASSED] NTSC
[20:53:44] [PASSED] NTSC_443
[20:53:44] [PASSED] NTSC_J
[20:53:44] [PASSED] PAL
[20:53:44] [PASSED] PAL_M
[20:53:44] [PASSED] PAL_N
[20:53:44] [PASSED] SECAM
[20:53:44] [PASSED] MONO_525
[20:53:44] [PASSED] MONO_625
[20:53:44] =========== [PASSED] drm_test_cmdline_tv_options ===========
[20:53:44] =============== [PASSED] drm_cmdline_parser ================
[20:53:44] ========== drmm_connector_hdmi_init (20 subtests) ==========
[20:53:44] [PASSED] drm_test_connector_hdmi_init_valid
[20:53:44] [PASSED] drm_test_connector_hdmi_init_bpc_8
[20:53:44] [PASSED] drm_test_connector_hdmi_init_bpc_10
[20:53:44] [PASSED] drm_test_connector_hdmi_init_bpc_12
[20:53:44] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[20:53:44] [PASSED] drm_test_connector_hdmi_init_bpc_null
[20:53:44] [PASSED] drm_test_connector_hdmi_init_formats_empty
[20:53:44] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[20:53:44] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[20:53:44] [PASSED] supported_formats=0x9 yuv420_allowed=1
[20:53:44] [PASSED] supported_formats=0x9 yuv420_allowed=0
[20:53:44] [PASSED] supported_formats=0x5 yuv420_allowed=1
[20:53:44] [PASSED] supported_formats=0x5 yuv420_allowed=0
[20:53:44] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[20:53:44] [PASSED] drm_test_connector_hdmi_init_null_ddc
[20:53:44] [PASSED] drm_test_connector_hdmi_init_null_product
[20:53:44] [PASSED] drm_test_connector_hdmi_init_null_vendor
[20:53:44] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[20:53:44] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[20:53:44] [PASSED] drm_test_connector_hdmi_init_product_valid
[20:53:44] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[20:53:44] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[20:53:44] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[20:53:44] ========= drm_test_connector_hdmi_init_type_valid =========
[20:53:44] [PASSED] HDMI-A
[20:53:44] [PASSED] HDMI-B
[20:53:44] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[20:53:44] ======== drm_test_connector_hdmi_init_type_invalid ========
[20:53:44] [PASSED] Unknown
[20:53:44] [PASSED] VGA
[20:53:44] [PASSED] DVI-I
[20:53:44] [PASSED] DVI-D
[20:53:44] [PASSED] DVI-A
[20:53:44] [PASSED] Composite
[20:53:44] [PASSED] SVIDEO
[20:53:44] [PASSED] LVDS
[20:53:44] [PASSED] Component
[20:53:44] [PASSED] DIN
[20:53:44] [PASSED] DP
[20:53:44] [PASSED] TV
[20:53:44] [PASSED] eDP
[20:53:44] [PASSED] Virtual
[20:53:44] [PASSED] DSI
[20:53:44] [PASSED] DPI
[20:53:44] [PASSED] Writeback
[20:53:44] [PASSED] SPI
[20:53:44] [PASSED] USB
[20:53:44] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[20:53:44] ============ [PASSED] drmm_connector_hdmi_init =============
[20:53:44] ============= drmm_connector_init (3 subtests) =============
[20:53:44] [PASSED] drm_test_drmm_connector_init
[20:53:44] [PASSED] drm_test_drmm_connector_init_null_ddc
[20:53:44] ========= drm_test_drmm_connector_init_type_valid =========
[20:53:44] [PASSED] Unknown
[20:53:44] [PASSED] VGA
[20:53:44] [PASSED] DVI-I
[20:53:44] [PASSED] DVI-D
[20:53:44] [PASSED] DVI-A
[20:53:44] [PASSED] Composite
[20:53:44] [PASSED] SVIDEO
[20:53:44] [PASSED] LVDS
[20:53:44] [PASSED] Component
[20:53:44] [PASSED] DIN
[20:53:44] [PASSED] DP
[20:53:44] [PASSED] HDMI-A
[20:53:44] [PASSED] HDMI-B
[20:53:44] [PASSED] TV
[20:53:44] [PASSED] eDP
[20:53:44] [PASSED] Virtual
[20:53:44] [PASSED] DSI
[20:53:44] [PASSED] DPI
[20:53:44] [PASSED] Writeback
[20:53:44] [PASSED] SPI
[20:53:44] [PASSED] USB
[20:53:44] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[20:53:44] =============== [PASSED] drmm_connector_init ===============
[20:53:44] ========= drm_connector_dynamic_init (6 subtests) ==========
[20:53:44] [PASSED] drm_test_drm_connector_dynamic_init
[20:53:44] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[20:53:44] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[20:53:44] [PASSED] drm_test_drm_connector_dynamic_init_properties
[20:53:44] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[20:53:44] [PASSED] Unknown
[20:53:44] [PASSED] VGA
[20:53:44] [PASSED] DVI-I
[20:53:44] [PASSED] DVI-D
[20:53:44] [PASSED] DVI-A
[20:53:44] [PASSED] Composite
[20:53:44] [PASSED] SVIDEO
[20:53:44] [PASSED] LVDS
[20:53:44] [PASSED] Component
[20:53:44] [PASSED] DIN
[20:53:44] [PASSED] DP
[20:53:44] [PASSED] HDMI-A
[20:53:44] [PASSED] HDMI-B
[20:53:44] [PASSED] TV
[20:53:44] [PASSED] eDP
[20:53:44] [PASSED] Virtual
[20:53:44] [PASSED] DSI
[20:53:44] [PASSED] DPI
[20:53:44] [PASSED] Writeback
[20:53:44] [PASSED] SPI
[20:53:44] [PASSED] USB
[20:53:44] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[20:53:44] ======== drm_test_drm_connector_dynamic_init_name =========
[20:53:44] [PASSED] Unknown
[20:53:44] [PASSED] VGA
[20:53:44] [PASSED] DVI-I
[20:53:44] [PASSED] DVI-D
[20:53:44] [PASSED] DVI-A
[20:53:44] [PASSED] Composite
[20:53:44] [PASSED] SVIDEO
[20:53:44] [PASSED] LVDS
[20:53:44] [PASSED] Component
[20:53:44] [PASSED] DIN
[20:53:44] [PASSED] DP
[20:53:44] [PASSED] HDMI-A
[20:53:44] [PASSED] HDMI-B
[20:53:44] [PASSED] TV
[20:53:44] [PASSED] eDP
[20:53:44] [PASSED] Virtual
[20:53:44] [PASSED] DSI
[20:53:44] [PASSED] DPI
[20:53:44] [PASSED] Writeback
[20:53:44] [PASSED] SPI
[20:53:44] [PASSED] USB
[20:53:44] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[20:53:44] =========== [PASSED] drm_connector_dynamic_init ============
[20:53:44] ==== drm_connector_dynamic_register_early (4 subtests) =====
[20:53:44] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[20:53:44] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[20:53:44] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[20:53:44] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[20:53:44] ====== [PASSED] drm_connector_dynamic_register_early =======
[20:53:44] ======= drm_connector_dynamic_register (7 subtests) ========
[20:53:44] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[20:53:44] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[20:53:44] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[20:53:44] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[20:53:44] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[20:53:44] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[20:53:44] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[20:53:44] ========= [PASSED] drm_connector_dynamic_register ==========
[20:53:44] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[20:53:44] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[20:53:44] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[20:53:44] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[20:53:44] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[20:53:44] ========== drm_test_get_tv_mode_from_name_valid ===========
[20:53:44] [PASSED] NTSC
[20:53:44] [PASSED] NTSC-443
[20:53:44] [PASSED] NTSC-J
[20:53:44] [PASSED] PAL
[20:53:44] [PASSED] PAL-M
[20:53:44] [PASSED] PAL-N
[20:53:44] [PASSED] SECAM
[20:53:44] [PASSED] Mono
[20:53:44] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[20:53:44] [PASSED] drm_test_get_tv_mode_from_name_truncated
[20:53:44] ============ [PASSED] drm_get_tv_mode_from_name ============
[20:53:44] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[20:53:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[20:53:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[20:53:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[20:53:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[20:53:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[20:53:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[20:53:44] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[20:53:44] [PASSED] VIC 96
[20:53:44] [PASSED] VIC 97
[20:53:44] [PASSED] VIC 101
[20:53:44] [PASSED] VIC 102
[20:53:44] [PASSED] VIC 106
[20:53:44] [PASSED] VIC 107
[20:53:44] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[20:53:44] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[20:53:44] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[20:53:44] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[20:53:44] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[20:53:44] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[20:53:44] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[20:53:44] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[20:53:44] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[20:53:44] [PASSED] Automatic
[20:53:44] [PASSED] Full
[20:53:44] [PASSED] Limited 16:235
[20:53:44] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[20:53:44] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[20:53:44] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[20:53:44] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[20:53:44] === drm_test_drm_hdmi_connector_get_output_format_name ====
[20:53:44] [PASSED] RGB
[20:53:44] [PASSED] YUV 4:2:0
[20:53:44] [PASSED] YUV 4:2:2
[20:53:44] [PASSED] YUV 4:4:4
[20:53:44] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[20:53:44] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[20:53:44] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[20:53:44] ============= drm_damage_helper (21 subtests) ==============
[20:53:44] [PASSED] drm_test_damage_iter_no_damage
[20:53:44] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[20:53:44] [PASSED] drm_test_damage_iter_no_damage_src_moved
[20:53:44] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[20:53:44] [PASSED] drm_test_damage_iter_no_damage_not_visible
[20:53:44] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[20:53:44] [PASSED] drm_test_damage_iter_no_damage_no_fb
[20:53:44] [PASSED] drm_test_damage_iter_simple_damage
[20:53:44] [PASSED] drm_test_damage_iter_single_damage
[20:53:44] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[20:53:44] [PASSED] drm_test_damage_iter_single_damage_outside_src
[20:53:44] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[20:53:44] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[20:53:44] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[20:53:44] [PASSED] drm_test_damage_iter_single_damage_src_moved
[20:53:44] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[20:53:44] [PASSED] drm_test_damage_iter_damage
[20:53:44] [PASSED] drm_test_damage_iter_damage_one_intersect
[20:53:44] [PASSED] drm_test_damage_iter_damage_one_outside
[20:53:44] [PASSED] drm_test_damage_iter_damage_src_moved
[20:53:44] [PASSED] drm_test_damage_iter_damage_not_visible
[20:53:44] ================ [PASSED] drm_damage_helper ================
[20:53:44] ============== drm_dp_mst_helper (3 subtests) ==============
[20:53:44] ============== drm_test_dp_mst_calc_pbn_mode ==============
[20:53:44] [PASSED] Clock 154000 BPP 30 DSC disabled
[20:53:44] [PASSED] Clock 234000 BPP 30 DSC disabled
[20:53:44] [PASSED] Clock 297000 BPP 24 DSC disabled
[20:53:44] [PASSED] Clock 332880 BPP 24 DSC enabled
[20:53:44] [PASSED] Clock 324540 BPP 24 DSC enabled
[20:53:44] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[20:53:44] ============== drm_test_dp_mst_calc_pbn_div ===============
[20:53:44] [PASSED] Link rate 2000000 lane count 4
[20:53:44] [PASSED] Link rate 2000000 lane count 2
[20:53:44] [PASSED] Link rate 2000000 lane count 1
[20:53:44] [PASSED] Link rate 1350000 lane count 4
[20:53:44] [PASSED] Link rate 1350000 lane count 2
[20:53:44] [PASSED] Link rate 1350000 lane count 1
[20:53:44] [PASSED] Link rate 1000000 lane count 4
[20:53:44] [PASSED] Link rate 1000000 lane count 2
[20:53:44] [PASSED] Link rate 1000000 lane count 1
[20:53:44] [PASSED] Link rate 810000 lane count 4
[20:53:44] [PASSED] Link rate 810000 lane count 2
[20:53:44] [PASSED] Link rate 810000 lane count 1
[20:53:44] [PASSED] Link rate 540000 lane count 4
[20:53:44] [PASSED] Link rate 540000 lane count 2
[20:53:44] [PASSED] Link rate 540000 lane count 1
[20:53:44] [PASSED] Link rate 270000 lane count 4
[20:53:44] [PASSED] Link rate 270000 lane count 2
[20:53:44] [PASSED] Link rate 270000 lane count 1
[20:53:44] [PASSED] Link rate 162000 lane count 4
[20:53:44] [PASSED] Link rate 162000 lane count 2
[20:53:44] [PASSED] Link rate 162000 lane count 1
[20:53:44] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[20:53:44] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[20:53:44] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[20:53:44] [PASSED] DP_POWER_UP_PHY with port number
[20:53:44] [PASSED] DP_POWER_DOWN_PHY with port number
[20:53:44] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[20:53:44] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[20:53:44] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[20:53:44] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[20:53:44] [PASSED] DP_QUERY_PAYLOAD with port number
[20:53:44] [PASSED] DP_QUERY_PAYLOAD with VCPI
[20:53:44] [PASSED] DP_REMOTE_DPCD_READ with port number
[20:53:44] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[20:53:44] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[20:53:44] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[20:53:44] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[20:53:44] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[20:53:44] [PASSED] DP_REMOTE_I2C_READ with port number
[20:53:44] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[20:53:44] [PASSED] DP_REMOTE_I2C_READ with transactions array
[20:53:44] [PASSED] DP_REMOTE_I2C_WRITE with port number
[20:53:44] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[20:53:44] [PASSED] DP_REMOTE_I2C_WRITE with data array
[20:53:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[20:53:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[20:53:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[20:53:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[20:53:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[20:53:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[20:53:44] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[20:53:44] ================ [PASSED] drm_dp_mst_helper ================
[20:53:44] ================== drm_exec (7 subtests) ===================
[20:53:44] [PASSED] sanitycheck
[20:53:44] [PASSED] test_lock
[20:53:44] [PASSED] test_lock_unlock
[20:53:44] [PASSED] test_duplicates
[20:53:44] [PASSED] test_prepare
[20:53:44] [PASSED] test_prepare_array
[20:53:44] [PASSED] test_multiple_loops
[20:53:44] ==================== [PASSED] drm_exec =====================
[20:53:44] =========== drm_format_helper_test (17 subtests) ===========
[20:53:44] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[20:53:44] [PASSED] single_pixel_source_buffer
[20:53:44] [PASSED] single_pixel_clip_rectangle
[20:53:44] [PASSED] well_known_colors
[20:53:44] [PASSED] destination_pitch
[20:53:44] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[20:53:44] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[20:53:44] [PASSED] single_pixel_source_buffer
[20:53:44] [PASSED] single_pixel_clip_rectangle
[20:53:44] [PASSED] well_known_colors
[20:53:44] [PASSED] destination_pitch
[20:53:44] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[20:53:44] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[20:53:44] [PASSED] single_pixel_source_buffer
[20:53:44] [PASSED] single_pixel_clip_rectangle
[20:53:44] [PASSED] well_known_colors
[20:53:44] [PASSED] destination_pitch
[20:53:44] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[20:53:44] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[20:53:44] [PASSED] single_pixel_source_buffer
[20:53:44] [PASSED] single_pixel_clip_rectangle
[20:53:44] [PASSED] well_known_colors
[20:53:44] [PASSED] destination_pitch
[20:53:44] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[20:53:44] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[20:53:44] [PASSED] single_pixel_source_buffer
[20:53:44] [PASSED] single_pixel_clip_rectangle
[20:53:44] [PASSED] well_known_colors
[20:53:44] [PASSED] destination_pitch
[20:53:44] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[20:53:44] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[20:53:44] [PASSED] single_pixel_source_buffer
[20:53:44] [PASSED] single_pixel_clip_rectangle
[20:53:44] [PASSED] well_known_colors
[20:53:44] [PASSED] destination_pitch
[20:53:44] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[20:53:44] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[20:53:44] [PASSED] single_pixel_source_buffer
[20:53:44] [PASSED] single_pixel_clip_rectangle
[20:53:44] [PASSED] well_known_colors
[20:53:44] [PASSED] destination_pitch
[20:53:44] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[20:53:44] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[20:53:44] [PASSED] single_pixel_source_buffer
[20:53:44] [PASSED] single_pixel_clip_rectangle
[20:53:44] [PASSED] well_known_colors
[20:53:44] [PASSED] destination_pitch
[20:53:44] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[20:53:44] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[20:53:44] [PASSED] single_pixel_source_buffer
[20:53:44] [PASSED] single_pixel_clip_rectangle
[20:53:44] [PASSED] well_known_colors
[20:53:44] [PASSED] destination_pitch
[20:53:44] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[20:53:44] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[20:53:44] [PASSED] single_pixel_source_buffer
[20:53:44] [PASSED] single_pixel_clip_rectangle
[20:53:44] [PASSED] well_known_colors
[20:53:44] [PASSED] destination_pitch
[20:53:44] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[20:53:44] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[20:53:44] [PASSED] single_pixel_source_buffer
[20:53:44] [PASSED] single_pixel_clip_rectangle
[20:53:44] [PASSED] well_known_colors
[20:53:44] [PASSED] destination_pitch
[20:53:44] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[20:53:44] ============== drm_test_fb_xrgb8888_to_mono ===============
[20:53:44] [PASSED] single_pixel_source_buffer
[20:53:44] [PASSED] single_pixel_clip_rectangle
[20:53:44] [PASSED] well_known_colors
[20:53:44] [PASSED] destination_pitch
[20:53:44] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[20:53:44] ==================== drm_test_fb_swab =====================
[20:53:44] [PASSED] single_pixel_source_buffer
[20:53:44] [PASSED] single_pixel_clip_rectangle
[20:53:44] [PASSED] well_known_colors
[20:53:44] [PASSED] destination_pitch
[20:53:44] ================ [PASSED] drm_test_fb_swab =================
[20:53:44] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[20:53:44] [PASSED] single_pixel_source_buffer
[20:53:44] [PASSED] single_pixel_clip_rectangle
[20:53:44] [PASSED] well_known_colors
[20:53:44] [PASSED] destination_pitch
[20:53:44] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[20:53:44] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[20:53:44] [PASSED] single_pixel_source_buffer
[20:53:44] [PASSED] single_pixel_clip_rectangle
[20:53:44] [PASSED] well_known_colors
[20:53:44] [PASSED] destination_pitch
[20:53:44] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[20:53:44] ================= drm_test_fb_clip_offset =================
[20:53:44] [PASSED] pass through
[20:53:44] [PASSED] horizontal offset
[20:53:44] [PASSED] vertical offset
[20:53:44] [PASSED] horizontal and vertical offset
[20:53:44] [PASSED] horizontal offset (custom pitch)
[20:53:44] [PASSED] vertical offset (custom pitch)
[20:53:44] [PASSED] horizontal and vertical offset (custom pitch)
[20:53:44] ============= [PASSED] drm_test_fb_clip_offset =============
[20:53:44] =================== drm_test_fb_memcpy ====================
[20:53:44] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[20:53:44] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[20:53:44] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[20:53:44] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[20:53:44] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[20:53:44] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[20:53:44] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[20:53:44] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[20:53:44] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[20:53:44] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[20:53:44] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[20:53:44] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[20:53:44] =============== [PASSED] drm_test_fb_memcpy ================
[20:53:44] ============= [PASSED] drm_format_helper_test ==============
[20:53:44] ================= drm_format (18 subtests) =================
[20:53:44] [PASSED] drm_test_format_block_width_invalid
[20:53:44] [PASSED] drm_test_format_block_width_one_plane
[20:53:44] [PASSED] drm_test_format_block_width_two_plane
[20:53:44] [PASSED] drm_test_format_block_width_three_plane
[20:53:44] [PASSED] drm_test_format_block_width_tiled
[20:53:44] [PASSED] drm_test_format_block_height_invalid
[20:53:44] [PASSED] drm_test_format_block_height_one_plane
[20:53:44] [PASSED] drm_test_format_block_height_two_plane
[20:53:44] [PASSED] drm_test_format_block_height_three_plane
[20:53:44] [PASSED] drm_test_format_block_height_tiled
[20:53:44] [PASSED] drm_test_format_min_pitch_invalid
[20:53:44] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[20:53:44] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[20:53:44] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[20:53:44] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[20:53:44] [PASSED] drm_test_format_min_pitch_two_plane
[20:53:44] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[20:53:44] [PASSED] drm_test_format_min_pitch_tiled
[20:53:44] =================== [PASSED] drm_format ====================
[20:53:44] ============== drm_framebuffer (10 subtests) ===============
[20:53:44] ========== drm_test_framebuffer_check_src_coords ==========
[20:53:44] [PASSED] Success: source fits into fb
[20:53:44] [PASSED] Fail: overflowing fb with x-axis coordinate
[20:53:44] [PASSED] Fail: overflowing fb with y-axis coordinate
[20:53:44] [PASSED] Fail: overflowing fb with source width
[20:53:44] [PASSED] Fail: overflowing fb with source height
[20:53:44] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[20:53:44] [PASSED] drm_test_framebuffer_cleanup
[20:53:44] =============== drm_test_framebuffer_create ===============
[20:53:44] [PASSED] ABGR8888 normal sizes
[20:53:44] [PASSED] ABGR8888 max sizes
[20:53:44] [PASSED] ABGR8888 pitch greater than min required
[20:53:44] [PASSED] ABGR8888 pitch less than min required
[20:53:44] [PASSED] ABGR8888 Invalid width
[20:53:44] [PASSED] ABGR8888 Invalid buffer handle
[20:53:44] [PASSED] No pixel format
[20:53:44] [PASSED] ABGR8888 Width 0
[20:53:44] [PASSED] ABGR8888 Height 0
[20:53:44] [PASSED] ABGR8888 Out of bound height * pitch combination
[20:53:44] [PASSED] ABGR8888 Large buffer offset
[20:53:44] [PASSED] ABGR8888 Buffer offset for inexistent plane
[20:53:44] [PASSED] ABGR8888 Invalid flag
[20:53:44] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[20:53:44] [PASSED] ABGR8888 Valid buffer modifier
[20:53:44] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[20:53:44] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[20:53:44] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[20:53:44] [PASSED] NV12 Normal sizes
[20:53:44] [PASSED] NV12 Max sizes
[20:53:44] [PASSED] NV12 Invalid pitch
[20:53:44] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[20:53:44] [PASSED] NV12 different modifier per-plane
[20:53:44] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[20:53:44] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[20:53:44] [PASSED] NV12 Modifier for inexistent plane
[20:53:44] [PASSED] NV12 Handle for inexistent plane
[20:53:44] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[20:53:44] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[20:53:44] [PASSED] YVU420 Normal sizes
[20:53:44] [PASSED] YVU420 Max sizes
[20:53:44] [PASSED] YVU420 Invalid pitch
[20:53:44] [PASSED] YVU420 Different pitches
[20:53:44] [PASSED] YVU420 Different buffer offsets/pitches
[20:53:44] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[20:53:44] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[20:53:44] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[20:53:44] [PASSED] YVU420 Valid modifier
[20:53:44] [PASSED] YVU420 Different modifiers per plane
[20:53:44] [PASSED] YVU420 Modifier for inexistent plane
[20:53:44] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[20:53:44] [PASSED] X0L2 Normal sizes
[20:53:44] [PASSED] X0L2 Max sizes
[20:53:44] [PASSED] X0L2 Invalid pitch
[20:53:44] [PASSED] X0L2 Pitch greater than minimum required
[20:53:44] [PASSED] X0L2 Handle for inexistent plane
[20:53:44] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[20:53:44] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[20:53:44] [PASSED] X0L2 Valid modifier
[20:53:44] [PASSED] X0L2 Modifier for inexistent plane
[20:53:44] =========== [PASSED] drm_test_framebuffer_create ===========
[20:53:44] [PASSED] drm_test_framebuffer_free
[20:53:44] [PASSED] drm_test_framebuffer_init
[20:53:44] [PASSED] drm_test_framebuffer_init_bad_format
[20:53:44] [PASSED] drm_test_framebuffer_init_dev_mismatch
[20:53:44] [PASSED] drm_test_framebuffer_lookup
[20:53:44] [PASSED] drm_test_framebuffer_lookup_inexistent
[20:53:44] [PASSED] drm_test_framebuffer_modifiers_not_supported
[20:53:44] ================= [PASSED] drm_framebuffer =================
[20:53:44] ================ drm_gem_shmem (8 subtests) ================
[20:53:44] [PASSED] drm_gem_shmem_test_obj_create
[20:53:44] [PASSED] drm_gem_shmem_test_obj_create_private
[20:53:44] [PASSED] drm_gem_shmem_test_pin_pages
[20:53:44] [PASSED] drm_gem_shmem_test_vmap
[20:53:44] [PASSED] drm_gem_shmem_test_get_sg_table
[20:53:44] [PASSED] drm_gem_shmem_test_get_pages_sgt
[20:53:44] [PASSED] drm_gem_shmem_test_madvise
[20:53:44] [PASSED] drm_gem_shmem_test_purge
[20:53:44] ================== [PASSED] drm_gem_shmem ==================
[20:53:44] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[20:53:44] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[20:53:44] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[20:53:44] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[20:53:44] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[20:53:44] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[20:53:44] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[20:53:44] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[20:53:44] [PASSED] Automatic
[20:53:44] [PASSED] Full
[20:53:44] [PASSED] Limited 16:235
[20:53:44] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[20:53:44] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[20:53:44] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[20:53:44] [PASSED] drm_test_check_disable_connector
[20:53:44] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[20:53:44] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[20:53:44] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[20:53:44] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[20:53:44] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[20:53:44] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[20:53:44] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[20:53:44] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[20:53:44] [PASSED] drm_test_check_output_bpc_dvi
[20:53:44] [PASSED] drm_test_check_output_bpc_format_vic_1
[20:53:44] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[20:53:44] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[20:53:44] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[20:53:44] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[20:53:44] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[20:53:44] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[20:53:44] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[20:53:44] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[20:53:44] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[20:53:44] [PASSED] drm_test_check_broadcast_rgb_value
[20:53:44] [PASSED] drm_test_check_bpc_8_value
[20:53:44] [PASSED] drm_test_check_bpc_10_value
[20:53:44] [PASSED] drm_test_check_bpc_12_value
[20:53:44] [PASSED] drm_test_check_format_value
[20:53:44] [PASSED] drm_test_check_tmds_char_value
[20:53:44] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[20:53:44] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[20:53:44] [PASSED] drm_test_check_mode_valid
[20:53:44] [PASSED] drm_test_check_mode_valid_reject
[20:53:44] [PASSED] drm_test_check_mode_valid_reject_rate
[20:53:44] [PASSED] drm_test_check_mode_valid_reject_max_clock
[20:53:44] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[20:53:44] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[20:53:44] [PASSED] drm_test_check_infoframes
[20:53:44] [PASSED] drm_test_check_reject_avi_infoframe
[20:53:44] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[20:53:44] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[20:53:44] [PASSED] drm_test_check_reject_audio_infoframe
[20:53:44] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[20:53:44] ================= drm_managed (2 subtests) =================
[20:53:44] [PASSED] drm_test_managed_release_action
[20:53:44] [PASSED] drm_test_managed_run_action
[20:53:44] =================== [PASSED] drm_managed ===================
[20:53:44] =================== drm_mm (6 subtests) ====================
[20:53:44] [PASSED] drm_test_mm_init
[20:53:44] [PASSED] drm_test_mm_debug
[20:53:44] [PASSED] drm_test_mm_align32
[20:53:44] [PASSED] drm_test_mm_align64
[20:53:44] [PASSED] drm_test_mm_lowest
[20:53:44] [PASSED] drm_test_mm_highest
[20:53:44] ===================== [PASSED] drm_mm ======================
[20:53:44] ============= drm_modes_analog_tv (5 subtests) =============
[20:53:44] [PASSED] drm_test_modes_analog_tv_mono_576i
[20:53:44] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[20:53:44] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[20:53:44] [PASSED] drm_test_modes_analog_tv_pal_576i
[20:53:44] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[20:53:44] =============== [PASSED] drm_modes_analog_tv ===============
[20:53:44] ============== drm_plane_helper (2 subtests) ===============
[20:53:44] =============== drm_test_check_plane_state ================
[20:53:44] [PASSED] clipping_simple
[20:53:44] [PASSED] clipping_rotate_reflect
[20:53:44] [PASSED] positioning_simple
[20:53:44] [PASSED] upscaling
[20:53:44] [PASSED] downscaling
[20:53:44] [PASSED] rounding1
[20:53:44] [PASSED] rounding2
[20:53:44] [PASSED] rounding3
[20:53:44] [PASSED] rounding4
[20:53:44] =========== [PASSED] drm_test_check_plane_state ============
[20:53:44] =========== drm_test_check_invalid_plane_state ============
[20:53:44] [PASSED] positioning_invalid
[20:53:44] [PASSED] upscaling_invalid
[20:53:44] [PASSED] downscaling_invalid
[20:53:44] ======= [PASSED] drm_test_check_invalid_plane_state ========
[20:53:44] ================ [PASSED] drm_plane_helper =================
[20:53:44] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[20:53:44] ====== drm_test_connector_helper_tv_get_modes_check =======
[20:53:44] [PASSED] None
[20:53:44] [PASSED] PAL
[20:53:44] [PASSED] NTSC
[20:53:44] [PASSED] Both, NTSC Default
[20:53:44] [PASSED] Both, PAL Default
[20:53:44] [PASSED] Both, NTSC Default, with PAL on command-line
[20:53:44] [PASSED] Both, PAL Default, with NTSC on command-line
[20:53:44] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[20:53:44] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[20:53:44] ================== drm_rect (9 subtests) ===================
[20:53:44] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[20:53:44] [PASSED] drm_test_rect_clip_scaled_not_clipped
[20:53:44] [PASSED] drm_test_rect_clip_scaled_clipped
[20:53:44] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[20:53:44] ================= drm_test_rect_intersect =================
[20:53:44] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[20:53:44] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[20:53:44] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[20:53:44] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[20:53:44] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[20:53:44] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[20:53:44] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[20:53:44] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[20:53:44] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[20:53:44] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[20:53:44] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[20:53:44] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[20:53:44] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[20:53:44] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[20:53:44] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[20:53:44] ============= [PASSED] drm_test_rect_intersect =============
[20:53:44] ================ drm_test_rect_calc_hscale ================
[20:53:44] [PASSED] normal use
[20:53:44] [PASSED] out of max range
[20:53:44] [PASSED] out of min range
[20:53:44] [PASSED] zero dst
[20:53:44] [PASSED] negative src
[20:53:44] [PASSED] negative dst
[20:53:44] ============ [PASSED] drm_test_rect_calc_hscale ============
[20:53:44] ================ drm_test_rect_calc_vscale ================
[20:53:44] [PASSED] normal use
[20:53:44] [PASSED] out of max range
[20:53:44] [PASSED] out of min range
[20:53:44] [PASSED] zero dst
[20:53:44] [PASSED] negative src
[20:53:44] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[20:53:44] ============ [PASSED] drm_test_rect_calc_vscale ============
[20:53:44] ================== drm_test_rect_rotate ===================
[20:53:44] [PASSED] reflect-x
[20:53:44] [PASSED] reflect-y
[20:53:44] [PASSED] rotate-0
[20:53:44] [PASSED] rotate-90
[20:53:44] [PASSED] rotate-180
[20:53:44] [PASSED] rotate-270
[20:53:44] ============== [PASSED] drm_test_rect_rotate ===============
[20:53:44] ================ drm_test_rect_rotate_inv =================
[20:53:44] [PASSED] reflect-x
[20:53:44] [PASSED] reflect-y
[20:53:44] [PASSED] rotate-0
[20:53:44] [PASSED] rotate-90
[20:53:44] [PASSED] rotate-180
[20:53:44] [PASSED] rotate-270
[20:53:44] ============ [PASSED] drm_test_rect_rotate_inv =============
[20:53:44] ==================== [PASSED] drm_rect =====================
[20:53:44] ============ drm_sysfb_modeset_test (1 subtest) ============
[20:53:44] ============ drm_test_sysfb_build_fourcc_list =============
[20:53:44] [PASSED] no native formats
[20:53:44] [PASSED] XRGB8888 as native format
[20:53:44] [PASSED] remove duplicates
[20:53:44] [PASSED] convert alpha formats
[20:53:44] [PASSED] random formats
[20:53:44] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[20:53:44] ============= [PASSED] drm_sysfb_modeset_test ==============
[20:53:44] ================== drm_fixp (2 subtests) ===================
[20:53:44] [PASSED] drm_test_int2fixp
[20:53:44] [PASSED] drm_test_sm2fixp
[20:53:44] ==================== [PASSED] drm_fixp =====================
[20:53:44] ============================================================
[20:53:44] Testing complete. Ran 621 tests: passed: 621
[20:53:44] Elapsed time: 26.722s total, 1.751s configuring, 24.755s building, 0.169s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[20:53:44] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:53:46] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:53:56] Starting KUnit Kernel (1/1)...
[20:53:56] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:53:56] ================= ttm_device (5 subtests) ==================
[20:53:56] [PASSED] ttm_device_init_basic
[20:53:56] [PASSED] ttm_device_init_multiple
[20:53:56] [PASSED] ttm_device_fini_basic
[20:53:56] [PASSED] ttm_device_init_no_vma_man
[20:53:56] ================== ttm_device_init_pools ==================
[20:53:56] [PASSED] No DMA allocations, no DMA32 required
[20:53:56] [PASSED] DMA allocations, DMA32 required
[20:53:56] [PASSED] No DMA allocations, DMA32 required
[20:53:56] [PASSED] DMA allocations, no DMA32 required
[20:53:56] ============== [PASSED] ttm_device_init_pools ==============
[20:53:56] =================== [PASSED] ttm_device ====================
[20:53:56] ================== ttm_pool (8 subtests) ===================
[20:53:56] ================== ttm_pool_alloc_basic ===================
[20:53:56] [PASSED] One page
[20:53:56] [PASSED] More than one page
[20:53:56] [PASSED] Above the allocation limit
[20:53:56] [PASSED] One page, with coherent DMA mappings enabled
[20:53:56] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:53:56] ============== [PASSED] ttm_pool_alloc_basic ===============
[20:53:56] ============== ttm_pool_alloc_basic_dma_addr ==============
[20:53:56] [PASSED] One page
[20:53:56] [PASSED] More than one page
[20:53:56] [PASSED] Above the allocation limit
[20:53:56] [PASSED] One page, with coherent DMA mappings enabled
[20:53:56] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:53:56] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[20:53:56] [PASSED] ttm_pool_alloc_order_caching_match
[20:53:56] [PASSED] ttm_pool_alloc_caching_mismatch
[20:53:56] [PASSED] ttm_pool_alloc_order_mismatch
[20:53:56] [PASSED] ttm_pool_free_dma_alloc
[20:53:56] [PASSED] ttm_pool_free_no_dma_alloc
[20:53:56] [PASSED] ttm_pool_fini_basic
[20:53:56] ==================== [PASSED] ttm_pool =====================
[20:53:56] ================ ttm_resource (8 subtests) =================
[20:53:56] ================= ttm_resource_init_basic =================
[20:53:56] [PASSED] Init resource in TTM_PL_SYSTEM
[20:53:56] [PASSED] Init resource in TTM_PL_VRAM
[20:53:56] [PASSED] Init resource in a private placement
[20:53:56] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[20:53:56] ============= [PASSED] ttm_resource_init_basic =============
[20:53:56] [PASSED] ttm_resource_init_pinned
[20:53:56] [PASSED] ttm_resource_fini_basic
[20:53:56] [PASSED] ttm_resource_manager_init_basic
[20:53:56] [PASSED] ttm_resource_manager_usage_basic
[20:53:56] [PASSED] ttm_resource_manager_set_used_basic
[20:53:56] [PASSED] ttm_sys_man_alloc_basic
[20:53:56] [PASSED] ttm_sys_man_free_basic
[20:53:56] ================== [PASSED] ttm_resource ===================
[20:53:56] =================== ttm_tt (15 subtests) ===================
[20:53:56] ==================== ttm_tt_init_basic ====================
[20:53:56] [PASSED] Page-aligned size
[20:53:56] [PASSED] Extra pages requested
[20:53:56] ================ [PASSED] ttm_tt_init_basic ================
[20:53:56] [PASSED] ttm_tt_init_misaligned
[20:53:56] [PASSED] ttm_tt_fini_basic
[20:53:56] [PASSED] ttm_tt_fini_sg
[20:53:56] [PASSED] ttm_tt_fini_shmem
[20:53:56] [PASSED] ttm_tt_create_basic
[20:53:56] [PASSED] ttm_tt_create_invalid_bo_type
[20:53:56] [PASSED] ttm_tt_create_ttm_exists
[20:53:56] [PASSED] ttm_tt_create_failed
[20:53:56] [PASSED] ttm_tt_destroy_basic
[20:53:56] [PASSED] ttm_tt_populate_null_ttm
[20:53:56] [PASSED] ttm_tt_populate_populated_ttm
[20:53:56] [PASSED] ttm_tt_unpopulate_basic
[20:53:56] [PASSED] ttm_tt_unpopulate_empty_ttm
[20:53:56] [PASSED] ttm_tt_swapin_basic
[20:53:56] ===================== [PASSED] ttm_tt ======================
[20:53:56] =================== ttm_bo (14 subtests) ===================
[20:53:56] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[20:53:56] [PASSED] Cannot be interrupted and sleeps
[20:53:56] [PASSED] Cannot be interrupted, locks straight away
[20:53:56] [PASSED] Can be interrupted, sleeps
[20:53:56] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[20:53:56] [PASSED] ttm_bo_reserve_locked_no_sleep
[20:53:56] [PASSED] ttm_bo_reserve_no_wait_ticket
[20:53:56] [PASSED] ttm_bo_reserve_double_resv
[20:53:56] [PASSED] ttm_bo_reserve_interrupted
[20:53:56] [PASSED] ttm_bo_reserve_deadlock
[20:53:56] [PASSED] ttm_bo_unreserve_basic
[20:53:56] [PASSED] ttm_bo_unreserve_pinned
[20:53:56] [PASSED] ttm_bo_unreserve_bulk
[20:53:56] [PASSED] ttm_bo_fini_basic
[20:53:56] [PASSED] ttm_bo_fini_shared_resv
[20:53:56] [PASSED] ttm_bo_pin_basic
[20:53:56] [PASSED] ttm_bo_pin_unpin_resource
[20:53:56] [PASSED] ttm_bo_multiple_pin_one_unpin
[20:53:56] ===================== [PASSED] ttm_bo ======================
[20:53:56] ============== ttm_bo_validate (22 subtests) ===============
[20:53:56] ============== ttm_bo_init_reserved_sys_man ===============
[20:53:56] [PASSED] Buffer object for userspace
[20:53:56] [PASSED] Kernel buffer object
[20:53:56] [PASSED] Shared buffer object
[20:53:56] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[20:53:56] ============== ttm_bo_init_reserved_mock_man ==============
[20:53:56] [PASSED] Buffer object for userspace
[20:53:56] [PASSED] Kernel buffer object
[20:53:56] [PASSED] Shared buffer object
[20:53:56] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[20:53:56] [PASSED] ttm_bo_init_reserved_resv
[20:53:56] ================== ttm_bo_validate_basic ==================
[20:53:56] [PASSED] Buffer object for userspace
[20:53:56] [PASSED] Kernel buffer object
[20:53:56] [PASSED] Shared buffer object
[20:53:56] ============== [PASSED] ttm_bo_validate_basic ==============
[20:53:56] [PASSED] ttm_bo_validate_invalid_placement
[20:53:56] ============= ttm_bo_validate_same_placement ==============
[20:53:56] [PASSED] System manager
[20:53:56] [PASSED] VRAM manager
[20:53:56] ========= [PASSED] ttm_bo_validate_same_placement ==========
[20:53:56] [PASSED] ttm_bo_validate_failed_alloc
[20:53:56] [PASSED] ttm_bo_validate_pinned
[20:53:56] [PASSED] ttm_bo_validate_busy_placement
[20:53:56] ================ ttm_bo_validate_multihop =================
[20:53:56] [PASSED] Buffer object for userspace
[20:53:56] [PASSED] Kernel buffer object
[20:53:56] [PASSED] Shared buffer object
[20:53:56] ============ [PASSED] ttm_bo_validate_multihop =============
[20:53:56] ========== ttm_bo_validate_no_placement_signaled ==========
[20:53:56] [PASSED] Buffer object in system domain, no page vector
[20:53:56] [PASSED] Buffer object in system domain with an existing page vector
[20:53:56] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[20:53:56] ======== ttm_bo_validate_no_placement_not_signaled ========
[20:53:56] [PASSED] Buffer object for userspace
[20:53:56] [PASSED] Kernel buffer object
[20:53:56] [PASSED] Shared buffer object
[20:53:56] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[20:53:56] [PASSED] ttm_bo_validate_move_fence_signaled
[20:53:56] ========= ttm_bo_validate_move_fence_not_signaled =========
[20:53:56] [PASSED] Waits for GPU
[20:53:56] [PASSED] Tries to lock straight away
[20:53:56] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[20:53:56] [PASSED] ttm_bo_validate_swapout
[20:53:56] [PASSED] ttm_bo_validate_happy_evict
[20:53:56] [PASSED] ttm_bo_validate_all_pinned_evict
[20:53:56] [PASSED] ttm_bo_validate_allowed_only_evict
[20:53:56] [PASSED] ttm_bo_validate_deleted_evict
[20:53:56] [PASSED] ttm_bo_validate_busy_domain_evict
[20:53:56] [PASSED] ttm_bo_validate_evict_gutting
[20:53:56] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[20:53:56] ================= [PASSED] ttm_bo_validate =================
[20:53:56] ============================================================
[20:53:56] Testing complete. Ran 102 tests: passed: 102
[20:53:56] Elapsed time: 11.411s total, 1.646s configuring, 9.498s building, 0.228s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✓ Xe.CI.BAT: success for VS/PE Override support
2026-03-31 18:33 [PATCH v1 00/16] VS/PE Override support Michał Grzelak
` (17 preceding siblings ...)
2026-03-31 20:53 ` ✓ CI.KUnit: success " Patchwork
@ 2026-03-31 21:35 ` Patchwork
2026-04-01 4:45 ` ✓ Xe.CI.FULL: " Patchwork
19 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2026-03-31 21:35 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 2726 bytes --]
== Series Details ==
Series: VS/PE Override support
URL : https://patchwork.freedesktop.org/series/164195/
State : success
== Summary ==
CI Bug Log - changes from xe-4828-3ad1bb41eb2b0a6f40601c2b69ebf4b8a2f09e69_BAT -> xe-pw-164195v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-164195v1_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
- bat-adlp-7: [PASS][1] -> [DMESG-WARN][2] ([Intel XE#7483])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4828-3ad1bb41eb2b0a6f40601c2b69ebf4b8a2f09e69/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164195v1/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
* igt@xe_waitfence@engine:
- bat-dg2-oem2: [PASS][3] -> [FAIL][4] ([Intel XE#6519])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4828-3ad1bb41eb2b0a6f40601c2b69ebf4b8a2f09e69/bat-dg2-oem2/igt@xe_waitfence@engine.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164195v1/bat-dg2-oem2/igt@xe_waitfence@engine.html
* igt@xe_waitfence@reltime:
- bat-dg2-oem2: [PASS][5] -> [FAIL][6] ([Intel XE#6520])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4828-3ad1bb41eb2b0a6f40601c2b69ebf4b8a2f09e69/bat-dg2-oem2/igt@xe_waitfence@reltime.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164195v1/bat-dg2-oem2/igt@xe_waitfence@reltime.html
#### Possible fixes ####
* igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1:
- bat-adlp-7: [DMESG-WARN][7] ([Intel XE#7483]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4828-3ad1bb41eb2b0a6f40601c2b69ebf4b8a2f09e69/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164195v1/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html
[Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519
[Intel XE#6520]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6520
[Intel XE#7483]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7483
Build changes
-------------
* Linux: xe-4828-3ad1bb41eb2b0a6f40601c2b69ebf4b8a2f09e69 -> xe-pw-164195v1
IGT_8839: 8839
xe-4828-3ad1bb41eb2b0a6f40601c2b69ebf4b8a2f09e69: 3ad1bb41eb2b0a6f40601c2b69ebf4b8a2f09e69
xe-pw-164195v1: 164195v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164195v1/index.html
[-- Attachment #2: Type: text/html, Size: 3448 bytes --]
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✓ Xe.CI.FULL: success for VS/PE Override support
2026-03-31 18:33 [PATCH v1 00/16] VS/PE Override support Michał Grzelak
` (18 preceding siblings ...)
2026-03-31 21:35 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-04-01 4:45 ` Patchwork
19 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2026-04-01 4:45 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 2499 bytes --]
== Series Details ==
Series: VS/PE Override support
URL : https://patchwork.freedesktop.org/series/164195/
State : success
== Summary ==
CI Bug Log - changes from xe-4828-3ad1bb41eb2b0a6f40601c2b69ebf4b8a2f09e69_FULL -> xe-pw-164195v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-164195v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1:
- shard-lnl: [PASS][1] -> [FAIL][2] ([Intel XE#301])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4828-3ad1bb41eb2b0a6f40601c2b69ebf4b8a2f09e69/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164195v1/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
#### Possible fixes ####
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-lnl: [FAIL][3] ([Intel XE#301]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4828-3ad1bb41eb2b0a6f40601c2b69ebf4b8a2f09e69/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164195v1/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma:
- shard-lnl: [FAIL][5] ([Intel XE#5625]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4828-3ad1bb41eb2b0a6f40601c2b69ebf4b8a2f09e69/shard-lnl-1/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164195v1/shard-lnl-5/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
Build changes
-------------
* Linux: xe-4828-3ad1bb41eb2b0a6f40601c2b69ebf4b8a2f09e69 -> xe-pw-164195v1
IGT_8839: 8839
xe-4828-3ad1bb41eb2b0a6f40601c2b69ebf4b8a2f09e69: 3ad1bb41eb2b0a6f40601c2b69ebf4b8a2f09e69
xe-pw-164195v1: 164195v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164195v1/index.html
[-- Attachment #2: Type: text/html, Size: 3196 bytes --]
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v1 12/16] drm/i915/buf_trans: compute LT's VS/PE Override index
2026-03-31 18:33 ` [PATCH v1 12/16] drm/i915/buf_trans: compute LT's VS/PE Override index Michał Grzelak
@ 2026-04-01 7:16 ` kernel test robot
0 siblings, 0 replies; 23+ messages in thread
From: kernel test robot @ 2026-04-01 7:16 UTC (permalink / raw)
To: Michał Grzelak, intel-gfx, intel-xe; +Cc: oe-kbuild-all
Hi Michał,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-i915/for-linux-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Micha-Grzelak/drm-i915-lt-align-xe3plpd-with-VS-PE-Override-layout/20260401-092928
base: https://gitlab.freedesktop.org/drm/i915/kernel.git for-linux-next
patch link: https://lore.kernel.org/r/20260331183332.1773886-13-michal.grzelak%40intel.com
patch subject: [PATCH v1 12/16] drm/i915/buf_trans: compute LT's VS/PE Override index
reproduce: (https://download.01.org/0day-ci/archive/20260401/202604010401.ywwXdvN6-lkp@intel.com/reproduce)
# many are suggestions rather than must-fix
WARNING:BLOCK_COMMENT_STYLE: Block comments should align the * on each line
#34: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1796:
+ /* FIXME need to check correct parsing & table index should
+ * this ever trigger.
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v1 08/16] drm/i915/bios: support VS/PE Override per each ddi port
2026-03-31 18:33 ` [PATCH v1 08/16] drm/i915/bios: support VS/PE Override per each ddi port Michał Grzelak
@ 2026-04-03 8:39 ` kernel test robot
0 siblings, 0 replies; 23+ messages in thread
From: kernel test robot @ 2026-04-03 8:39 UTC (permalink / raw)
To: Michał Grzelak, intel-gfx, intel-xe
Cc: llvm, oe-kbuild-all, Jani Nikula, Michał Grzelak
Hi Michał,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-i915/for-linux-next]
[also build test ERROR on drm-i915/for-linux-next-fixes drm-tip/drm-tip linus/master v7.0-rc6 next-20260331]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Micha-Grzelak/drm-i915-lt-align-xe3plpd-with-VS-PE-Override-layout/20260401-092928
base: https://gitlab.freedesktop.org/drm/i915/kernel.git for-linux-next
patch link: https://lore.kernel.org/r/20260331183332.1773886-9-michal.grzelak%40intel.com
patch subject: [PATCH v1 08/16] drm/i915/bios: support VS/PE Override per each ddi port
config: loongarch-allmodconfig (https://download.01.org/0day-ci/archive/20260402/202604021026.aZi3LxDW-lkp@intel.com/config)
compiler: clang version 19.1.7 (https://github.com/llvm/llvm-project cd708029e0b2869e80abe31ddb175f7c35361f90)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260402/202604021026.aZi3LxDW-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202604021026.aZi3LxDW-lkp@intel.com/
All errors (new ones prefixed by >>):
>> drivers/gpu/drm/i915/display/intel_bios.c:2767:34: error: cast to union type from type 'int' not present in union
2767 | devdata->vswing_preemph.index = (union ddi_vswing_preemph_index) -1;
| ^ ~~
drivers/gpu/drm/i915/display/intel_bios.c:3178:4: error: cast to union type from type 'int' not present in union
3178 | (union ddi_vswing_preemph_index) -1;
| ^ ~~
2 errors generated.
vim +/int +2767 drivers/gpu/drm/i915/display/intel_bios.c
2761
2762 static void override_vswing_preemph(struct intel_bios_encoder_data *devdata)
2763 {
2764 struct intel_ddi_buf_trans *buf_trans;
2765
2766 devdata->vswing_preemph.buf_trans = NULL;
> 2767 devdata->vswing_preemph.index = (union ddi_vswing_preemph_index) -1;
2768
2769 if (!intel_bios_encoder_overrides_vswing(devdata))
2770 return;
2771
2772 buf_trans = kzalloc(sizeof(*buf_trans), GFP_KERNEL);
2773 devdata->vswing_preemph.buf_trans = buf_trans;
2774 }
2775
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 23+ messages in thread
end of thread, other threads:[~2026-04-03 8:40 UTC | newest]
Thread overview: 23+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-03-31 18:33 [PATCH v1 00/16] VS/PE Override support Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 01/16] drm/i915/lt: align xe3plpd with VS/PE Override layout Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 02/16] drm/i915/buf_trans: switch from u8 to u32 Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 03/16] drm/i915/buf_trans: describe VS/PE Override layout Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 04/16] drm/i915/bios: prepare for parsing VBT #57 Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 05/16] drm/i915/bios: parse LT's VS/PE Override Block #57 Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 06/16] drm/i915/bios: parse Snps's " Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 07/16] drm/i915/bios: parse EHL's " Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 08/16] drm/i915/bios: support VS/PE Override per each ddi port Michał Grzelak
2026-04-03 8:39 ` kernel test robot
2026-03-31 18:33 ` [PATCH v1 09/16] drm/i915/bios: print VS/PE Override port info Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 10/16] drm/i915/ddi: cache VS/PE struct pointer into intel_encoder Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 11/16] drm/i915/buf_trans: override encoder->get_buf_trans when asked Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 12/16] drm/i915/buf_trans: compute LT's VS/PE Override index Michał Grzelak
2026-04-01 7:16 ` kernel test robot
2026-03-31 18:33 ` [PATCH v1 13/16] drm/i915/buf_trans: compute Snps's " Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 14/16] drm/i915/buf_trans: compute EHL's " Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 15/16] drm/i915/bios: search for VBT #57 by default Michał Grzelak
2026-03-31 18:33 ` [PATCH v1 16/16] drm/i915/bios: remove VS/PE Override warning Michał Grzelak
2026-03-31 20:52 ` ✗ CI.checkpatch: warning for VS/PE Override support Patchwork
2026-03-31 20:53 ` ✓ CI.KUnit: success " Patchwork
2026-03-31 21:35 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-01 4:45 ` ✓ Xe.CI.FULL: " Patchwork
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