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From: Matthew Auld <matthew.auld@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org,
	Ryszard Knop <ryszard.knop@intel.com>,
	Matthew Brost <matthew.brost@intel.com>,
	Christian Koenig <christian.koenig@amd.com>,
	Dave Airlie <airlied@redhat.com>
Subject: [PATCH 2/2] drm/ttm/tests: make no_dma_alloc conditional on x86
Date: Thu,  9 Apr 2026 13:15:10 +0100	[thread overview]
Message-ID: <20260409121512.81298-4-matthew.auld@intel.com> (raw)
In-Reply-To: <20260409121512.81298-3-matthew.auld@intel.com>

If you run this on UML, this goes down in flames with:

[10:23:33] Pid: 75, comm: kunit_try_catch Tainted: G        W        N  7.0.0-rc7-g221d0418dcfd
[10:23:33] RIP: 0033:list_lru_count_node+0xe/0x20
[10:23:33] RSP: 00000000a88cbed8  EFLAGS: 00010246
[10:23:33] RAX: 0000000000000000 RBX: 00000000a8803c90 RCX: 0000000068e4c7d8
[10:23:33] RDX: 0000000000000000 RSI: 0000000000000000 RDI: 0000000068c86880
[10:23:33] RBP: 0000000068c86800 R08: 00000000a7658c28 R09: 0000000068c50c80
[10:23:33] R10: 0000000000000000 R11: 0000000000000000 R12: 0000000068c50c80

On UML (with no special dma pool flag) there are no special page pools
it seems, so directly accessing the pool state is currently invalid,
since the lru stuff is not initialised.

With that make no_dma_alloc conditional on x86, where there should
always be some kind of special pool, if we don't supply the special dma
pool flag.

Fixes: 444e2a19d7fd ("ttm/pool: port to list_lru. (v2)")
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Ryszard Knop <ryszard.knop@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Christian Koenig <christian.koenig@amd.com>
Cc: Dave Airlie <airlied@redhat.com>
---
 drivers/gpu/drm/ttm/tests/ttm_pool_test.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/ttm/tests/ttm_pool_test.c b/drivers/gpu/drm/ttm/tests/ttm_pool_test.c
index 01197014b83f..926615f63ffd 100644
--- a/drivers/gpu/drm/ttm/tests/ttm_pool_test.c
+++ b/drivers/gpu/drm/ttm/tests/ttm_pool_test.c
@@ -2,6 +2,7 @@
 /*
  * Copyright © 2023 Intel Corporation
  */
+#include "linux/kconfig.h"
 #include <linux/mm.h>
 
 #include <drm/ttm/ttm_tt.h>
@@ -373,6 +374,11 @@ static void ttm_pool_free_no_dma_alloc(struct kunit *test)
 	unsigned int order = 2;
 	size_t size = (1 << order) * PAGE_SIZE;
 
+	if (!IS_ENABLED(CONFIG_X86)) {
+		kunit_skip(test, "Needs to be run on x86. Skipping.\n");
+		return;
+	}
+
 	tt = ttm_tt_kunit_init(test, 0, caching, size);
 	KUNIT_ASSERT_NOT_NULL(test, tt);
 
-- 
2.53.0


  reply	other threads:[~2026-04-09 12:15 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-09 12:15 [PATCH 1/2] drm/ttm/tests: fix lru_count ASSERT Matthew Auld
2026-04-09 12:15 ` Matthew Auld [this message]
2026-04-09 14:07   ` [PATCH 2/2] drm/ttm/tests: make no_dma_alloc conditional on x86 Knop, Ryszard
2026-04-09 12:21 ` ✗ CI.checkpatch: warning for series starting with [1/2] drm/ttm/tests: fix lru_count ASSERT Patchwork
2026-04-09 12:22 ` ✓ CI.KUnit: success " Patchwork
2026-04-09 12:59 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-09 13:57 ` ✓ Xe.CI.FULL: " Patchwork

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