From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 45932F531EA for ; Tue, 14 Apr 2026 03:52:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 08C2410E09C; Tue, 14 Apr 2026 03:52:49 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="O7XlBUiR"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id B017810E103 for ; Tue, 14 Apr 2026 03:52:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1776138769; x=1807674769; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=lSLDk9tEThgya+GPLZ0z2c+BkvQjopfEDB8njd9SI9c=; b=O7XlBUiRCZlteG9cna/U+BzE4wkuukwwiY/OINOHF0zEJPaSGXX4et47 MHiTQRapZmSpVLO0IxwwvRCIayoC84cySI4lzXyRW0LCxdNnMSoYKJkuz TuKZglqDRIiUUuOBYwYYREHgbtIoVTOK06I1DdnwaBV0hyDpMZF911Fzn 2LX6vz3BW1M/FPPhvjx51lzD1+A0jKIVf91a0UftufqeeYOGXo58UZy5K zo1GPSiA1dzrSJjE78cpEGElCd8y1jGTUIg8BFWjjA4l1blC5CUDWhw7g D1pLDSOuIXa3niaY6NmZqZKgg1CCCvTmGFEQd3UYsfdpde31GbBXqZyVW A==; X-CSE-ConnectionGUID: +ddKmZ19SwSwWDf8IguLag== X-CSE-MsgGUID: RKxCIz7OSyq/08wK/BRd7w== X-IronPort-AV: E=McAfee;i="6800,10657,11758"; a="77050329" X-IronPort-AV: E=Sophos;i="6.23,178,1770624000"; d="scan'208";a="77050329" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2026 20:52:48 -0700 X-CSE-ConnectionGUID: RW7wsRu8Q2e6PNLQiF6uSw== X-CSE-MsgGUID: sz7mm6kbTBmbWKEay/Xwbg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,178,1770624000"; d="scan'208";a="225667131" Received: from orsosgc001.jf.intel.com ([10.88.27.185]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2026 20:52:47 -0700 From: Ashutosh Dixit To: intel-xe@lists.freedesktop.org Cc: Umesh Nerlige Ramappa Subject: [PATCH 1/3] drm/xe/rtp: Don't whitelist OA status registers Date: Mon, 13 Apr 2026 20:52:42 -0700 Message-ID: <20260414035244.741342-2-ashutosh.dixit@intel.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20260414035244.741342-1-ashutosh.dixit@intel.com> References: <20260414035244.741342-1-ashutosh.dixit@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" OA status registers are not used by UMD's and do not need to be whitelisted. Fixes: ed455775c5a6 ("drm/xe/rtp: Refactor OAG MMIO trigger register whitelisting") Signed-off-by: Ashutosh Dixit --- drivers/gpu/drm/xe/xe_reg_whitelist.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c index 8cc313182968d..a4124f00c467f 100644 --- a/drivers/gpu/drm/xe/xe_reg_whitelist.c +++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c @@ -90,27 +90,23 @@ static const struct xe_rtp_entry_sr register_whitelist[] = { RING_FORCE_TO_NONPRIV_ACCESS_RW)) }, -#define WHITELIST_OA_MMIO_TRG(trg, status, head) \ +#define WHITELIST_OA_MMIO_TRG(trg, head) \ WHITELIST(trg, RING_FORCE_TO_NONPRIV_ACCESS_RW), \ - WHITELIST(status, RING_FORCE_TO_NONPRIV_ACCESS_RD), \ WHITELIST(head, RING_FORCE_TO_NONPRIV_ACCESS_RD | RING_FORCE_TO_NONPRIV_RANGE_4) #define WHITELIST_OAG_MMIO_TRG \ - WHITELIST_OA_MMIO_TRG(OAG_MMIOTRIGGER, OAG_OASTATUS, OAG_OAHEADPTR) + WHITELIST_OA_MMIO_TRG(OAG_MMIOTRIGGER, OAG_OAHEADPTR) #define WHITELIST_OAM_MMIO_TRG \ WHITELIST_OA_MMIO_TRG(OAM_MMIO_TRG(XE_OAM_SAG_BASE_ADJ), \ - OAM_STATUS(XE_OAM_SAG_BASE_ADJ), \ OAM_HEAD_POINTER(XE_OAM_SAG_BASE_ADJ)), \ WHITELIST_OA_MMIO_TRG(OAM_MMIO_TRG(XE_OAM_SCMI_0_BASE_ADJ), \ - OAM_STATUS(XE_OAM_SCMI_0_BASE_ADJ), \ OAM_HEAD_POINTER(XE_OAM_SCMI_0_BASE_ADJ)), \ WHITELIST_OA_MMIO_TRG(OAM_MMIO_TRG(XE_OAM_SCMI_1_BASE_ADJ), \ - OAM_STATUS(XE_OAM_SCMI_1_BASE_ADJ), \ OAM_HEAD_POINTER(XE_OAM_SCMI_1_BASE_ADJ)) #define WHITELIST_OA_MERT_MMIO_TRG \ - WHITELIST_OA_MMIO_TRG(OAMERT_MMIO_TRG, OAMERT_STATUS, OAMERT_HEAD_POINTER) + WHITELIST_OA_MMIO_TRG(OAMERT_MMIO_TRG, OAMERT_HEAD_POINTER) { XE_RTP_NAME("oag_mmio_trg_rcs"), XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, XE_RTP_END_VERSION_UNDEFINED), -- 2.48.1