[PATCH 2/3] drm/xe/oa: Don't whitelist OA head pointer registers

Ashutosh Dixit
2026-04-15T03:35:41Z

OA head pointer registers are not used by UMD's and do not need to be
whitelisted. Only MMIO trigger, tail pointer and OA buffer registers need
to be whitelisted. OA head pointer is sometimes provided to the
WHITELIST_OA_MMIO_TRG to have the correct register offset alignment for
RING_FORCE_TO_NONPRIV_RANGE_4.

Fixes: ed455775c5a6 ("drm/xe/rtp: Refactor OAG MMIO trigger register whitelisting")
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/xe_reg_whitelist.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
index a4124f00c467f..09dcb6a422797 100644
--- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
+++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
@@ -90,9 +90,9 @@ static const struct xe_rtp_entry_sr register_whitelist[] = {
RING_FORCE_TO_NONPRIV_ACCESS_RW))
},

-#define WHITELIST_OA_MMIO_TRG(trg, head) \
+#define WHITELIST_OA_MMIO_TRG(trg, tail_buf) \
WHITELIST(trg, RING_FORCE_TO_NONPRIV_ACCESS_RW), \
- WHITELIST(head, RING_FORCE_TO_NONPRIV_ACCESS_RD | RING_FORCE_TO_NONPRIV_RANGE_4)
+ WHITELIST(tail_buf, RING_FORCE_TO_NONPRIV_ACCESS_RD | RING_FORCE_TO_NONPRIV_RANGE_4)

#define WHITELIST_OAG_MMIO_TRG \
WHITELIST_OA_MMIO_TRG(OAG_MMIOTRIGGER, OAG_OAHEADPTR)
--
2.48.1