From: Xin Wang <x.wang@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: Xin Wang <x.wang@intel.com>,
Matthew Auld <matthew.auld@intel.com>,
Matt Roper <matthew.d.roper@intel.com>
Subject: [PATCH v4 2/3] drm/xe/pat: Default XE_CACHE_NONE_COMPRESSION to invalid
Date: Wed, 15 Apr 2026 16:02:39 -0700 [thread overview]
Message-ID: <20260415230240.411826-3-x.wang@intel.com> (raw)
In-Reply-To: <20260415230240.411826-1-x.wang@intel.com>
Initialize XE_CACHE_NONE_COMPRESSION PAT index to XE_PAT_INVALID_IDX by
default, same as XE_CACHE_WB_COMPRESSION. Platforms that support this
cache mode will override it in xe_pat_init_early(). This ensures that
accidental use on unsupported platforms can be detected.
A subsequent patch introduces a helper to assert on invalid PAT index
access at all call sites.
Suggested-by: Matthew Auld <matthew.auld@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Xin Wang <x.wang@intel.com>
---
drivers/gpu/drm/xe/xe_pat.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/xe/xe_pat.c b/drivers/gpu/drm/xe/xe_pat.c
index 75aaae7b003d..fad5b5a5ed4a 100644
--- a/drivers/gpu/drm/xe/xe_pat.c
+++ b/drivers/gpu/drm/xe/xe_pat.c
@@ -559,6 +559,7 @@ static const struct xe_pat_ops xe3p_xpc_pat_ops = {
void xe_pat_init_early(struct xe_device *xe)
{
xe->pat.idx[XE_CACHE_WB_COMPRESSION] = XE_PAT_INVALID_IDX;
+ xe->pat.idx[XE_CACHE_NONE_COMPRESSION] = XE_PAT_INVALID_IDX;
if (GRAPHICS_VERx100(xe) == 3511) {
xe->pat.ops = &xe3p_xpc_pat_ops;
xe->pat.table = xe3p_xpc_pat_table;
--
2.43.0
next prev parent reply other threads:[~2026-04-15 23:02 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-15 23:02 [PATCH v4 0/3] drm/xe/pat: Type cleanup and invalid index hardening Xin Wang
2026-04-15 23:02 ` [PATCH v4 1/3] drm/xe: Standardize pat_index to u16 type Xin Wang
2026-04-15 23:02 ` Xin Wang [this message]
2026-04-15 23:02 ` [PATCH v4 3/3] drm/xe/pat: Introduce xe_cache_pat_idx() macro helper Xin Wang
2026-04-15 23:55 ` ✓ CI.KUnit: success for drm/xe/pat: Type cleanup and invalid index hardening Patchwork
2026-04-16 1:11 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-04-16 2:54 ` ✗ Xe.CI.FULL: " Patchwork
2026-04-16 3:03 ` ✓ CI.KUnit: success for drm/xe/pat: Type cleanup and invalid index hardening (rev2) Patchwork
2026-04-16 3:57 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-04-16 5:55 ` ✗ Xe.CI.FULL: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260415230240.411826-3-x.wang@intel.com \
--to=x.wang@intel.com \
--cc=intel-xe@lists.freedesktop.org \
--cc=matthew.auld@intel.com \
--cc=matthew.d.roper@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox