From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1BD59CD3439 for ; Wed, 6 May 2026 22:35:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9A41410EF05; Wed, 6 May 2026 22:35:11 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="GRtkXmPp"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) by gabe.freedesktop.org (Postfix) with ESMTPS id BE87110EEF8 for ; Wed, 6 May 2026 22:35:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1778106911; x=1809642911; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=5Qa8oA/veSZcJMTG9sPEZIIodcz/eHLKJ4kbt03v9Xw=; b=GRtkXmPplUzqHPla4Q8oZBW3+gUJq6oa732CS18bCIKLIg/xV14WZM4F ErFvNBJdVvoyuNRGz1yxfy8UFypKcA1svv5uzEQ0jZ3jkE2LhAYQ22AvT /q5Fo9drZwFDXQ3t+ufGEwZ+UXgC/bNTurSZL77SGAbCg/swfxaLdCjs6 d8epAIdpsBDFy4L9flUY2LPIxnssB0nikuHYECq7QIY9x8ri0NDHM4CS5 hKjsELyVbiCxHmKE2m1zoyluLjF2dCXFXzJCev47dYzn6GrqnMKFWgyIY W/sLV9myrurmQiJVNwNeD0Dt5zd2qdZUEkLJAa0FqW72snnaaOgS6Bux3 Q==; X-CSE-ConnectionGUID: 58dz85ESTOm9CBajlgbgjQ== X-CSE-MsgGUID: yneo5eLRRlytPY0m7Ayp8A== X-IronPort-AV: E=McAfee;i="6800,10657,11778"; a="90429708" X-IronPort-AV: E=Sophos;i="6.23,220,1770624000"; d="scan'208";a="90429708" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 May 2026 15:35:10 -0700 X-CSE-ConnectionGUID: oujKsPwKTYejMwVTTn7paw== X-CSE-MsgGUID: +EStKH0sSsakeQjIZD/hbw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,220,1770624000"; d="scan'208";a="259707461" Received: from orsosgc001.jf.intel.com ([10.88.27.185]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 May 2026 15:35:10 -0700 From: Umesh Nerlige Ramappa To: intel-xe@lists.freedesktop.org, niranjana.vishwanathapura@intel.com Cc: matthew.brost@intel.com, stuart.summers@intel.com Subject: [PATCH v4 00/11] Support run ticks for multi-queue use case Date: Wed, 6 May 2026 15:35:01 -0700 Message-ID: <20260506223500.3769614-13-umesh.nerlige.ramappa@intel.com> X-Mailer: git-send-email 2.51.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" In single queue use cases, the CTX TIMESTAMP can be used to track context run ticks. In multi-queue scenarios the CTX_TIMESTAMP represents run ticks of all the queues. To determine individual queue run ticks, we need to use QUEUE TIMESTAMP. The series adds support to read out QUEUE TIMESTAMP for multi-queue use cases. v2: Include review comments from Matt, Stuart, Niranjana v3: Include review comments from Niranjana v4: Include review comments from Niranjana Signed-off-by: Umesh Nerlige Ramappa Matthew Brost (1): drm/xe: Add timestamp_ms to LRC snapshot Umesh Nerlige Ramappa (10): drm/xe/lrc: Use 64 bit ctx timestamp in the LRC snapshot drm/xe/lrc: Refactor xe_lrc_timestamp to simplify logic drm/xe/multi_queue: Refactor check for multi queue support for engine class drm/xe/multi_queue: Store primary LRC and position info in LRC drm/xe/multi_queue: Add helpers to access CS QUEUE TIMESTAMP from lrc drm/xe/lrc: Refactor out engine id to hwe conversion drm/xe/multi_queue: Capture queue run times for active queues drm/xe/multi_queue: Add trace event for the multi queue timestamp drm/xe/multi_queue: Use QUEUE_TIMESTAMP as job timestamp for multi-queue drm/xe/multi_queue: Whitelist QUEUE_TIMESTAMP register drivers/gpu/drm/xe/regs/xe_engine_regs.h | 4 + drivers/gpu/drm/xe/regs/xe_lrc_layout.h | 3 + drivers/gpu/drm/xe/xe_exec_queue.c | 13 +- drivers/gpu/drm/xe/xe_gt.h | 15 ++ drivers/gpu/drm/xe/xe_lrc.c | 247 ++++++++++++++++++----- drivers/gpu/drm/xe/xe_lrc.h | 14 +- drivers/gpu/drm/xe/xe_lrc_types.h | 11 + drivers/gpu/drm/xe/xe_reg_whitelist.c | 14 ++ drivers/gpu/drm/xe/xe_ring_ops.c | 8 +- drivers/gpu/drm/xe/xe_trace_lrc.h | 27 +++ 10 files changed, 299 insertions(+), 57 deletions(-) -- 2.51.0