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From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: ville.syrjala@linux.intel.com,
	Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Subject: [PATCH v2 1/2] drm/i915/dsb: shift delayed-vblank DSL wait start by one scanline
Date: Mon,  8 Jun 2026 18:07:09 +0530	[thread overview]
Message-ID: <20260608123711.1121908-2-ankit.k.nautiyal@intel.com> (raw)
In-Reply-To: <20260608123711.1121908-1-ankit.k.nautiyal@intel.com>

In intel_dsb_wait_for_delayed_vblank() the VRR path issues a
WAIT_DSL_OUT(safe_window_start, vmin_safe_window_end) followed by a
WAIT_USEC for SCL+1 scanlines to land on the delayed vblank.

Experimentally, DSB appears to observe a slightly stale PIPEDSL value.
When the actual scanline has just reached safe_window_start, the DSB
may still see a value at or before that boundary when WAIT_DSL_OUT is
evaluated, causing the wait to complete immediately.

As a result, the subsequent WAIT_USEC executes too early, and the
flip-done interrupt fires roughly one frame ahead of the delayed vblank.

Shift the scanline start back by one to ensure the wait window is
entered reliably.

v2: Replace explicit one-scanline delay with scanline boundary
    adjustment (safe_window_start - 1). (Ville)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dsb.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
index fec8a56e21ea..07dd6318d9cc 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -902,9 +902,17 @@ void intel_dsb_wait_for_delayed_vblank(struct intel_atomic_state *state,
 		 * the hardware itself guarantees that we're SCL lines
 		 * away from the delayed vblank, and we won't be inside
 		 * the vmin safe window so this extra wait does nothing.
+		 *
+		 * Experimentally, DSB may observe a slightly stale
+		 * PIPEDSL value. When the actual scanline has just reached
+		 * safe_window_start, WAIT_DSL_OUT may complete immediately
+		 * due to the stale value.
+		 *
+		 * Shift the start back by one scanline to ensure the wait
+		 * window is entered reliably.
 		 */
 		intel_dsb_wait_scanline_out(state, dsb,
-					    intel_vrr_safe_window_start(crtc_state),
+					    intel_vrr_safe_window_start(crtc_state) - 1,
 					    intel_vrr_vmin_safe_window_end(crtc_state));
 		/*
 		 * When the push is sent during vblank it will trigger
-- 
2.45.2


  reply	other threads:[~2026-06-08 12:54 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-08 12:37 [PATCH v2 0/2] Extend VRR safe window wait for VRR TG Ankit Nautiyal
2026-06-08 12:37 ` Ankit Nautiyal [this message]
2026-06-16 18:02   ` [PATCH v2 1/2] drm/i915/dsb: shift delayed-vblank DSL wait start by one scanline Ville Syrjälä
2026-06-08 12:37 ` [PATCH v2 2/2] drm/i915/dsb: Use safe window path when VRR TG is used Ankit Nautiyal
2026-06-16 18:02   ` Ville Syrjälä
2026-06-08 13:44 ` ✓ CI.KUnit: success for Extend VRR safe window wait for VRR TG Patchwork

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