From: Jonathan Cavitt <jonathan.cavitt@intel.com>
To: dri-devel@lists.freedesktop.org
Cc: saurabhg.gupta@intel.com, alex.zuo@intel.com,
jonathan.cavitt@intel.com, mripard@kernel.org, airlied@gmail.com,
simona@ffwll.ch, linux-kernel@vger.kernel.org,
intel-xe@lists.freedesktop.org, Rodrigo.vivi@intel.com,
matthew.brost@intel.com, maarten.lankhorst@linux.intel.com,
thomas.hellstrom@linux.intel.com, tzimmermann@suse.de
Subject: [PATCH v4 1/2] drm/xe/pagefault: Add SRCID to pagefault struct
Date: Thu, 18 Jun 2026 23:33:11 +0800 [thread overview]
Message-ID: <20260618153312.877948-2-jonathan.cavitt@intel.com> (raw)
In-Reply-To: <20260618153312.877948-1-jonathan.cavitt@intel.com>
Add SRCID information to pagefault struct for the purpose of reporting
the hardware unit that resulted in the pagefault.
v2:
- Squash SRCID with ASID to keep the struct compact (Matthew)
Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: David Airlie <airlied@gmail.com>
Cc: Simona Vetter <simona@ffwll.ch>
---
drivers/gpu/drm/xe/xe_guc_pagefault.c | 5 ++++-
drivers/gpu/drm/xe/xe_pagefault.c | 23 +++++++++++++++--------
drivers/gpu/drm/xe/xe_pagefault_types.h | 9 +++++++--
3 files changed, 26 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_guc_pagefault.c b/drivers/gpu/drm/xe/xe_guc_pagefault.c
index 607e32392f46..7d24bd828e5b 100644
--- a/drivers/gpu/drm/xe/xe_guc_pagefault.c
+++ b/drivers/gpu/drm/xe/xe_guc_pagefault.c
@@ -78,7 +78,10 @@ int xe_guc_pagefault_handler(struct xe_guc *guc, u32 *msg, u32 len)
<< PFD_VIRTUAL_ADDR_HI_SHIFT) |
(FIELD_GET(PFD_VIRTUAL_ADDR_LO, msg[2]) <<
PFD_VIRTUAL_ADDR_LO_SHIFT);
- pf.consumer.asid = FIELD_GET(PFD_ASID, msg[1]);
+ pf.consumer.id = FIELD_PREP(XE_PAGEFAULT_ASID_MASK,
+ FIELD_GET(PFD_ASID, msg[1])) |
+ FIELD_PREP(XE_PAGEFAULT_SRCID_MASK,
+ FIELD_GET(PFD_SRC_ID, msg[0]));
pf.consumer.access_type = FIELD_GET(PFD_ACCESS_TYPE, msg[2]) |
(FIELD_GET(PFD_PREFETCH, msg[2]) ? XE_PAGEFAULT_ACCESS_PREFETCH : 0);
if (FIELD_GET(XE2_PFD_TRVA_FAULT, msg[0]))
diff --git a/drivers/gpu/drm/xe/xe_pagefault.c b/drivers/gpu/drm/xe/xe_pagefault.c
index dd3c068e1a39..2a21203b1a2a 100644
--- a/drivers/gpu/drm/xe/xe_pagefault.c
+++ b/drivers/gpu/drm/xe/xe_pagefault.c
@@ -169,6 +169,7 @@ static struct xe_vm *xe_pagefault_asid_to_vm(struct xe_device *xe, u32 asid)
static int xe_pagefault_service(struct xe_pagefault *pf)
{
+ u32 asid = FIELD_GET(XE_PAGEFAULT_ASID_MASK, pf->consumer.id);
struct xe_gt *gt = pf->gt;
struct xe_device *xe = gt_to_xe(gt);
struct xe_vm *vm;
@@ -180,7 +181,7 @@ static int xe_pagefault_service(struct xe_pagefault *pf)
if (pf->consumer.fault_type_level == XE_PAGEFAULT_TYPE_LEVEL_NACK)
return -EFAULT;
- vm = xe_pagefault_asid_to_vm(xe, pf->consumer.asid);
+ vm = xe_pagefault_asid_to_vm(xe, asid);
if (IS_ERR(vm))
return PTR_ERR(vm);
@@ -242,14 +243,16 @@ static bool xe_pagefault_queue_pop(struct xe_pagefault_queue *pf_queue,
static void xe_pagefault_print(struct xe_pagefault *pf)
{
- xe_gt_info(pf->gt, "\n\tASID: %d\n"
+ xe_gt_info(pf->gt, "\n\tASID: %ld\n"
"\tFaulted Address: 0x%08x%08x\n"
"\tFaultType: %lu\n"
"\tAccessType: %lu\n"
"\tFaultLevel: %lu\n"
"\tEngineClass: %d %s\n"
- "\tEngineInstance: %d\n",
- pf->consumer.asid,
+ "\tEngineInstance: %d\n"
+ "\tSRCID: 0x%02lx\n",
+ FIELD_GET(XE_PAGEFAULT_ASID_MASK,
+ pf->consumer.id),
upper_32_bits(pf->consumer.page_addr),
lower_32_bits(pf->consumer.page_addr),
FIELD_GET(XE_PAGEFAULT_TYPE_MASK,
@@ -260,7 +263,9 @@ static void xe_pagefault_print(struct xe_pagefault *pf)
pf->consumer.fault_type_level),
pf->consumer.engine_class,
xe_hw_engine_class_to_str(pf->consumer.engine_class),
- pf->consumer.engine_instance);
+ pf->consumer.engine_instance,
+ FIELD_GET(XE_PAGEFAULT_SRCID_MASK,
+ pf->consumer.id));
}
static void xe_pagefault_save_to_vm(struct xe_device *xe, struct xe_pagefault *pf)
@@ -273,7 +278,8 @@ static void xe_pagefault_save_to_vm(struct xe_device *xe, struct xe_pagefault *p
* mode, return VM anyways.
*/
down_read(&xe->usm.lock);
- vm = xa_load(&xe->usm.asid_to_vm, pf->consumer.asid);
+ vm = xa_load(&xe->usm.asid_to_vm,
+ FIELD_GET(XE_PAGEFAULT_ASID_MASK, pf->consumer.id));
if (vm)
xe_vm_get(vm);
else
@@ -474,8 +480,9 @@ static bool xe_pagefault_queue_full(struct xe_pagefault_queue *pf_queue)
*/
int xe_pagefault_handler(struct xe_device *xe, struct xe_pagefault *pf)
{
+ u32 asid = FIELD_GET(XE_PAGEFAULT_ASID_MASK, pf->consumer.id);
struct xe_pagefault_queue *pf_queue = xe->usm.pf_queue +
- (pf->consumer.asid % XE_PAGEFAULT_QUEUE_COUNT);
+ (asid % XE_PAGEFAULT_QUEUE_COUNT);
unsigned long flags;
bool full;
@@ -489,7 +496,7 @@ int xe_pagefault_handler(struct xe_device *xe, struct xe_pagefault *pf)
} else {
drm_warn(&xe->drm,
"PageFault Queue (%d) full, shouldn't be possible\n",
- pf->consumer.asid % XE_PAGEFAULT_QUEUE_COUNT);
+ asid % XE_PAGEFAULT_QUEUE_COUNT);
}
spin_unlock_irqrestore(&pf_queue->lock, flags);
diff --git a/drivers/gpu/drm/xe/xe_pagefault_types.h b/drivers/gpu/drm/xe/xe_pagefault_types.h
index c4ee625b93dd..2213cea886c7 100644
--- a/drivers/gpu/drm/xe/xe_pagefault_types.h
+++ b/drivers/gpu/drm/xe/xe_pagefault_types.h
@@ -65,8 +65,13 @@ struct xe_pagefault {
struct {
/** @consumer.page_addr: address of page fault */
u64 page_addr;
- /** @consumer.asid: address space ID */
- u32 asid;
+#define XE_PAGEFAULT_ASID_MASK GENMASK(23, 0)
+#define XE_PAGEFAULT_SRCID_MASK GENMASK(31, 24)
+ /**
+ * @consumer.id: address space ID and SRCID, folded into one
+ * to keep size compact
+ */
+ u32 id;
/**
* @consumer.access_type: access type and prefetch flag packed
* into a u8.
--
2.53.0
next prev parent reply other threads:[~2026-06-18 15:33 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-18 15:33 [PATCH v4 0/2] drm/xe/pagefault: Add SRCID to pagefault reporting Jonathan Cavitt
2026-06-18 15:33 ` Jonathan Cavitt [this message]
2026-06-18 15:33 ` [PATCH v4 2/2] drm/xe/vm: Add srcid to xe_vm_get_property_ioctl fault report Jonathan Cavitt
2026-06-18 15:40 ` ✓ CI.KUnit: success for drm/xe/pagefault: Add SRCID to pagefault reporting (rev4) Patchwork
2026-06-18 16:31 ` ✓ Xe.CI.BAT: " Patchwork
2026-06-18 23:40 ` ✓ Xe.CI.FULL: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260618153312.877948-2-jonathan.cavitt@intel.com \
--to=jonathan.cavitt@intel.com \
--cc=Rodrigo.vivi@intel.com \
--cc=airlied@gmail.com \
--cc=alex.zuo@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
--cc=linux-kernel@vger.kernel.org \
--cc=maarten.lankhorst@linux.intel.com \
--cc=matthew.brost@intel.com \
--cc=mripard@kernel.org \
--cc=saurabhg.gupta@intel.com \
--cc=simona@ffwll.ch \
--cc=thomas.hellstrom@linux.intel.com \
--cc=tzimmermann@suse.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox