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Tue, 30 Jun 2026 00:35:09 -0700 From: Honglei Huang To: Subject: [PATCH v9 5/5] drm/gpusvm: let the drm_gpusvm core context purely MM level Date: Tue, 30 Jun 2026 15:34:52 +0800 Message-ID: <20260630073452.379071-6-honghuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260630073452.379071-1-honghuan@amd.com> References: <20260630073452.379071-1-honghuan@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb09.amd.com (10.181.42.218) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF000252A1:EE_|PH0PR12MB8052:EE_ X-MS-Office365-Filtering-Correlation-Id: 8bab5976-3569-483d-016c-08ded67af204 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|376014|23010399003|1800799024|82310400026|36860700016|22082099003|18002099003|11063799006|56012099006; X-Microsoft-Antispam-Message-Info: KfxOQHzJyJSUTp96qKhBOlb2mnbvGeqtKMhd+wIKfMLkfHgchgzsbNKN6mvfIbh+dLR/09prH1MPJ50OkX/PREtR2Lvf+Y/mCV04Uu3xp+1fkHsmfk9cX/d8VmLzG39VonnMIu17ozdKfxhij8dSWoVZib9YVNOB8hEDYAjeIP7Hu3Zhebst2XswnO0aozIhBCzn2Q9A3QaDK0JBSurY2CptYCM6hVQwLtFFuZJ9vAICAce0gJ8/yWhcjgNSvYyAjniePu/Q7gDHrzTcq8B4xTZQ/rm6F/PCTsJdj+YjDSUVHpc6yh6GLzRLo4Omeg0U7ySK/h9Q3cqZvlwoEbu08HZC/FqD/j6rPy/VrWrJpjyXBRPbL/FdwIWyzZUsU4CbwvebNqKOmszfjoKQu9GMrxOFdg4nOTMihIawmc0Nma1WsLsFCH/xadIuZ2KP3EOpnVojGiHpfROe64OcjNMid7S47s75rG6dLmyIzR3Byke8Xg3yJHVrYdJKdCrp3UgjRqQpkOKLozcPqRj2BiThK8i0iclcgEe8zpBMJxvOSShQH5rc7cMPI+q/FMJXlnbHwPf1IDbrzROddDh/QHBLaxAhFUtxVBEp9unNYwHVyn+jbdY9W9pOV5i4dpQbXqLoZM4HG7VU2WDdY16vLH+wcpY3KbXjYWCb6JbIFjjb//eHh2p5kFRCxWWsYC1rfYHziA9WX5mOi72DvjGTGGXh1w== X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Ip=[165.204.84.17]; Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000252A1.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB8052 X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" The core mechanism of drm_gpusvm is HMM, which is fundamentally an MM side subsystem. A drm_device, enters the picture on the device side at DMA mapping / GPU bind. So move struct drm_device from struct drm_gpusvm in drm_gpusvm. Let drm_gpusvm keep its core neutral and leave device side decisions to the driver. Make drm_gpusvm a pure MM level object. - Move the drm_device from struct drm_gpusvm. drm_device now stored in drm_gpusvm_pages. - Drop the drm parameter from drm_gpusvm_init() - Update the xe call sites in xe_svm_init() and other callers. drm_device does not disappear from the framework, it is relocated onto each drm_gpusvm_pages where DMA actually happens. Suggested-by: Matthew Brost Reviewed-by: Matthew Brost Signed-off-by: Honglei Huang --- drivers/gpu/drm/drm_gpusvm.c | 8 ++++---- drivers/gpu/drm/xe/xe_svm.c | 4 ++-- drivers/gpu/drm/xe/xe_svm.h | 2 +- include/drm/drm_gpusvm.h | 4 +--- 4 files changed, 8 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/drm_gpusvm.c b/drivers/gpu/drm/drm_gpusvm.c index e0fd0b2fcc5..fcfe635bc19 100644 --- a/drivers/gpu/drm/drm_gpusvm.c +++ b/drivers/gpu/drm/drm_gpusvm.c @@ -439,7 +439,6 @@ static const struct mmu_interval_notifier_ops drm_gpusvm_notifier_ops = { * drm_gpusvm_init() - Initialize the GPU SVM. * @gpusvm: Pointer to the GPU SVM structure. * @name: Name of the GPU SVM. - * @drm: Pointer to the DRM device structure. * @mm: Pointer to the mm_struct for the address space. * @mm_start: Start address of GPU SVM. * @mm_range: Range of the GPU SVM. @@ -453,7 +452,9 @@ static const struct mmu_interval_notifier_ops drm_gpusvm_notifier_ops = { * This function initializes the GPU SVM. * * Note: If only using the simple drm_gpusvm_pages API (get/unmap/free), - * then only @gpusvm, @name, and @drm are expected. However, the same base + * then only @gpusvm and @name are expected. The @drm drm_device for dma + * mappings is bound per-pages via drm_gpusvm_init_pages() before the first + * drm_gpusvm_get_pages() call. However, the same base * @gpusvm can also be used with both modes together in which case the full * setup is needed, where the core drm_gpusvm_pages API will simply never use * the other fields. @@ -461,7 +462,7 @@ static const struct mmu_interval_notifier_ops drm_gpusvm_notifier_ops = { * Return: 0 on success, a negative error code on failure. */ int drm_gpusvm_init(struct drm_gpusvm *gpusvm, - const char *name, struct drm_device *drm, + const char *name, struct mm_struct *mm, unsigned long mm_start, unsigned long mm_range, unsigned long notifier_size, @@ -479,7 +480,6 @@ int drm_gpusvm_init(struct drm_gpusvm *gpusvm, } gpusvm->name = name; - gpusvm->drm = drm; gpusvm->mm = mm; gpusvm->mm_start = mm_start; gpusvm->mm_range = mm_range; diff --git a/drivers/gpu/drm/xe/xe_svm.c b/drivers/gpu/drm/xe/xe_svm.c index d515647192e..3283b74f7d5 100644 --- a/drivers/gpu/drm/xe/xe_svm.c +++ b/drivers/gpu/drm/xe/xe_svm.c @@ -911,7 +911,7 @@ int xe_svm_init(struct xe_vm *vm) return err; } - err = drm_gpusvm_init(&vm->svm.gpusvm, "Xe SVM", &vm->xe->drm, + err = drm_gpusvm_init(&vm->svm.gpusvm, "Xe SVM", current->mm, 0, vm->size, xe_modparam.svm_notifier_size * SZ_1M, &gpusvm_ops, fault_chunk_sizes, @@ -925,7 +925,7 @@ int xe_svm_init(struct xe_vm *vm) } } else { err = drm_gpusvm_init(&vm->svm.gpusvm, "Xe SVM (simple)", - &vm->xe->drm, NULL, 0, 0, 0, NULL, + NULL, 0, 0, 0, NULL, NULL, 0); } diff --git a/drivers/gpu/drm/xe/xe_svm.h b/drivers/gpu/drm/xe/xe_svm.h index c8f4a7ba0f4..a921556d346 100644 --- a/drivers/gpu/drm/xe/xe_svm.h +++ b/drivers/gpu/drm/xe/xe_svm.h @@ -235,7 +235,7 @@ static inline int xe_svm_init(struct xe_vm *vm) { #if IS_ENABLED(CONFIG_DRM_GPUSVM) - return drm_gpusvm_init(&vm->svm.gpusvm, "Xe SVM (simple)", &vm->xe->drm, + return drm_gpusvm_init(&vm->svm.gpusvm, "Xe SVM (simple)", NULL, 0, 0, 0, NULL, NULL, 0); #else return 0; diff --git a/include/drm/drm_gpusvm.h b/include/drm/drm_gpusvm.h index 2862104aa1b..b7d987bf76a 100644 --- a/include/drm/drm_gpusvm.h +++ b/include/drm/drm_gpusvm.h @@ -195,7 +195,6 @@ struct drm_gpusvm_range { * struct drm_gpusvm - GPU SVM structure * * @name: Name of the GPU SVM - * @drm: Pointer to the DRM device structure * @mm: Pointer to the mm_struct for the address space * @mm_start: Start address of GPU SVM * @mm_range: Range of the GPU SVM @@ -219,7 +218,6 @@ struct drm_gpusvm_range { */ struct drm_gpusvm { const char *name; - struct drm_device *drm; struct mm_struct *mm; unsigned long mm_start; unsigned long mm_range; @@ -271,7 +269,7 @@ struct drm_gpusvm_ctx { }; int drm_gpusvm_init(struct drm_gpusvm *gpusvm, - const char *name, struct drm_device *drm, + const char *name, struct mm_struct *mm, unsigned long mm_start, unsigned long mm_range, unsigned long notifier_size, -- 2.34.1