From: Raag Jadav <raag.jadav@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: matthew.brost@intel.com, rodrigo.vivi@intel.com,
thomas.hellstrom@linux.intel.com, riana.tauro@intel.com,
michal.wajdeczko@intel.com, matthew.d.roper@intel.com,
michal.winiarski@intel.com, matthew.auld@intel.com,
dev@lankhorst.se, jani.nikula@intel.com, lukasz.laguna@intel.com,
zhanjun.dong@intel.com, lukas@wunner.de,
daniele.ceraolospurio@intel.com, badal.nilawar@intel.com,
Raag Jadav <raag.jadav@intel.com>
Subject: [PATCH v9 05/10] drm/xe/exec_queue: Introduce xe_exec_queue_reinit()
Date: Wed, 1 Jul 2026 13:59:29 +0530 [thread overview]
Message-ID: <20260701083051.450259-6-raag.jadav@intel.com> (raw)
In-Reply-To: <20260701083051.450259-1-raag.jadav@intel.com>
In preparation of usecases which require re-initializing exec queue
after PCIe FLR, introduce xe_exec_queue_reinit() helper. All the exec
queue LCRs already exist but the context is lost on PCIe FLR and needs
re-initialization.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
v2: Re-initialize migrate context (Matthew Brost)
v6: Add IS_DGFX() and EXEC_QUEUE_FLAG_KERNEL asserts (Daniele)
v9: Add negative asserts for GSC and PXP (Daniele)
Provide xe_lrc_ctx_init() as regular function (Daniele)
---
drivers/gpu/drm/xe/xe_exec_queue.c | 47 +++++++++++++++++++++++++++---
drivers/gpu/drm/xe/xe_exec_queue.h | 1 +
drivers/gpu/drm/xe/xe_lrc.c | 15 ++++++++--
drivers/gpu/drm/xe/xe_lrc.h | 2 ++
4 files changed, 59 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 1b5ca3ce578a..c864e7f2e227 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -27,6 +27,7 @@
#include "xe_migrate.h"
#include "xe_pm.h"
#include "xe_trace.h"
+#include "xe_uc_fw.h"
#include "xe_vm.h"
#include "xe_pxp.h"
@@ -335,9 +336,8 @@ static void __xe_exec_queue_fini(struct xe_exec_queue *q)
xe_lrc_put(q->lrc[i]);
}
-static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
+static u32 xe_lrc_init_flags(struct xe_exec_queue *q, u32 exec_queue_flags)
{
- int i, err;
u32 flags = 0;
/*
@@ -360,6 +360,13 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
if (q->flags & EXEC_QUEUE_FLAG_DISABLE_STATE_CACHE_PERF_FIX)
flags |= XE_LRC_DISABLE_STATE_CACHE_PERF_FIX;
+ return flags;
+}
+
+static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
+{
+ int i, err;
+
err = q->ops->init(q);
if (err)
return err;
@@ -383,8 +390,8 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
marker = xe_gt_sriov_vf_wait_valid_ggtt(q->gt);
- lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state,
- xe_lrc_ring_size(), q->msix_vec, flags);
+ lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state, xe_lrc_ring_size(),
+ q->msix_vec, xe_lrc_init_flags(q, exec_queue_flags));
if (IS_ERR(lrc)) {
err = PTR_ERR(lrc);
goto err_lrc;
@@ -406,6 +413,38 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
return err;
}
+/**
+ * xe_exec_queue_reinit() - Re-initialize exec queue
+ * @q: exec queue to re-initialize
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_exec_queue_reinit(struct xe_exec_queue *q)
+{
+ struct xe_gt *gt = q->gt;
+ int i, err;
+
+ /* TODO: Re-initialize GSC and PXP queues */
+ xe_gt_assert(gt, IS_DGFX(gt_to_xe(gt)));
+ xe_gt_assert(gt, !xe_uc_fw_is_loadable(>->uc.gsc.fw));
+ xe_gt_assert(gt, !xe_pxp_is_enabled(gt_to_xe(gt)->pxp));
+
+ /* Re-initialization only allowed for kernel queues */
+ xe_gt_assert(gt, q->flags & EXEC_QUEUE_FLAG_KERNEL);
+
+ /* Re-initialize submission backend */
+ q->ops->reinit_kernel(q);
+
+ for (i = 0; i < q->width; i++) {
+ err = xe_lrc_ctx_init(q->lrc[i], q->hwe, q->vm, q->replay_state,
+ q->msix_vec, xe_lrc_init_flags(q, q->flags));
+ if (err)
+ return err;
+ }
+
+ return 0;
+}
+
/**
* xe_exec_queue_create() - Create an exec queue
* @xe: Xe device
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
index 0225426c57b0..236fa44c2a72 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue.h
@@ -34,6 +34,7 @@ struct xe_exec_queue *xe_exec_queue_create_bind(struct xe_device *xe,
void xe_exec_queue_fini(struct xe_exec_queue *q);
void xe_exec_queue_destroy(struct kref *ref);
void xe_exec_queue_assign_name(struct xe_exec_queue *q, u32 instance);
+int xe_exec_queue_reinit(struct xe_exec_queue *q);
static inline struct xe_exec_queue *
xe_exec_queue_get_unless_zero(struct xe_exec_queue *q)
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index 3e7c995085d0..3f0a84501bba 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -1486,8 +1486,19 @@ void xe_lrc_set_multi_queue_priority(struct xe_lrc *lrc, enum xe_multi_queue_pri
lrc->desc |= FIELD_PREP(LRC_PRIORITY, xe_multi_queue_prio_to_lrc(lrc, priority));
}
-static int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
- void *replay_state, u16 msix_vec, u32 init_flags)
+/**
+ * xe_lrc_ctx_init() - Initialize LRC with context details
+ * @lrc: Pointer to the LRC
+ * @hwe: Hardware Engine
+ * @vm: The VM (address space)
+ * @replay_state: GPU hang replay state
+ * @msix_vec: MSI-X interrupt vector (for platforms that support it)
+ * @init_flags: LRC initialization flags
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
+ void *replay_state, u16 msix_vec, u32 init_flags)
{
struct xe_gt *gt = hwe->gt;
struct xe_tile *tile = gt_to_tile(gt);
diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
index 0a3a611391ee..f77c9341e77b 100644
--- a/drivers/gpu/drm/xe/xe_lrc.h
+++ b/drivers/gpu/drm/xe/xe_lrc.h
@@ -56,6 +56,8 @@ struct xe_lrc_snapshot {
struct xe_lrc *xe_lrc_create(struct xe_hw_engine *hwe, struct xe_vm *vm,
void *replay_state, u32 ring_size, u16 msix_vec, u32 flags);
+int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
+ void *replay_state, u16 msix_vec, u32 init_flags);
void xe_lrc_destroy(struct kref *ref);
/**
--
2.43.0
next prev parent reply other threads:[~2026-07-01 8:36 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-01 8:29 [PATCH v9 00/10] Introduce Xe PCIe FLR Raag Jadav
2026-07-01 8:29 ` [PATCH v9 01/10] drm/xe/uc_fw: Allow re-initializing firmware Raag Jadav
2026-07-01 8:29 ` [PATCH v9 02/10] drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel() Raag Jadav
2026-07-01 8:29 ` [PATCH v9 03/10] drm/xe/gt: Introduce FLR helpers Raag Jadav
2026-07-01 8:29 ` [PATCH v9 04/10] drm/xe/bo_evict: Introduce xe_bo_restore_map() Raag Jadav
2026-07-01 8:29 ` Raag Jadav [this message]
2026-07-01 8:29 ` [PATCH v9 06/10] drm/xe/migrate: Introduce xe_migrate_reinit() Raag Jadav
2026-07-01 8:29 ` [PATCH v9 07/10] drm/xe/pm: Introduce xe_device_suspend/resume() Raag Jadav
2026-07-01 8:29 ` [PATCH v9 08/10] drm/xe: Improve wedged state management Raag Jadav
2026-07-09 21:27 ` Matthew Brost
2026-07-10 5:01 ` Raag Jadav
2026-07-01 8:29 ` [PATCH v9 09/10] drm/xe/pci: Introduce PCIe FLR Raag Jadav
2026-07-01 8:29 ` [PATCH v9 10/10] drm/xe/doc: Wire up PCI Error Handling Raag Jadav
2026-07-01 8:42 ` ✗ CI.checkpatch: warning for Introduce Xe PCIe FLR (rev9) Patchwork
2026-07-01 8:43 ` ✓ CI.KUnit: success " Patchwork
2026-07-01 9:41 ` ✓ Xe.CI.BAT: " Patchwork
2026-07-01 23:59 ` ✓ Xe.CI.FULL: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260701083051.450259-6-raag.jadav@intel.com \
--to=raag.jadav@intel.com \
--cc=badal.nilawar@intel.com \
--cc=daniele.ceraolospurio@intel.com \
--cc=dev@lankhorst.se \
--cc=intel-xe@lists.freedesktop.org \
--cc=jani.nikula@intel.com \
--cc=lukas@wunner.de \
--cc=lukasz.laguna@intel.com \
--cc=matthew.auld@intel.com \
--cc=matthew.brost@intel.com \
--cc=matthew.d.roper@intel.com \
--cc=michal.wajdeczko@intel.com \
--cc=michal.winiarski@intel.com \
--cc=riana.tauro@intel.com \
--cc=rodrigo.vivi@intel.com \
--cc=thomas.hellstrom@linux.intel.com \
--cc=zhanjun.dong@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox