From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E69D7C43458 for ; Wed, 1 Jul 2026 16:33:18 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A4C5410F062; Wed, 1 Jul 2026 16:33:18 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="azI5ezfv"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) by gabe.freedesktop.org (Postfix) with ESMTPS id 29CE110F062 for ; Wed, 1 Jul 2026 16:33:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1782923597; x=1814459597; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Oqng2x26xqx7fg6gY4E/IrFbqpa+bHmAHudTmqZfo38=; b=azI5ezfvvrfaLgYN219JO2qF5QdtQEF5jtvK2NYdVQc1Rex3Mfj21UtQ 1bv6AdEyQx7mdn92C4saVKzL9Pp/yDVkFXWkuslUNFeI4q8D32PWfoW/G ZM2omGqwNavN2lZL6MsGflz+a/jL0ypKCsB9zgRRdY/SU7/vkzauXOZW/ HetcNQjWe72eH291DWQ6Ond2Wp+U4GQFwEkgtFHGWIc+rzUuqQ7ZBJZ3z zjg+hBhVajwD09gObRbNPd9gncTT9hG0tbVufmEqCsg00YO3t2I77cwCi wl6WVuvmYPmorgMapSPD5fisYuvqyt1Yh+v6OQjUAub+3cI5M3HkUCP00 A==; X-CSE-ConnectionGUID: IfSzooauQ+qQwwv+YlZfcA== X-CSE-MsgGUID: LkRQAdnLTwmy5CUQjDr0ZA== X-IronPort-AV: E=McAfee;i="6800,10657,11834"; a="82779250" X-IronPort-AV: E=Sophos;i="6.25,142,1779174000"; d="scan'208";a="82779250" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Jul 2026 09:33:17 -0700 X-CSE-ConnectionGUID: PT9iZFPIRO2HwRHMgNbUkg== X-CSE-MsgGUID: AwcJUEMhSO+lmwuKbt5F7w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,142,1779174000"; d="scan'208";a="256196437" Received: from gfx-coremm-kmd15.iind.intel.com ([10.223.55.8]) by orviesa003.jf.intel.com with ESMTP; 01 Jul 2026 09:33:16 -0700 From: Nareshkumar Gollakoti To: intel-xe@lists.freedesktop.org Cc: himal.prasad.ghimiray@intel.com, Nareshkumar Gollakoti Subject: [PATCH v2 4/8] drm/xe: add 1G BO page-size alignment flag Date: Wed, 1 Jul 2026 22:03:44 +0530 Message-ID: <20260701163348.3432358-5-naresh.kumar.g@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260701163348.3432358-1-naresh.kumar.g@intel.com> References: <20260701163348.3432358-1-naresh.kumar.g@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" Add XE_BO_FLAG_NEEDS_1G and use it to request 1G alignment for BOs that require a 1G minimum page size. Update xe_bo_init_locked() so VRAM and stolen-memory BO sizing honors the new flag alongside the existing 64K and 2M page-size requirements. When XE_BO_FLAG_NEEDS_1G is set, the BO size is rounded up to 1G; otherwise the existing 2M and 64K alignment behavior is preserved. Signed-off-by: Nareshkumar Gollakoti --- drivers/gpu/drm/xe/xe_bo.c | 12 ++++++++++-- drivers/gpu/drm/xe/xe_bo.h | 1 + 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c index 4c80bac67622..45ff01df68e1 100644 --- a/drivers/gpu/drm/xe/xe_bo.c +++ b/drivers/gpu/drm/xe/xe_bo.c @@ -2323,8 +2323,16 @@ struct xe_bo *xe_bo_init_locked(struct xe_device *xe, struct xe_bo *bo, if (flags & (XE_BO_FLAG_VRAM_MASK | XE_BO_FLAG_STOLEN) && !(flags & XE_BO_FLAG_IGNORE_MIN_PAGE_SIZE) && ((xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K) || - (flags & (XE_BO_FLAG_NEEDS_64K | XE_BO_FLAG_NEEDS_2M)))) { - size_t align = flags & XE_BO_FLAG_NEEDS_2M ? SZ_2M : SZ_64K; + (flags & (XE_BO_FLAG_NEEDS_64K | XE_BO_FLAG_NEEDS_2M + | XE_BO_FLAG_NEEDS_1G)))) { + size_t align; + + if (flags & XE_BO_FLAG_NEEDS_1G) + align = SZ_1G; + else if (flags & XE_BO_FLAG_NEEDS_2M) + align = SZ_2M; + else + align = SZ_64K; aligned_size = ALIGN(size, align); if (type != ttm_bo_type_device) diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h index 6340317f7d2e..d5d023cac367 100644 --- a/drivers/gpu/drm/xe/xe_bo.h +++ b/drivers/gpu/drm/xe/xe_bo.h @@ -52,6 +52,7 @@ #define XE_BO_FLAG_CPU_ADDR_MIRROR BIT(24) #define XE_BO_FLAG_FORCE_USER_VRAM BIT(25) #define XE_BO_FLAG_NO_COMPRESSION BIT(26) +#define XE_BO_FLAG_NEEDS_1G BIT(27) /* this one is trigger internally only */ #define XE_BO_FLAG_INTERNAL_TEST BIT(30) -- 2.43.0