[PATCH] drm/xe/pci: Disable Multi-LRC on single VCS/VECS platforms

[Jonathan Cavitt <jonathan.cavitt@intel.com>]

Recent platforms like PTL, NVL-S, and NVL-P have only had a single video
decode engine instance and a single video encode engine instance.  As
Multi LRCA requires at least two engines of the same type, this means
these platforms simply haven't been capable of multi-LRC.

Do not expose the uapi for this unused/unsupported feature on these
platforms.

Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/xe/xe_pci.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index cd0e42dd4992..7ff4f3e1f34d 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -443,7 +443,6 @@ static const struct xe_device_desc ptl_desc = {
 	.has_pre_prod_wa = 1,
 	.has_pxp = true,
 	.max_gt_per_tile = 2,
-	MULTI_LRC_MASK,
 	.needs_scratch = true,
 	.needs_shared_vf_gt_wq = true,
 	.va_bits = 48,
@@ -458,7 +457,6 @@ static const struct xe_device_desc nvls_desc = {
 	.has_pre_prod_wa = 1,
 	.has_sriov = true,
 	.max_gt_per_tile = 2,
-	MULTI_LRC_MASK,
 	.require_force_probe = true,
 	.va_bits = 48,
 	.vm_max_level = 4,
@@ -498,7 +496,6 @@ static const struct xe_device_desc nvlp_desc = {
 	.has_pre_prod_wa = true,
 	.has_sriov = true,
 	.max_gt_per_tile = 2,
-	MULTI_LRC_MASK,
 	.require_force_probe = true,
 	.va_bits = 48,
 	.vm_max_level = 4,
-- 
2.53.0