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From: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: himal.prasad.ghimiray@intel.com, naresh.kumar.g@intel.com
Subject: [PATCH v4 7/8] drm/xe/pt: allow selecting the bind leaf PTE level
Date: Mon, 13 Jul 2026 07:55:40 +0530	[thread overview]
Message-ID: <20260713022541.2581814-8-naresh.kumar.g@intel.com> (raw)
In-Reply-To: <20260713022541.2581814-1-naresh.kumar.g@intel.com>

Add a target_leaf_level field to the page-table bind walk and use it to
control the level at which leaf entries are emitted.

By default, the bind walk emits level-0 leaf PTEs and relies on
xe_pt_hugepte_possible() to select huge mappings when possible. Add an
explicit target leaf level so the walk can stop earlier when the VMA
requests a larger mapping size.

Use level 1 for 2M PDE mappings and level 2 for 1G PDP mappings, while
keeping level 0 for normal mappings. The existing huge-page heuristic is
preserved for the default level-0 path.

This allows the bind path to emit 2M and 1G leaf entries when requested
by the VMA, while still validating alignment and size requirements.

v2
- avoid using max_level to control walk depth
- use target_leaf_level to preserve the normal walk behavior
- keep the default huge-page heuristic only for the level-0 path
- refine commit message

v3
- reword commit message

- v4
- allow fallback to smaller huge-page levels for non-zero target_leaf_level
- avoid constraining clear_pt walks by target_leaf_level

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
 drivers/gpu/drm/xe/xe_pt.c | 29 +++++++++++++++++++++++++++--
 1 file changed, 27 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index e466f714bf86..506757defa20 100644
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/drivers/gpu/drm/xe/xe_pt.c
@@ -302,6 +302,13 @@ struct xe_pt_stage_bind_walk {
 	bool needs_64K;
 	/** @clear_pt: clear page table entries during the bind walk */
 	bool clear_pt;
+	/** @target_leaf_level: Page-table level at which to emit leaf PTEs
+	 * 0 for normal 4K/64K mappings, 1 for 2M huge pages, and 2 for 1G huge
+	 * pages. The walk still traverses from the root down; this field tells
+	 * xe_pt_stage_bind_entry() to treat the selected level as a leaf instead
+	 * of descending further.
+	 */
+	u32 target_leaf_level;
 	/**
 	 * @vma: VMA being mapped
 	 */
@@ -514,6 +521,17 @@ xe_pt_is_pte_ps64K(u64 addr, u64 next, struct xe_pt_stage_bind_walk *xe_walk)
 	return xe_walk->found_64K;
 }
 
+static bool xe_pt_huge_leaf_allowed(u64 addr, u64 next, unsigned int level,
+				    struct xe_pt_stage_bind_walk *xe_walk)
+{
+	if (xe_walk->clear_pt)
+		return xe_pt_hugepte_possible(addr, next, level, xe_walk);
+
+	return (xe_walk->target_leaf_level == 0 ||
+		level <= xe_walk->target_leaf_level) &&
+		xe_pt_hugepte_possible(addr, next, level, xe_walk);
+}
+
 static int
 xe_pt_stage_bind_entry(struct xe_ptw *parent, pgoff_t offset,
 		       unsigned int level, u64 addr, u64 next,
@@ -531,8 +549,14 @@ xe_pt_stage_bind_entry(struct xe_ptw *parent, pgoff_t offset,
 	int ret = 0;
 	u64 pte;
 
-	/* Is this a leaf entry ?*/
-	if (level == 0 || xe_pt_hugepte_possible(addr, next, level, xe_walk)) {
+	/*
+	 * Is this a leaf entry?
+	 * Always create a 4K leaf at level 0. For huge pages (level > 0),
+	 * validate alignment and size with xe_pt_hugepte_possible().
+	 * When target_leaf_level is set, allow fallback to smaller huge pages
+	 * (e.g., 1G -> 2M -> 64K -> 4K) by accepting any level <= target.
+	 */
+	if (level == 0 || xe_pt_huge_leaf_allowed(addr, next, level, xe_walk)) {
 		struct xe_res_cursor *curs = xe_walk->curs;
 		struct xe_bo *bo = xe_vma_bo(xe_walk->vma);
 		bool is_null_or_purged = xe_vma_is_null(xe_walk->vma) ||
@@ -774,6 +798,7 @@ xe_pt_stage_bind(struct xe_tile *tile, struct xe_vma *vma,
 		xe_svm_notifier_unlock(vm);
 	}
 
+	xe_walk.target_leaf_level = vma->target_leaf_level;
 	xe_walk.needs_64K = (vm->flags & XE_VM_FLAG_64K);
 	if (clear_pt)
 		goto walk_pt;
-- 
2.43.0


  parent reply	other threads:[~2026-07-13  2:27 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-13  2:25 [PATCH v4 0/8] drm/xe: add page size allocation mode control and coverage Nareshkumar Gollakoti
2026-07-13  2:25 ` [PATCH v4 1/8] drm/xe: add page size allocation control state to xe_device Nareshkumar Gollakoti
2026-07-13  2:25 ` [PATCH v4 2/8] drm/xe: add Kconfig option for debug page-size allocation control Nareshkumar Gollakoti
2026-07-13  2:25 ` [PATCH v4 3/8] drm/xe/debugfs: add page-size allocation mode knob Nareshkumar Gollakoti
2026-07-13  2:25 ` [PATCH v4 4/8] drm/xe: add XE_BO_FLAG_NEEDS_1G for minimum page-size sizing Nareshkumar Gollakoti
2026-07-13  2:25 ` [PATCH v4 5/8] drm/xe: apply debug page-size allocation policy to user BOs Nareshkumar Gollakoti
2026-07-13  2:25 ` [PATCH v4 6/8] drm/xe/vm: propagate BO page-size requirements to VMA map flags Nareshkumar Gollakoti
2026-07-13  2:25 ` Nareshkumar Gollakoti [this message]
2026-07-13  2:25 ` [PATCH v4 8/8] drm/xe/tests: add live KUnit coverage for BO page-size allocation modes Nareshkumar Gollakoti
2026-07-13  2:33 ` ✗ CI.checkpatch: warning for drm/xe: add page size allocation mode control and coverage (rev2) Patchwork
2026-07-13  2:35 ` ✓ CI.KUnit: success " Patchwork

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