From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EF90DC55172 for ; Fri, 31 Jul 2026 23:27:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8C44510E26D; Fri, 31 Jul 2026 23:27:13 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="D6E+WVqX"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id 25DCD10E26D for ; Fri, 31 Jul 2026 23:27:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1785540430; x=1817076430; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=eXDo8G+SQ4z8eHI6JDJllul+h/+5Uho4eQQ6a2Bs5vg=; b=D6E+WVqXSEYs9REz+qoNZc9OEuQlIpe4JxQ/iLx56gM2n1XdPLkHSlHN xBlXXY4MPyJPIlGN6jRAFWacwutniViV0AyHV7IMfVJp01NVsnk6OWRs8 xsKxnf5hno0XXNxZoOor7/zYAAjRssOjGKr6UkeitpkwHsxRif0YWG+pm GVmV1POJBTZJpY/BJC+dzhU5UIm/t+4UVUnJB2XIXehjlxxHwLuX3GaD+ 9Hff1ZfOm+7YQgVML2HAKD74dBqxsO8nBiIDS5kxjRrxTETWF5GSrlOeW /id8PeAy7eosM+KN5Vla1KRzLSH9qj67+2gpFo/GL0SsaCI/qxSk8QO55 A==; X-CSE-ConnectionGUID: nbRpQkFqSI24Ejn3lA83TQ== X-CSE-MsgGUID: h65gB9dDRcuBqDNtXVojZQ== X-IronPort-AV: E=McAfee;i="6800,10657,11861"; a="97326554" X-IronPort-AV: E=Sophos;i="6.25,197,1779174000"; d="scan'208";a="97326554" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jul 2026 16:22:52 -0700 X-CSE-ConnectionGUID: 7i9xpHm2RPW7h4cEarbckg== X-CSE-MsgGUID: DMfnRl/ARo2yK7r9ZuMqGg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,197,1779174000"; d="scan'208";a="261305772" Received: from dut6094bmgfrd.fm.intel.com ([10.80.55.54]) by orviesa009.jf.intel.com with ESMTP; 31 Jul 2026 16:22:52 -0700 From: Jia Yao To: intel-xe@lists.freedesktop.org Cc: Jia Yao , Gwan-gyeong Mun , Matthew Auld , stable@vger.kernel.org Subject: [PATCH v6 2/3] drm/xe/guc_ads: allocate UM queues in VRAM on dGFX Date: Fri, 31 Jul 2026 23:22:31 +0000 Message-ID: <20260731232232.548015-3-jia.yao@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260731232232.548015-1-jia.yao@intel.com> References: <20260731232232.548015-1-jia.yao@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On iGPU, the UM queue BO is allocated in system memory. On dGFX, the BO was previously created in system memory and later reallocated in xe_guc_realloc_post_hwconfig(). Allocate the UM queue BO directly in VRAM on dGFX, where it is ultimately required. Fixes: 9c57bc08652a ("drm/xe/lnl: Drop force_probe requirement") Cc: Gwan-gyeong Mun Cc: Matthew Auld Cc: # v6.12+ Signed-off-by: Jia Yao --- drivers/gpu/drm/xe/xe_guc.c | 6 ------ drivers/gpu/drm/xe/xe_guc_ads.c | 11 ++++++----- 2 files changed, 6 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c index 4f132bf8539d..4286bd05c686 100644 --- a/drivers/gpu/drm/xe/xe_guc.c +++ b/drivers/gpu/drm/xe/xe_guc.c @@ -732,12 +732,6 @@ static int xe_guc_realloc_post_hwconfig(struct xe_guc *guc) if (ret) return ret; - if (guc->ads.um_queue_bo) { - ret = xe_managed_bo_reinit_in_vram(xe, tile, &guc->ads.um_queue_bo); - if (ret) - return ret; - } - return 0; } diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c index 46c4d702d1f3..a69ec584cc0f 100644 --- a/drivers/gpu/drm/xe/xe_guc_ads.c +++ b/drivers/gpu/drm/xe/xe_guc_ads.c @@ -456,11 +456,12 @@ int xe_guc_ads_init(struct xe_guc_ads *ads) roundup_pow_of_two(GUC_UM_QUEUE_SIZE * GUC_UM_HW_QUEUE_MAX); - bo = xe_managed_bo_create_pin_map(xe, tile, um_size, - XE_BO_FLAG_SYSTEM | - XE_BO_FLAG_GGTT | - XE_BO_FLAG_GGTT_INVALIDATE | - XE_BO_FLAG_PINNED_NORESTORE); + u32 um_flags = XE_BO_FLAG_VRAM_IF_DGFX(tile) | + XE_BO_FLAG_GGTT | + XE_BO_FLAG_GGTT_INVALIDATE | + XE_BO_FLAG_PINNED_NORESTORE; + + bo = xe_managed_bo_create_pin_map(xe, tile, um_size, um_flags); if (IS_ERR(bo)) return PTR_ERR(bo); -- 2.43.0