From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2567CC5CFEB for ; Wed, 12 Aug 2026 19:38:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BF90910F0D6; Wed, 12 Aug 2026 19:38:02 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="B3dr5Uua"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) by gabe.freedesktop.org (Postfix) with ESMTPS id BCA5F10E460 for ; Wed, 12 Aug 2026 19:38:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1786563481; x=1818099481; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=7mBpdsqTVvs6qHVqrYbe5yAm8m9z+Ap0/P4P3ZWbqZI=; b=B3dr5UuaviEdMA7vM+MVWPpZzZ9yyjtu92GTVewNTMzzR83hgqotwbTR VAucXJPX/ioWYDT7C9GKV4SyBAecmzdGU3ZRl9AgWP4ilTuTq6qvpYtVn fi5kjl0mHzKAZq3Ri2y5wn4CtohzDjgrppoYA5t84xJ0uxw0TvDRlpGA2 45YNCBDbSvd4M+1h1Z2NlJFzjvWfTPcY7mAwPbqLXJqiJmIg2VnJSXA4x aqxDDfmD6oULf/4+MUhHgJ0fyLwb7mCeWmkDuZ4a1WdOFmmlkkf5jcQOt cj0OVkWGTZ80vRidmiGGE7tNM0axpZVvGnNJ21jGu+cAkr/ili+q/2u9N w==; X-CSE-ConnectionGUID: B2BHUkotSv+TKlCRj3Sbjw== X-CSE-MsgGUID: lqHYTJzCRuuhykbjHfI+hQ== X-IronPort-AV: E=McAfee;i="6800,10657,11873"; a="104515395" X-IronPort-AV: E=Sophos;i="6.25,220,1779174000"; d="scan'208";a="104515395" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2026 12:38:01 -0700 X-CSE-ConnectionGUID: KuvmZHnSRGe3iaFldkJaaw== X-CSE-MsgGUID: wc3OLVoJSgO98ugibi9+Zg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,220,1779174000"; d="scan'208";a="263779943" Received: from mjruhl-vm.amr.corp.intel.com ([10.11.186.166]) by orviesa007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2026 12:38:00 -0700 From: "Michael J. Ruhl" To: platform-driver-x86@vger.kernel.org, intel-xe@lists.freedesktop.org, hansg@kernel.org, ilpo.jarvinen@linux.intel.com, matthew.brost@intel.com, rodrigo.vivi@intel.com, thomas.hellstrom@linux.intel.com, airlied@gmail.com, simona@ffwll.ch, david.e.box@linux.intel.com, anoop.c.vijay@intel.com, badal.nilawar@intel.com, matthew.d.roper@intel.com, james.ausmus@intel.com Subject: [PATCH v2 06/10] drm/xe/vsec: Support Crescent Island PMT Date: Wed, 12 Aug 2026 12:37:47 -0700 Message-ID: <20260812193742.2170188-18-michael.j.ruhl@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260812193742.2170188-12-michael.j.ruhl@intel.com> References: <20260812193742.2170188-12-michael.j.ruhl@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" Crescent Island (CRI) supports PMT telemetry and crashlog. Add Crescent Island (CRI) discovery structure (DVSEC) information to allow for Xe registration. Signed-off-by: Michael J. Ruhl --- drivers/gpu/drm/xe/regs/xe_pmt.h | 5 ++++ drivers/gpu/drm/xe/xe_vsec.c | 46 ++++++++++++++++++++++++++++++-- 2 files changed, 49 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/xe/regs/xe_pmt.h b/drivers/gpu/drm/xe/regs/xe_pmt.h index a62ab05c6b4c..fc9c9cb6a830 100644 --- a/drivers/gpu/drm/xe/regs/xe_pmt.h +++ b/drivers/gpu/drm/xe/regs/xe_pmt.h @@ -20,6 +20,11 @@ #define BMG_TELEMETRY_BASE_OFFSET 0xE0000 #define BMG_TELEMETRY_OFFSET (SOC_BASE + BMG_TELEMETRY_BASE_OFFSET) +#define CRI_TELEMETRY_BASE_OFFSET 0xE0000 +/* for CRI discovery and telemetry are in an indexed window */ +#define CRI_DISCOVERY_OFFSET (SOC_BASE + CRI_TELEMETRY_BASE_OFFSET) +#define CRI_TELEMETRY_OFFSET (SOC_BASE + CRI_TELEMETRY_BASE_OFFSET) + #define BMG_MODS_RESIDENCY_OFFSET (0x4D0) #define BMG_G2_RESIDENCY_OFFSET (0x530) #define BMG_G6_RESIDENCY_OFFSET (0x538) diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c index 8abe11e6312f..6345b0b4b26b 100644 --- a/drivers/gpu/drm/xe/xe_vsec.c +++ b/drivers/gpu/drm/xe/xe_vsec.c @@ -21,8 +21,19 @@ #include "regs/xe_pmt.h" -/* PMT GUID value for BMG devices. NOTE: this is NOT a PCI id */ +/* PMT GUID value for BMG and CRI devices. NOTE: this is NOT a PCI id */ #define BMG_DEVICE_ID 0xE2F8 +#define CRI_DEVICE_ID 0xE2FA + +/* + * sizeof(Crashlog Type1 Version2) = 0x18 (24) bytes + * For BMG and CRI PUNIT and OOBMSMS crashlogs are consecutive. + */ +#define BMG_CRASHLOG_PUNIT_DISC_OFFSET (0x60) +#define BMG_CRASHLOG_OOBMSM_DISC_OFFSET (BMG_CRASHLOG_PUNIT_DISC_OFFSET + 0x18) + +#define CRI_CRASHLOG_PUNIT_DISC_OFFSET (0x80) +#define CRI_CRASHLOG_OOBMSM_DISC_OFFSET (CRI_CRASHLOG_PUNIT_DISC_OFFSET + 0x18) static struct intel_vsec_header bmg_telemetry = { .rev = 1, @@ -41,7 +52,7 @@ static struct intel_vsec_header bmg_crashlog = { .num_entries = 2, .entry_size = 6, .tbir = 0, - .offset = BMG_DISCOVERY_OFFSET + 0x60, + .offset = BMG_DISCOVERY_OFFSET + BMG_CRASHLOG_PUNIT_DISC_OFFSET, }; static struct intel_vsec_header *bmg_capabilities[] = { @@ -50,9 +61,36 @@ static struct intel_vsec_header *bmg_capabilities[] = { NULL }; +static struct intel_vsec_header cri_telemetry = { + .rev = 1, + .length = 0x10, + .id = VSEC_ID_TELEMETRY, + .num_entries = 3, + .entry_size = 4, + .tbir = 0, + .offset = CRI_DISCOVERY_OFFSET, +}; + +static struct intel_vsec_header cri_crashlog = { + .rev = 1, + .length = 0x10, + .id = VSEC_ID_CRASHLOG, + .num_entries = 2, + .entry_size = 6, + .tbir = 0, + .offset = CRI_DISCOVERY_OFFSET + CRI_CRASHLOG_PUNIT_DISC_OFFSET, +}; + +static struct intel_vsec_header *cri_capabilities[] = { + &cri_telemetry, + &cri_crashlog, + NULL +}; + enum xe_vsec { XE_VSEC_UNKNOWN = 0, XE_VSEC_BMG, + XE_VSEC_CRI, }; static struct intel_vsec_platform_info xe_vsec_info[] = { @@ -60,6 +98,10 @@ static struct intel_vsec_platform_info xe_vsec_info[] = { .caps = VSEC_CAP_TELEMETRY | VSEC_CAP_CRASHLOG, .headers = bmg_capabilities, }, + [XE_VSEC_CRI] = { + .caps = VSEC_CAP_TELEMETRY | VSEC_CAP_CRASHLOG, + .headers = cri_capabilities, + }, { } }; -- 2.43.0