Re: [PATCH v5 32/33] drm/xe/gt: Report 'Queue full' pagefault error using SIGID

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Log spam under an IRQ-disabled spinlock due to WARN_ON_ONCE semantics
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--- Patch [32]: [PATCH v5 32/33] drm/xe/gt: Report 'Queue full' pagefault error using SIGID ---
commit 3d4e7bc115e30aa20f0155c869055081a51002d3
Author: Michal Wajdeczko <michal.wajdeczko@intel.com>

drm/xe/gt: Report 'Queue full' pagefault error using SIGID

This patch replaces a WARN_ON with WARN_ON_ONCE when handling a full page
fault queue, aiming to reduce extra noise. It also adds a call to
xe_log_err() to report the queue full error.

> diff --git a/drivers/gpu/drm/xe/xe_pagefault.c b/drivers/gpu/drm/xe/xe_pagefault.c
> index 8b1f6f5448baf..9e89d7b373953 100644
> --- a/drivers/gpu/drm/xe/xe_pagefault.c
> +++ b/drivers/gpu/drm/xe/xe_pagefault.c
> @@ -328,8 +328,10 @@ xe_pagefault_queue_add(struct xe_pagefault_queue *pf_queue,
>  
>  	do {
>  		/* Not possible, warn on and drop page fault */
> -		if (WARN_ON(xe_pagefault_queue_full(pf_queue)))
> +		if (WARN_ON_ONCE(xe_pagefault_queue_full(pf_queue))) {
> +			xe_log_err(xe, PAGEFAULT, -ENOSPC, "Queue full!\n");

[Severity: High]
Does this actually reduce the noise when the queue is full?

The WARN_ON_ONCE() macro prints the backtrace only the first time it is hit,
but it still evaluates to true every time the condition is met. Because
xe_log_err() is inside the if block, it will print a message every single
time the queue is full, defeating the intent of reducing extra noise.

Because this runs under a spinlock with IRQs disabled, could this lead to
severe log spam that might cause CPU soft lockups or system unresponsiveness,
especially during a GPU page fault storm?

>  			return NULL;
> +		}
>  
>  		lpf = (pf_queue->data + pf_queue->head);
>  		pf_queue->head = (pf_queue->head + xe_pagefault_entry_size()) %

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Sashiko AI review · https://sashiko.dev/#/patchset/20260814171801.13347-1-michal.wajdeczko@intel.com?part=32