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From: sashiko-bot@kernel.org
To: "Luca Coelho" <luciano.coelho@intel.com>
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v3 4/5] drm/i915/display: add a way to restore only display/pch registers in clock_gating
Date: Mon, 17 Aug 2026 09:49:07 +0000	[thread overview]
Message-ID: <20260817094908.1FD271F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260817092911.342072-5-luciano.coelho@intel.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Replacing `intel_clock_gating_init()` with `intel_display_restore_clock_gating()` in `hsw_disable_pc8()` causes GT and uncore clock gating workarounds to be permanently lost after runtime suspend on Haswell and Broadwell.
--

--- Patch [4]: [PATCH v3 4/5] drm/i915/display: add a way to restore only display/pch registers in clock_gating ---
commit d0464f11c51adf2ddadf337dda54d674de543139
Author: Luca Coelho <luciano.coelho@intel.com>
drm/i915/display: add a way to restore only display/pch registers in clock_gating

This commit introduces intel_display_restore_clock_gating() to isolate display
and PCH register restoration from core i915 clock gating initialization. It
updates hsw_disable_pc8() to use this new function instead of the broader
intel_clock_gating_init().

> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 0ebec6e0c2400..aab934f435308 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c

[ ... ]

> @@ -1588,7 +1588,7 @@ static void hsw_disable_pc8(struct intel_display *display)
>  	intel_init_pch_refclk(display);
>  
>  	/* Many display registers don't survive PC8+ */
> -	intel_clock_gating_init(display->drm);
> +	intel_display_restore_clock_gating(display);
>  }

[Severity: High]
Does replacing intel_clock_gating_init() with
intel_display_restore_clock_gating() here cause GT and uncore clock gating
workarounds to be permanently lost after runtime suspend on Haswell and
Broadwell?

When the hardware enters PC8 during runtime suspend, it loses uncore and GT
register state. Upon system wake, hsw_disable_pc8() is called in the resume
path. Bypassing the core intel_clock_gating_init() seems to leave the GT
workarounds unrestored.

Could this lead to subsequent GPU workloads executing with missing
workarounds, potentially causing GPU hangs or system instability under load?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260817092911.342072-1-luciano.coelho@intel.com?part=4

  reply	other threads:[~2026-08-17  9:49 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-17  9:26 [PATCH v3 0/5] drm/i915/display: reduce clock_gating interface between core and display Luca Coelho
2026-08-17  9:26 ` [PATCH v3 1/5] drm/i915/display: consolidate Gen9 clock gating initialization Luca Coelho
2026-08-27  7:24   ` Jani Nikula
2026-08-17  9:26 ` [PATCH v3 2/5] drm/i915/display: consolidate remaining " Luca Coelho
2026-08-27  7:27   ` Jani Nikula
2026-08-17  9:26 ` [PATCH v3 3/5] drm/i915/display: remove unnecessary clock_gating include from intel_display.c Luca Coelho
2026-08-27  7:28   ` Jani Nikula
2026-08-31  8:13     ` Luca Coelho
2026-08-17  9:26 ` [PATCH v3 4/5] drm/i915/display: add a way to restore only display/pch registers in clock_gating Luca Coelho
2026-08-17  9:49   ` sashiko-bot [this message]
2026-08-17  9:26 ` [PATCH v3 5/5] drm/i915/display: split part of intel_display_reset_finish() to a new function Luca Coelho

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