Intel-XE Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: sashiko-bot@kernel.org
To: "Raag Jadav" <raag.jadav@intel.com>
Cc: intel-xe@lists.freedesktop.org
Subject: Re: [PATCH v10 09/10] drm/xe/pci: Introduce PCIe Function Level Reset
Date: Fri, 21 Aug 2026 11:39:03 +0000	[thread overview]
Message-ID: <20260821113903.AF8D61F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260821112436.545405-10-raag.jadav@intel.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Missing hardware quiescence before PCI reset leads to potential system panics.
--

--- Patch [9]: [PATCH v10 09/10] drm/xe/pci: Introduce PCIe Function Level Reset ---
commit f3c8299b36fc1f6ea55ecfbcd781c310e60e62ab
Author: Raag Jadav <raag.jadav@intel.com>

drm/xe/pci: Introduce PCIe Function Level Reset

This commit introduces PCIe Function Level Reset (FLR) support which 
re-initializes hardware state without the need for reloading the driver 
from userspace.

> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> index 48466d726eae6..81c4e55fae8f0 100644
> --- a/drivers/gpu/drm/xe/xe_pci_error.c
> +++ b/drivers/gpu/drm/xe/xe_pci_error.c

> [ ... ]

> @@ -142,9 +189,90 @@ static void xe_pci_error_resume(struct pci_dev *pdev)
> +static void xe_pci_reset_prepare(struct pci_dev *pdev)
> +{
> +	struct xe_device *xe = pdev_to_xe_device(pdev);
> +	int err;
> +
> +	err = xe_pci_reset_skip(xe);
> +	if (err) {
> +		xe_err(xe, "PCIe FLR not supported\n");
> +		goto wedge;
> +	}
> +
> +	err = xe_device_wedged(xe);
> +	if (err)
> +		xe_err(xe, "PCIe FLR failed, device in unexpected state\n");
> +
> +wedge:
> +	/* Wedge the device to prevent userspace access but don't send the event yet */
> +	xe_device_wedged_get(xe);
> +	if (err)
> +		return;

[Severity: High]
Since xe_pci_reset_prepare() is a void callback, the PCI core will proceed
with the physical reset unconditionally even if we return early here. 

If xe_pci_reset_skip(xe) returns true, we jump to the wedge label with err
evaluating to true. This causes the function to return immediately after
xe_device_wedged_get(xe).

Does this skip the hardware quiescence (xe_device_suspend) while the PCI
core still performs the physical reset? 

If a user triggers a sysfs reset on a device that skips FLR, could this
leave VRAM mapped and DMA active during the reset, resulting in PCIe
Unsupported Requests and fatal AER faults that panic the system?

> +
> +	/*
> +	 * The hardware could be in corrupted state and access unreliable, but we try to
> +	 * update data structures and cleanup any pending work to avoid side effects during
> +	 * PCIe FLR. This will be similar to system suspend flow but without eviction.
> +	 */
> +	err = xe_device_suspend(xe, true);
> +	if (err) {
> +		xe_err(xe, "Failed to prepare for PCIe FLR\n");
> +		return;
> +	}
> +
> +	xe->flr_prepared = true;
> +	xe_info(xe, "Prepared for PCIe FLR\n");
> +}

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260821112436.545405-1-raag.jadav@intel.com?part=9

  reply	other threads:[~2026-08-21 11:39 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-21 11:23 [PATCH v10 00/10] Introduce Xe PCIe FLR Raag Jadav
2026-08-21 11:23 ` [PATCH v10 01/10] drm/xe/uc_fw: Allow re-initializing firmware Raag Jadav
2026-08-21 11:41   ` sashiko-bot
2026-08-21 11:23 ` [PATCH v10 02/10] drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel() Raag Jadav
2026-08-21 11:52   ` sashiko-bot
2026-08-21 11:23 ` [PATCH v10 03/10] drm/xe/gt: Introduce FLR helpers Raag Jadav
2026-08-21 11:23 ` [PATCH v10 04/10] drm/xe/bo_evict: Introduce xe_bo_restore_map() Raag Jadav
2026-08-21 11:23 ` [PATCH v10 05/10] drm/xe/exec_queue: Introduce xe_exec_queue_reinit() Raag Jadav
2026-08-21 11:43   ` sashiko-bot
2026-08-21 11:23 ` [PATCH v10 06/10] drm/xe/migrate: Introduce xe_migrate_reinit() Raag Jadav
2026-08-21 11:39   ` sashiko-bot
2026-08-21 11:23 ` [PATCH v10 07/10] drm/xe/pm: Introduce xe_device_suspend/resume() Raag Jadav
2026-08-21 11:43   ` sashiko-bot
2026-08-21 11:23 ` [PATCH v10 08/10] drm/xe: Introduce temporary device wedging Raag Jadav
2026-08-21 11:37   ` sashiko-bot
2026-08-21 11:23 ` [PATCH v10 09/10] drm/xe/pci: Introduce PCIe Function Level Reset Raag Jadav
2026-08-21 11:39   ` sashiko-bot [this message]
2026-08-21 11:23 ` [PATCH v10 10/10] drm/xe/doc: Wire up PCI Error Handling Raag Jadav
2026-08-21 11:31 ` ✗ CI.checkpatch: warning for Introduce Xe PCIe FLR (rev10) Patchwork
2026-08-21 11:33 ` ✓ CI.KUnit: success " Patchwork
2026-08-21 12:37 ` ✓ Xe.CI.BAT: " Patchwork
2026-08-21 14:38 ` ✓ Xe.CI.FULL: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260821113903.AF8D61F000E9@smtp.kernel.org \
    --to=sashiko-bot@kernel.org \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=raag.jadav@intel.com \
    --cc=sashiko-reviews@lists.linux.dev \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox