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This aligns with the move away from embedded dma_resv structures and towards reference-counted dynamic allocation throughout the DRM subsystem. The i915 address space structures (GGTT, PPGTT) maintain their own reservation locks for page directory objects and buffer pools. By switching to dynamic allocation, we reduce the size of the VM structures and gain proper error handling if allocation fails. Changes include: - Convert i915_address_space._resv from embedded struct to pointer - Update i915_address_space_init() to return int for error handling - Update ppgtt_init() to return int and handle allocation failures - Update all callers in GGTT, PPGTT, gen6_ppgtt, and gen8_ppgtt code - Update helper functions like i915_vm_resv_get() to use pointer - Add proper cleanup on allocation failures All initialization functions now check the allocation and return -ENOMEM if it fails, with appropriate cleanup of already-allocated resources. Signed-off-by: Christian König Assisted-by: Claude:Sonnet 4 --- drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 7 ++++++- drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 7 ++++++- drivers/gpu/drm/i915/gt/intel_ggtt.c | 14 ++++++++++---- drivers/gpu/drm/i915/gt/intel_gtt.c | 13 +++++++++---- drivers/gpu/drm/i915/gt/intel_gtt.h | 8 ++++---- drivers/gpu/drm/i915/gt/intel_ppgtt.c | 16 ++++++++++++---- 6 files changed, 47 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/gen6_ppgtt.c b/drivers/gpu/drm/i915/gt/gen6_ppgtt.c index 438cd4724ac4..f8586467aef6 100644 --- a/drivers/gpu/drm/i915/gt/gen6_ppgtt.c +++ b/drivers/gpu/drm/i915/gt/gen6_ppgtt.c @@ -437,7 +437,12 @@ struct i915_ppgtt *gen6_ppgtt_create(struct intel_gt *gt) mutex_init(&ppgtt->flush); - ppgtt_init(&ppgtt->base, gt, 0); + err = ppgtt_init(&ppgtt->base, gt, 0); + if (err) { + kfree(ppgtt); + return ERR_PTR(err); + } + ppgtt->base.vm.pd_shift = ilog2(SZ_4K * SZ_4K / sizeof(gen6_pte_t)); ppgtt->base.vm.top = 1; diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c index cfa09b250a1b..21cb9db10688 100644 --- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c +++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c @@ -1010,7 +1010,12 @@ struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt, if (!ppgtt) return ERR_PTR(-ENOMEM); - ppgtt_init(ppgtt, gt, lmem_pt_obj_flags); + err = ppgtt_init(ppgtt, gt, lmem_pt_obj_flags); + if (err) { + kfree(ppgtt); + return ERR_PTR(err); + } + ppgtt->vm.top = i915_vm_is_4lvl(&ppgtt->vm) ? 3 : 2; ppgtt->vm.pd_shift = ilog2(SZ_4K * SZ_4K / sizeof(gen8_pte_t)); diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c index 3cc8df7b8fad..735f53fa648f 100644 --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c @@ -56,8 +56,11 @@ static void i915_ggtt_color_adjust(const struct drm_mm_node *node, static int ggtt_init_hw(struct i915_ggtt *ggtt) { struct drm_i915_private *i915 = ggtt->vm.i915; + int ret; - i915_address_space_init(&ggtt->vm, VM_CLASS_GGTT); + ret = i915_address_space_init(&ggtt->vm, VM_CLASS_GGTT); + if (ret) + return ret; ggtt->vm.is_ggtt = true; @@ -1140,7 +1143,7 @@ void i915_ggtt_driver_late_release(struct drm_i915_private *i915) struct i915_ggtt *ggtt = to_gt(i915)->ggtt; GEM_WARN_ON(kref_read(&ggtt->vm.resv_ref) != 1); - dma_resv_put(&ggtt->vm._resv); + dma_resv_put(ggtt->vm._resv); } static unsigned int gen6_get_total_gtt_size(u16 snb_gmch_ctl) @@ -1514,7 +1517,10 @@ static int ggtt_probe_hw(struct i915_ggtt *ggtt, struct intel_gt *gt) ggtt->vm.gt = gt; ggtt->vm.i915 = i915; ggtt->vm.dma = i915->drm.dev; - dma_resv_init(&ggtt->vm._resv); + + ggtt->vm._resv = dma_resv_alloc(); + if (!ggtt->vm._resv) + return -ENOMEM; if (GRAPHICS_VER(i915) >= 8) ret = gen8_gmch_probe(ggtt); @@ -1524,7 +1530,7 @@ static int ggtt_probe_hw(struct i915_ggtt *ggtt, struct intel_gt *gt) ret = intel_ggtt_gmch_probe(ggtt); if (ret) { - dma_resv_put(&ggtt->vm._resv); + dma_resv_put(ggtt->vm._resv); return ret; } diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c index 7b1bdb121c88..670cbe0b8cc0 100644 --- a/drivers/gpu/drm/i915/gt/intel_gtt.c +++ b/drivers/gpu/drm/i915/gt/intel_gtt.c @@ -197,7 +197,7 @@ static void __i915_vm_close(struct i915_address_space *vm) int i915_vm_lock_objects(struct i915_address_space *vm, struct i915_gem_ww_ctx *ww) { - if (vm->scratch[0]->base.resv == &vm->_resv) { + if (vm->scratch[0]->base.resv == vm->_resv) { return i915_gem_object_lock(vm->scratch[0], ww); } else { struct i915_ppgtt *ppgtt = i915_vm_to_ppgtt(vm); @@ -225,7 +225,7 @@ void i915_vm_resv_release(struct kref *kref) struct i915_address_space *vm = container_of(kref, typeof(*vm), resv_ref); - dma_resv_put(&vm->_resv); + dma_resv_put(vm->_resv); mutex_destroy(&vm->mutex); kfree(vm); @@ -258,7 +258,7 @@ void i915_vm_release(struct kref *kref) queue_work(vm->i915->wq, &vm->release_work); } -void i915_address_space_init(struct i915_address_space *vm, int subclass) +int i915_address_space_init(struct i915_address_space *vm, int subclass) { kref_init(&vm->ref); @@ -295,7 +295,10 @@ void i915_address_space_init(struct i915_address_space *vm, int subclass) might_alloc(GFP_KERNEL); mutex_release(&vm->mutex.dep_map, _THIS_IP_); } - dma_resv_init(&vm->_resv); + + vm->_resv = dma_resv_alloc(); + if (!vm->_resv) + return -ENOMEM; GEM_BUG_ON(!vm->total); drm_mm_init(&vm->mm, 0, vm->total); @@ -312,6 +315,8 @@ void i915_address_space_init(struct i915_address_space *vm, int subclass) INIT_LIST_HEAD(&vm->bound_list); INIT_LIST_HEAD(&vm->unbound_list); + + return 0; } void *__px_vaddr(struct drm_i915_gem_object *p) diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h index b54ee4f25af1..3976c176110f 100644 --- a/drivers/gpu/drm/i915/gt/intel_gtt.h +++ b/drivers/gpu/drm/i915/gt/intel_gtt.h @@ -266,7 +266,7 @@ struct i915_address_space { struct mutex mutex; /* protects vma and our lists */ struct kref resv_ref; /* kref to keep the reservation lock alive. */ - struct dma_resv _resv; /* reservation lock for all pd objects, and buffer pool */ + struct dma_resv *_resv; /* reservation lock for all pd objects, and buffer pool */ #define VM_CLASS_GGTT 0 #define VM_CLASS_PPGTT 1 #define VM_CLASS_DPT 2 @@ -504,7 +504,7 @@ static inline void assert_vm_alive(struct i915_address_space *vm) static inline struct dma_resv *i915_vm_resv_get(struct i915_address_space *vm) { kref_get(&vm->resv_ref); - return &vm->_resv; + return vm->_resv; } void i915_vm_release(struct kref *kref); @@ -525,7 +525,7 @@ static inline void i915_vm_resv_put(struct i915_address_space *vm) kref_put(&vm->resv_ref, i915_vm_resv_release); } -void i915_address_space_init(struct i915_address_space *vm, int subclass); +int i915_address_space_init(struct i915_address_space *vm, int subclass); void i915_address_space_fini(struct i915_address_space *vm); static inline u32 i915_pte_index(u64 address, unsigned int pde_shift) @@ -583,7 +583,7 @@ i915_page_dir_dma_addr(const struct i915_ppgtt *ppgtt, const unsigned int n) return __px_dma(pt ? px_base(pt) : ppgtt->vm.scratch[ppgtt->vm.top]); } -void ppgtt_init(struct i915_ppgtt *ppgtt, struct intel_gt *gt, +int ppgtt_init(struct i915_ppgtt *ppgtt, struct intel_gt *gt, unsigned long lmem_pt_obj_flags); void intel_ggtt_bind_vma(struct i915_address_space *vm, struct i915_vm_pt_stash *stash, diff --git a/drivers/gpu/drm/i915/gt/intel_ppgtt.c b/drivers/gpu/drm/i915/gt/intel_ppgtt.c index 72d8473a448b..9abd4faa2e55 100644 --- a/drivers/gpu/drm/i915/gt/intel_ppgtt.c +++ b/drivers/gpu/drm/i915/gt/intel_ppgtt.c @@ -304,8 +304,8 @@ void i915_vm_free_pt_stash(struct i915_address_space *vm, } } -void ppgtt_init(struct i915_ppgtt *ppgtt, struct intel_gt *gt, - unsigned long lmem_pt_obj_flags) +int ppgtt_init(struct i915_ppgtt *ppgtt, struct intel_gt *gt, + unsigned long lmem_pt_obj_flags) { struct drm_i915_private *i915 = gt->i915; @@ -315,9 +315,17 @@ void ppgtt_init(struct i915_ppgtt *ppgtt, struct intel_gt *gt, ppgtt->vm.total = BIT_ULL(RUNTIME_INFO(i915)->ppgtt_size); ppgtt->vm.lmem_pt_obj_flags = lmem_pt_obj_flags; - dma_resv_init(&ppgtt->vm._resv); - i915_address_space_init(&ppgtt->vm, VM_CLASS_PPGTT); + ppgtt->vm._resv = dma_resv_alloc(); + if (!ppgtt->vm._resv) + return -ENOMEM; + + if (i915_address_space_init(&ppgtt->vm, VM_CLASS_PPGTT)) { + dma_resv_put(ppgtt->vm._resv); + return -ENOMEM; + } ppgtt->vm.vma_ops.bind_vma = ppgtt_bind_vma; ppgtt->vm.vma_ops.unbind_vma = ppgtt_unbind_vma; + + return 0; } -- 2.43.0