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Tue, 1 Sep 2026 09:01:15 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by CO1PEPF00012E84.mail.protection.outlook.com (10.167.249.59) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.382.8 via Frontend Transport; Tue, 1 Sep 2026 09:01:15 +0000 Received: from honglei-remote.amd.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.46; Tue, 1 Sep 2026 04:01:11 -0500 From: Honglei Huang To: , , , , , , CC: , , , , , , , , Subject: [PATCH v2 0/4] drm/gpusvm: share one HMM fault across per-device DMA mappings Date: Tue, 1 Sep 2026 17:00:56 +0800 Message-ID: <20260901090100.2024933-1-honghuan@amd.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF00012E84:EE_|DS0PR12MB8444:EE_ X-MS-Office365-Filtering-Correlation-Id: 137ea3c0-2e35-437f-5c83-08df0807942b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: CH35ppZ1hXyART6qNc09uVDD5QO7cwc+AxmRh3AUP6VlXDBRghUTUTXZIP75D1g8Dkd+TApKadHi8RV9qZAyiJt9jsRUEdnm8HTKmnNPAhjnmxSgfVvtkjyaHhUxDcPCNktYHEwllgTiOvRS7KDgU0/RYwWejxySGwW9fBKWRxADZNXZWLbVKZA2KhBuRQ/SdAajowfX+dgZ3MhHAMW0/MFUUGWM/W+5S97FyHtH1F+lz7UU0OcgieHGAmfCc9RujnhBMvghixCiZa3ffnsnSN+SDoPAwNRXWm26LzVkD7spD2+Je9NoRIcwcHT4Eb4XeTNBJan+jWyASqen97d2l+cMcLngtoCAR9rsZBRLElcxf/LgmP5Don678GmT+qNW35NC2Drn08CgHkmQZ80uRcdv6vCOVEVlrAAU5h/tWKjcKyPB3TOV+Q8HZx/GG3hQ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Sep 2026 09:01:15.2237 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 137ea3c0-2e35-437f-5c83-08df0807942b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF00012E84.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8444 X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" This series is a follow up to the earlier drm_gpusvm_pages decoupling series [1], and follows the direction Matt suggested [2]. drm_gpusvm_get_pages() does two things at once: the MM level HMM fault of the CPU range, and the device DMA mapping of the faulted pages. When one CPU range is mirrored on several devices, every device has to call get_pages() and redo the HMM fault. Matt suggested [2] passing an array of drm_gpusvm_pages plus a count so the fault is taken once and shared, while the notifier retry loop stays in common code so drivers never open code it. The series builds up to that in small steps, no functional change until the last two patches: - patch 1 moves the dma_addr allocation out of the notifier locked section, so the mapping step becomes self contained. - patch 2 pulls the per-device mapping loop into drm_gpusvm_dma_map_pages(). Code motion only. - patch 3 makes get_pages() take an array of drm_gpusvm_pages plus a count: fault once, then DMA map each instance, one per owning drm_device, under a single notifier retry gate. Instances that are already mapped are skipped, so an -EAGAIN retry does not redo them. The common 1:1 case passes count == 1 and is unchanged. - patch 4 adds a no_dma_map context flag so a driver that only needs the CPU pages faulted in can skip the device DMA mapping. Patch 4 has no in-tree user yet, AMDXDNA is the intended consumer but that conversion is not ready. It is independent of patches 1-3, happy to drop it and repost it together with its user. v2: - Rebased on drm-tip. Matt asked for Stanislav's hmm_range_fault_unlocked_timeout() patch [3] to be carried at the base of this series, it has since landed in drm-tip, so this version is just rebased on top of it. - Dropped v1 patch 1 ("drm/gpusvm: extract drm_gpusvm_hmm_fault() helper"), it is part of [3] now. - patch 3: drm_gpusvm_pages_valid_unlocked() takes the array and the count itself, instead of get_pages() open coding an all_valid loop. - patch 3: fixed the N:1 doc example, it used the wrong union member when the count is 1. Added a driver_pages() accessor. - patch 3: documented that on error the instances mapped before the failing one stay mapped, the caller must unmap and free all of them. - patch 4: reject no_dma_map together with devmem_only, without the DMA mapping step there is no page type check to enforce it. - patch 4: documented that no_dma_map only returns a snapshot, the caller must recheck mmu_interval_read_retry() itself. tests: AMDGPU: SVM:DRM N:1 multi device support is work in progress on top of this series. The single device (1:1) path was tested with the amdgpu SVM adaptation on top. Based on amdgpu SVM [4]. Tested on gfx943 (MI300X) and gfx906 (MI60) with XNACK on/off: - KFD test: SVM all passed except the get attr refactor. - ROCR test: all passed. - HIP catch test: gfx943 (MI300X): 99% passed. gfx906 (MI60): 99% passed. links: [1] drm_gpusvm_pages decoupling series: https://lore.kernel.org/amd-gfx/20260630102127.392396-1-honghuan@amd.com/ [2] Matt's suggested direction: https://lore.kernel.org/amd-gfx/aijdg7RWwrEDEMxC@gsse-cloud1.jf.intel.com/ [3] drm/gpusvm: use hmm_range_fault_unlocked_timeout() for range faults: https://lore.kernel.org/20260723-hmm-v10-v11-8-c55b003a4b61@gmail.com [4] amdgpu SVM: https://lore.kernel.org/amd-gfx/20260804094246.1719318-1-ray.huang@amd.com/ Honglei Huang (4): drm/gpusvm: move dma_addr allocation before the notifier lock drm/gpusvm: extract drm_gpusvm_dma_map_pages() helper drm/gpusvm: let drm_gpusvm_get_pages() map an array of pages drm/gpusvm: make the DMA mapping step in get_pages() optional drivers/gpu/drm/drm_gpusvm.c | 336 +++++++++++++++++++++----------- drivers/gpu/drm/xe/xe_svm.c | 2 +- drivers/gpu/drm/xe/xe_userptr.c | 2 +- include/drm/drm_gpusvm.h | 10 + 4 files changed, 239 insertions(+), 111 deletions(-) base-commit: c8420bcb1802510e5411ea4c98e2e07bdb43d74e -- 2.34.1