From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 58409C61DD3 for ; Thu, 3 Sep 2026 20:10:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 13A8D10F77A; Thu, 3 Sep 2026 20:10:48 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="ROyI+/PB"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4D53110F766 for ; Thu, 3 Sep 2026 20:10:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1788466242; x=1820002242; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=Ya8AMyFNguaibxMyQYVccNa+IZs3DxApoSujJGc4oSs=; b=ROyI+/PBvAJI2DcMYJKzbW0lMvCjGHrNrx+n/OrMV1G+aYZqYSh0GiAV nTeSq0N1eIS0dNA9c3KDpu22tMuahda3Mp/caszkPT1nlTS0t7qvUc45z rXFcDAgkED0waIp4/52J3sX/Ml4Bd13uWPZ0yEoWOb1TAytmCsdRwrr05 JN1KW3Dos84ALMU3PUhQf8iEuVUpKZp8Hci+9hbKpVH/KxFqD4p8eTCdq wmsHIlJfRds9HuRwMCuUUCXz3TIvcwD80fyP2YRXyyPPX3Qy3E6vhUh2C blTK4/rySzxJ8qMdZ+8w6MeA0Oiq1UAj1aPY+7X1VYbbIh0xu9OZ038ii g==; X-CSE-ConnectionGUID: xkHPXQ73SyegcjT+mglB4g== X-CSE-MsgGUID: PsFvYjpUQdeCx9HVPwNPDQ== X-IronPort-AV: E=McAfee;i="6800,10657,11895"; a="88994655" X-IronPort-AV: E=Sophos;i="6.25,260,1779174000"; d="scan'208";a="88994655" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Sep 2026 13:10:41 -0700 X-CSE-ConnectionGUID: GK+tQCFwQUS7posk32TcGg== X-CSE-MsgGUID: pl8pFCHqTNyzcOTCKchyUw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,260,1779174000"; d="scan'208";a="273348156" Received: from mjruhl-vm.amr.corp.intel.com ([10.11.186.166]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Sep 2026 13:10:35 -0700 From: "Michael J. Ruhl" To: platform-driver-x86@vger.kernel.org, intel-xe@lists.freedesktop.org, hansg@kernel.org, ilpo.jarvinen@linux.intel.com, matthew.brost@intel.com, rodrigo.vivi@intel.com, thomas.hellstrom@linux.intel.com, airlied@gmail.com, simona@ffwll.ch, david.e.box@linux.intel.com, anoop.c.vijay@intel.com, badal.nilawar@intel.com, matthew.d.roper@intel.com, james.ausmus@intel.com, karthik.poosa@intel.com Subject: [PATCH v5 16/18] drm/xe/vsec: Add PMT GUID internal access Date: Thu, 3 Sep 2026 13:10:18 -0700 Message-ID: <20260903201002.1064889-36-michael.j.ruhl@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260903201002.1064889-20-michael.j.ruhl@intel.com> References: <20260903201002.1064889-20-michael.j.ruhl@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" Xe accesses the PMT infrastructure directly. The current usage is supported ONLY by BMG devices. CRI has further requirements for access. Add the platform id to the GUID register define and use that for the register access. Add an API to allow access the GUID based on the platform. Signed-off-by: Michael J. Ruhl --- drivers/gpu/drm/xe/regs/xe_pmt.h | 4 ++- drivers/gpu/drm/xe/xe_debugfs.c | 3 +- drivers/gpu/drm/xe/xe_device_types.h | 2 ++ drivers/gpu/drm/xe/xe_hwmon.c | 2 +- drivers/gpu/drm/xe/xe_pcode.c | 2 +- drivers/gpu/drm/xe/xe_vsec.c | 44 ++++++++++++++++++++++++++++ drivers/gpu/drm/xe/xe_vsec.h | 1 + 7 files changed, 54 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/xe/regs/xe_pmt.h b/drivers/gpu/drm/xe/regs/xe_pmt.h index 2f6658395587..fb5b5a8648ba 100644 --- a/drivers/gpu/drm/xe/regs/xe_pmt.h +++ b/drivers/gpu/drm/xe/regs/xe_pmt.h @@ -10,7 +10,7 @@ #define BMG_PMT_BASE_OFFSET 0xDB000 #define BMG_DISCOVERY_OFFSET (SOC_BASE + BMG_PMT_BASE_OFFSET) -#define PUNIT_TELEMETRY_GUID XE_REG(BMG_DISCOVERY_OFFSET + 0x4) +#define BMG_PUNIT_TELEMETRY_GUID XE_REG(BMG_DISCOVERY_OFFSET + 0x4) #define BMG_ENERGY_STATUS_PMT_OFFSET (0x30) #define ENERGY_PKG REG_GENMASK64(31, 0) #define ENERGY_CARD REG_GENMASK64(63, 32) @@ -24,6 +24,8 @@ /* for CRI discovery and telemetry are in an indexed window */ #define CRI_PMT_OFFSET (SOC_BASE + XE_PMT_BASE_OFFSET) +#define CRI_PUNIT_TELEMETRY_GUID XE_REG(CRI_PMT_OFFSET + 0x4) + #define BMG_MODS_RESIDENCY_OFFSET (0x4D0) #define BMG_G2_RESIDENCY_OFFSET (0x530) #define BMG_G6_RESIDENCY_OFFSET (0x538) diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c index 28135f84e286..b01f1e649b51 100644 --- a/drivers/gpu/drm/xe/xe_debugfs.c +++ b/drivers/gpu/drm/xe/xe_debugfs.c @@ -101,10 +101,11 @@ static void read_residency_counter(struct xe_device *xe, struct xe_mmio *mmio, u32 offset, const char *name, struct drm_printer *p) { u64 residency = 0; + int ret; ret = xe_pmt_telem_read(xe->drm.dev, - xe_mmio_read32(mmio, PUNIT_TELEMETRY_GUID), + xe_mmio_read32(mmio, BMG_PUNIT_TELEMETRY_GUID), &residency, offset, sizeof(residency)); if (ret != sizeof(residency)) { drm_warn(&xe->drm, "%s counter failed to read, ret %d\n", name, ret); diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h index 69e052ac5a82..2a8c519e1639 100644 --- a/drivers/gpu/drm/xe/xe_device_types.h +++ b/drivers/gpu/drm/xe/xe_device_types.h @@ -473,6 +473,8 @@ struct xe_device { struct delayed_work work; /** @pmt.retry_count: late-bind probe retry */ u32 retry_count; + /** @pmt.punit_guid_cache: cache of the PUINT GUID */ + u32 punit_guid_cache; } pmt; /** @soc_remapper: SoC remapper object */ diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c index 5284cab6703d..b9740224e07f 100644 --- a/drivers/gpu/drm/xe/xe_hwmon.c +++ b/drivers/gpu/drm/xe/xe_hwmon.c @@ -519,7 +519,7 @@ xe_hwmon_energy_get(struct xe_hwmon *hwmon, int channel, long *energy) u64 pmt_val; ret = xe_pmt_telem_read(hwmon->xe->drm.dev, - xe_mmio_read32(mmio, PUNIT_TELEMETRY_GUID), + xe_mmio_read32(mmio, BMG_PUNIT_TELEMETRY_GUID), &pmt_val, BMG_ENERGY_STATUS_PMT_OFFSET, sizeof(pmt_val)); if (ret != sizeof(pmt_val)) { drm_warn(&hwmon->xe->drm, "energy read from pmt failed, ret %d\n", ret); diff --git a/drivers/gpu/drm/xe/xe_pcode.c b/drivers/gpu/drm/xe/xe_pcode.c index d502205bb72a..844d8c6face6 100644 --- a/drivers/gpu/drm/xe/xe_pcode.c +++ b/drivers/gpu/drm/xe/xe_pcode.c @@ -369,7 +369,7 @@ int xe_get_pcode_version(struct xe_device *xe, struct xe_pcode_version *version) guard(xe_pm_runtime)(xe); ret = xe_pmt_telem_read(xe->drm.dev, - xe_mmio_read32(xe_root_tile_mmio(xe), PUNIT_TELEMETRY_GUID), + xe_mmio_read32(xe_root_tile_mmio(xe), BMG_PUNIT_TELEMETRY_GUID), (u64 *)version, PUNIT_VERSION_OFFSET, sizeof(*version)); if (ret != sizeof(*version)) { xe_warn(xe, "pcode version read from PMT failed, ret %pe\n", ERR_PTR(ret)); diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c index 48cacd23b071..896dfb011baf 100644 --- a/drivers/gpu/drm/xe/xe_vsec.c +++ b/drivers/gpu/drm/xe/xe_vsec.c @@ -566,6 +566,50 @@ static void vsec_disable_late_bind_work(void *arg) xe_pm_runtime_put(xe); } +int xe_vsec_get_guid(struct xe_device *xe, u32 *guid) +{ + struct xe_mmio *mmio = xe_root_tile_mmio(xe); + int ret = 0; + + if (IS_SRIOV_VF(xe)) + return -EINVAL; + + if (!xe_pm_runtime_get_if_active(xe)) + return -ENODATA; + + mutex_lock(&xe->pmt.lock); + + if (xe->pmt.punit_guid_cache) { + *guid = xe->pmt.punit_guid_cache; + goto unlock; + } + + switch (xe->info.platform) { + case XE_BATTLEMAGE: + *guid = xe_mmio_read32(mmio, BMG_PUNIT_TELEMETRY_GUID); + break; + + case XE_CRESCENTISLAND: + xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY); + *guid = xe_mmio_read32(mmio, CRI_PUNIT_TELEMETRY_GUID); + break; + + default: + *guid = 0; + drm_err(&xe->drm, "Unsupported platform: %u\n", xe->info.platform); + ret = -EINVAL; + break; + } + + xe->pmt.punit_guid_cache = *guid; + +unlock: + mutex_unlock(&xe->pmt.lock); + xe_pm_runtime_put(xe); + + return ret; +} + /** * xe_vsec_init - Initialize resources and add intel_vsec auxiliary * interface diff --git a/drivers/gpu/drm/xe/xe_vsec.h b/drivers/gpu/drm/xe/xe_vsec.h index c4a1e2fc67d8..50187fdc1207 100644 --- a/drivers/gpu/drm/xe/xe_vsec.h +++ b/drivers/gpu/drm/xe/xe_vsec.h @@ -10,6 +10,7 @@ struct device; struct xe_device; int xe_vsec_init(struct xe_device *xe); +int xe_vsec_get_guid(struct xe_device *xe, u32 *guid); int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offset, u32 count); #endif -- 2.43.0