From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3C5B9C79F8C for ; Fri, 4 Sep 2026 18:25:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C40EE10FACF; Fri, 4 Sep 2026 18:25:11 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Op+VSkST"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id BEE6510FABD for ; Fri, 4 Sep 2026 18:25:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1788546309; x=1820082309; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=eBL5J7f89MsBBd9MqmgXrNvkJ48CQ9WlCm7J1waO8rw=; b=Op+VSkSTDIKvn2E8dGQ8ri+dKJ0X331OFSSjIJ2Zlg3FqS54EF+G6TAU P7PPg6+RyYw/F7B1/2h36y/LQ6vX7b9rFCoWYRzMEEKR5uStfjh7KJ4+P HHJhmJlslB1IEsO2/tQdgwGANVD5/aZVGIKj7yRV4h1/bPDqAjRTRSWOG a+dj8H5WTI7oAeAGo3FU9CmuPSsZWxc2FavG/bUjl7zGEcD+6GUwNCFy1 anoKNBVplkYQ33yt0soIXsSTmnXte0X9E3A2A//ucyxKRA8uIAFnC6BgO v8lWgg25PbodAXqEfBv0a3taBCWLWz19wGEOQ5mefKVHRxRMm6MnbFPYr g==; X-CSE-ConnectionGUID: pK8etuLTQbWAOBPKooKdkA== X-CSE-MsgGUID: QAzfqEtORf6WilJb3EEQdw== X-IronPort-AV: E=McAfee;i="6800,10657,11896"; a="88932225" X-IronPort-AV: E=Sophos;i="6.25,262,1779174000"; d="scan'208";a="88932225" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Sep 2026 11:25:08 -0700 X-CSE-ConnectionGUID: RynBcTkDST6VOF6KLiPSlQ== X-CSE-MsgGUID: A4NkVl3qQcGBjJGhz3lI2A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,262,1779174000"; d="scan'208";a="294992484" Received: from mjruhl-vm.amr.corp.intel.com ([10.11.186.166]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Sep 2026 11:25:08 -0700 From: "Michael J. Ruhl" To: platform-driver-x86@vger.kernel.org, intel-xe@lists.freedesktop.org, hansg@kernel.org, ilpo.jarvinen@linux.intel.com, matthew.brost@intel.com, rodrigo.vivi@intel.com, thomas.hellstrom@linux.intel.com, airlied@gmail.com, simona@ffwll.ch, david.e.box@linux.intel.com, anoop.c.vijay@intel.com, badal.nilawar@intel.com, matthew.d.roper@intel.com, james.ausmus@intel.com, karthik.poosa@intel.com Subject: [PATCH v6 09/18] drm/xe/vsec: Add DOC text for VSEC Date: Fri, 4 Sep 2026 11:24:59 -0700 Message-ID: <20260904182451.1164868-29-michael.j.ruhl@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260904182451.1164868-20-michael.j.ruhl@intel.com> References: <20260904182451.1164868-20-michael.j.ruhl@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" Add the necessary files and text to use the DOC system. Signed-off-by: Michael J. Ruhl --- Documentation/gpu/xe/index.rst | 1 + Documentation/gpu/xe/xe_vsec.rst | 14 ++++++++++++++ drivers/gpu/drm/xe/xe_vsec.c | 23 +++++++++++++++++++++++ 3 files changed, 38 insertions(+) create mode 100644 Documentation/gpu/xe/xe_vsec.rst diff --git a/Documentation/gpu/xe/index.rst b/Documentation/gpu/xe/index.rst index 0247a255f7e6..89f013418cf5 100644 --- a/Documentation/gpu/xe/index.rst +++ b/Documentation/gpu/xe/index.rst @@ -36,3 +36,4 @@ The display, or :ref:`drm-kms`, support for drm/xe is provided by xe_configfs xe_gt_stats xe_sigid + xe_vsec diff --git a/Documentation/gpu/xe/xe_vsec.rst b/Documentation/gpu/xe/xe_vsec.rst new file mode 100644 index 000000000000..1a87548489ea --- /dev/null +++ b/Documentation/gpu/xe/xe_vsec.rst @@ -0,0 +1,14 @@ +.. SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +===== +VSEC +===== + +.. kernel-doc:: drivers/gpu/drm/xe/xe_vsec.c + :doc: VSEC + +Internal API +============ + +.. kernel-doc:: drivers/gpu/drm/xe/xe_vsec.c + :internal: diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c index 468a221378fa..c0252f5b508f 100644 --- a/drivers/gpu/drm/xe/xe_vsec.c +++ b/drivers/gpu/drm/xe/xe_vsec.c @@ -19,6 +19,17 @@ #include "regs/xe_pmt.h" +/** + * DOC: VSEC + * + * Some GPUs support the PMT feature. For those that do, this API provides + * probe, discovery and usage (control and access) for GPUs that have PMT. + * + * PMT is usually accessed through a PCI function. However, that is not always + * available, so the PMT intel_vsec_register() function can be used to setup up + * PMT usage. + */ + /* PMT GUID value for BMG devices. NOTE: this is NOT a PCI id */ #define BMG_DEVICE_ID 0xE2F8 @@ -140,6 +151,18 @@ static int xe_guid_decode(u32 guid, int *index, u32 *offset) return 0; } +/** + * xe_pmt_telem_read - Given a device and a PMT GUID, read data into a buffer + * @dev: valid Xe device + * @guid: PMT GUID (from the PMT discovery struct) + * @data: buffer to place data in + * @user_offset: a user offset relative to the beginning of the data to read + * @count: bytes to read + * + * Return: + * * -EINVAL for VF and PMT WATCHER requests + * * count number of bytes read on success + */ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offset, u32 count) { -- 2.43.0