[PATCH 2/2] drm/xe: Poll GT for C6 before D3

[Vinay Belgaumkar <vinay.belgaumkar@intel.com>]

Check if GTs are in C6 before transitioning to D3. PM subsystem can
retry if this is not the case. This ensures some component is not
accessing the GT when D3 state is forced.

Cc: Badal Nilawar <badal.nilawar@intel.com>
Cc: Rodrigo Viv <rodrigo.vivi@intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
---
 drivers/gpu/drm/xe/xe_pci.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 187a39894513..62af84c041cf 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -7,6 +7,7 @@
 
 #include <kunit/static_stub.h>
 #include <linux/device/driver.h>
+#include <linux/iopoll.h>
 #include <linux/module.h>
 #include <linux/pci.h>
 #include <linux/pm_runtime.h>
@@ -1378,10 +1379,25 @@ static int xe_pci_resume(struct device *dev)
 	return 0;
 }
 
+static int wait_for_gt_c6_state(struct xe_gt *gt,
+				int timeout_ms)
+{
+	struct xe_guc_pc *pc = &gt->uc.guc.pc;
+	enum xe_gt_idle_state state;
+
+	return poll_timeout_us(state = gt->gtidle.idle_status(pc),
+			       state == GT_IDLE_C6,
+			       20,
+			       timeout_ms * USEC_PER_MSEC,
+			       false);
+}
+
 static int xe_pci_runtime_suspend(struct device *dev)
 {
 	struct pci_dev *pdev = to_pci_dev(dev);
 	struct xe_device *xe = pdev_to_xe_device(pdev);
+	struct xe_gt *gt;
+	u8 id;
 	int err;
 
 	/*
@@ -1397,6 +1413,14 @@ static int xe_pci_runtime_suspend(struct device *dev)
 	if (err)
 		return err;
 
+	/* Poll and retry if we don't enter C6 on any GT */
+	for_each_gt(gt, xe, id) {
+		if (wait_for_gt_c6_state(gt, 200)) {
+			xe_gt_info(gt, "GT is not in C6\n");
+			return -EAGAIN;
+		}
+	}
+
 	pci_save_state(pdev);
 
 	if (xe->d3cold.allowed) {
-- 
2.38.1