From: sashiko-bot@kernel.org
To: "Michael J. Ruhl" <michael.j.ruhl@intel.com>
Cc: intel-xe@lists.freedesktop.org
Subject: Re: [PATCH v9 09/20] drm/xe/vsec: Add DOC text for VSEC
Date: Wed, 16 Sep 2026 20:29:43 +0000 [thread overview]
Message-ID: <20260916202943.6C9A41F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260916201139.2374531-31-michael.j.ruhl@intel.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Low] drm/xe: documentation mismatch in xe_pmt_telem_read() returns
- [Low] drm/xe: typo 'setup up' in VSEC DOC text
--
commit 736841e08f59ea271b755582813f79005c246879
Author: Michael J. Ruhl <michael.j.ruhl@intel.com>
drm/xe/vsec: Add DOC text for VSEC
Add the necessary files and text to use the DOC system.
> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> index 1cb9a78ee0efd..ca5d02dce8189 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c
> @@ -19,6 +19,17 @@
>
> #include "regs/xe_pmt.h"
>
> +/**
> + * DOC: VSEC
> + *
> + * Some GPUs support the PMT feature. For those that do, this API provides
> + * probe, discovery and usage (control and access) for GPUs that have PMT.
> + *
> + * PMT is usually accessed through a PCI function. However, that is not always
> + * available, so the PMT intel_vsec_register() function can be used to setup up
^^^^^^^^
[Severity: Low]
This isn't a bug, but there is a typo (setup up) in the newly added VSEC
documentation header.
> + * PMT usage.
> + */
> +
[ ... ]
> @@ -140,6 +151,18 @@ static int xe_guid_decode(u32 guid, int *index, u32 *offset)
> return 0;
> }
>
> +/**
> + * xe_pmt_telem_read - Given a device and a PMT GUID, read data into a buffer
> + * @dev: valid Xe device
> + * @guid: PMT GUID (from the PMT discovery struct)
> + * @data: buffer to place data in
> + * @user_offset: a user offset relative to the beginning of the data to read
> + * @count: bytes to read
> + *
> + * Return:
> + * * -EINVAL for VF and PMT WATCHER requests
> + * * count number of bytes read on success
> + */
[Severity: Low]
Is this documentation entirely accurate?
It claims to return -EINVAL for VF requests, but xe_pmt_telem_read() actually
uses an assertion (xe_assert) instead.
Additionally, the documentation completely omits the -ENODEV (from invalid
device IDs) and -ENODATA (from xe_pm_runtime_get_if_active failures) return
values.
> int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offset,
> u32 count)
> {
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260916201139.2374531-22-michael.j.ruhl@intel.com?part=9
next prev parent reply other threads:[~2026-09-16 20:29 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-16 20:11 [PATCH v9 00/20] Crescent Island PMT support Michael J. Ruhl
2026-09-16 20:11 ` [PATCH v9 01/20] platform/x86/intel/pmt: complete pcidev to device update Michael J. Ruhl
2026-09-16 20:11 ` [PATCH v9 02/20] platform/x86/intel/pmt: refactor rmw with a return value Michael J. Ruhl
2026-09-16 20:11 ` [PATCH v9 03/20] platform/x86/intel/pmt: refactor rc " Michael J. Ruhl
2026-09-16 20:20 ` sashiko-bot
2026-09-17 9:55 ` Ilpo Järvinen
2026-09-16 20:11 ` [PATCH v9 04/20] platform/x86/intel/pmt: Add register access callbacks Michael J. Ruhl
2026-09-16 20:11 ` [PATCH v9 05/20] platform/x86/intel/pmt: Do not remap when using callbacks Michael J. Ruhl
2026-09-16 20:11 ` [PATCH v9 06/20] drm/xe/vsec: Do not register BMG PMT for VF Michael J. Ruhl
2026-09-16 20:11 ` [PATCH v9 07/20] drm/xe/vsec: Correct locking order Michael J. Ruhl
2026-09-16 20:11 ` [PATCH v9 08/20] drm/xe/vsec: Use correct pm state get Michael J. Ruhl
2026-09-16 20:11 ` [PATCH v9 09/20] drm/xe/vsec: Add DOC text for VSEC Michael J. Ruhl
2026-09-16 20:29 ` sashiko-bot [this message]
2026-09-17 9:56 ` Ilpo Järvinen
2026-09-17 9:57 ` Ilpo Järvinen
2026-09-17 12:55 ` Ruhl, Michael J
2026-09-16 20:11 ` [PATCH v9 10/20] drm/xe/vsec: Support possible hotplug exit Michael J. Ruhl
2026-09-16 20:21 ` sashiko-bot
2026-09-16 20:11 ` [PATCH v9 11/20] drm/xe/vsec: Refactor BattleMage PMT defines Michael J. Ruhl
2026-09-16 20:11 ` [PATCH v9 12/20] drm/xe/vsec: Update VSEC probe order Michael J. Ruhl
2026-09-16 20:11 ` [PATCH v9 13/20] drm/xe/vsec: Add base_offset to allow for more flexibilty Michael J. Ruhl
2026-09-16 20:11 ` [PATCH v9 14/20] drm/xe/vsec: Support Crescent Island PMT Michael J. Ruhl
2026-09-16 20:11 ` [PATCH v9 15/20] drm/xe/vsec: Crescent Island PMT decode Michael J. Ruhl
2026-09-16 20:11 ` [PATCH v9 16/20] drm/xe/vsec: Crescent Island PMT callbacks Michael J. Ruhl
2026-09-16 20:11 ` [PATCH v9 17/20] drm/xe/vsec: Support late bind fw information Michael J. Ruhl
2026-09-16 20:29 ` sashiko-bot
2026-09-17 12:30 ` Ruhl, Michael J
2026-09-16 20:11 ` [PATCH v9 18/20] drm/xe/vsec: Add PMT GUID internal access Michael J. Ruhl
2026-09-16 20:11 ` [PATCH v9 19/20] drm/xe/vsec: Update PMT " Michael J. Ruhl
2026-09-16 20:11 ` [PATCH v9 20/20] drm/xe/vsec: Refactor platform check Michael J. Ruhl
2026-09-16 20:44 ` ✗ CI.checkpatch: warning for Crescent Island PMT support (rev11) Patchwork
2026-09-16 20:46 ` ✓ CI.KUnit: success " Patchwork
2026-09-16 22:00 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-09-17 1:39 ` ✗ Xe.CI.FULL: " Patchwork
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