Re: [PATCH v9 07/10] drm/xe/pf: Align VF GGTT allocations to PAGE_SIZE

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] xe: mismatch between VF GGTT base alignment and VRAM BO 64K alignment
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commit e8215b94fc1fb931f84ceb50cd8a30a2324322f3
Author: Satyanarayana K V P <satyanarayana.k.v.p@intel.com>
drm/xe/pf: Align VF GGTT allocations to PAGE_SIZE

This patch modifies the Physical Function to align Virtual Function GGTT
ranges to the host CPU page size instead of 64K VRAM alignment. This allows
for finer-grained GGTT partitioning without imposing VRAM alignment
constraints on the GGTT base address.

> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> index 6947aeed458ed..a2083d3b2eeeb 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> @@ -441,9 +441,7 @@ static int pf_refresh_vf_cfg(struct xe_gt *gt, unsigned int vfid)
>  
>  static u64 pf_get_ggtt_alignment(struct xe_gt *gt)
>  {
> -	struct xe_device *xe = gt_to_xe(gt);
> -
> -	return IS_DGFX(xe) && xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
> +	return XE_PAGE_SIZE;

[Severity: High]
Does dropping the 64K alignment requirement for the GGTT base break the
absolute alignment for VRAM BOs in the VF's GGTT?

When the PF allocates the VF's GGTT base at a 4K boundary that is not
64K-aligned, the VF driver will still allocate a VRAM BO requesting 64K
alignment from the relative allocator:

drivers/gpu/drm/xe/xe_ggtt.c:__xe_ggtt_insert_bo_at()
        if (xe_bo_is_vram(bo) && ggtt->flags & XE_GGTT_FLAGS_64K)
                alignment = SZ_64K;

Because the relative allocator is initialized with a base of 0, the node's
relative offset is 64K-aligned. However, the absolute address
(node->start + ggtt->start) will inherit the unaligned 4K base, defeating
the explicit 64K alignment required by the hardware on DGPUs requiring
64K VRAM pages.

Could this cause hardware page walker faults, or silently break the
alignment of existing mappings if a new ggtt->start during VF migration
has a different alignment modulo 64K?

>  }
>  
>  static u64 pf_get_min_spare_ggtt(struct xe_gt *gt)

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Sashiko AI review · https://sashiko.dev/#/patchset/20260918100533.567225-12-satyanarayana.k.v.p@intel.com?part=7