From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: suraj.kandpal@intel.com, Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Subject: [PATCH] drm/i915/display: Update the CMN_SDP_TL in fastset path
Date: Wed, 23 Sep 2026 19:03:07 +0530 [thread overview]
Message-ID: <20260923133307.323439-1-ankit.k.nautiyal@intel.com> (raw)
Commit bfa597238073 ("drm/i915/dip: Enable Common SDP Transmission line")
enabled the CMN_SDP_TL for the modeset path, but missed to add it to the
fastset path.
Since dip.cmn_sdp_tl is already skipped from the strict pipe-config
comparison during fastsets, it was always intended to get updated
without full modeset, but the update to the register was missed.
During a fastset, if CMN_SDP_TL changes, update the register
similar to the EMP_AS_SDP_TL, which gets updated in
intel_vrr_set_transcoder_timings().
Fixes: bfa597238073 ("drm/i915/dip: Enable Common SDP Transmission line")
Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e3e0d2f8faef..01604c4e8615 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -69,6 +69,7 @@
#include "intel_cx0_phy.h"
#include "intel_ddi.h"
#include "intel_de.h"
+#include "intel_dip.h"
#include "intel_display_driver.h"
#include "intel_display_power.h"
#include "intel_display_regs.h"
@@ -999,6 +1000,12 @@ static bool cmrr_params_changed(const struct intel_crtc_state *old_crtc_state,
old_crtc_state->vrr.cmrr.cmrr_n != new_crtc_state->vrr.cmrr.cmrr_n;
}
+static bool cmn_sdp_changed(const struct intel_crtc_state *old_crtc_state,
+ const struct intel_crtc_state *new_crtc_state)
+{
+ return old_crtc_state->dip.cmn_sdp_tl != new_crtc_state->dip.cmn_sdp_tl;
+}
+
static bool intel_crtc_vrr_enabling(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
@@ -6924,6 +6931,9 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state,
if (vrr_params_changed(old_crtc_state, new_crtc_state) ||
cmrr_params_changed(old_crtc_state, new_crtc_state))
intel_vrr_set_transcoder_timings(new_crtc_state);
+
+ if (cmn_sdp_changed(old_crtc_state, new_crtc_state))
+ intel_dip_cmn_sdp_transmission_line_enable(new_crtc_state);
}
intel_fbc_update(state, crtc);
--
2.50.1
next reply other threads:[~2026-09-23 13:49 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-23 13:33 Ankit Nautiyal [this message]
2026-09-23 13:58 ` ✓ CI.KUnit: success for drm/i915/display: Update the CMN_SDP_TL in fastset path Patchwork
2026-09-23 14:00 ` [PATCH] " sashiko-bot
2026-09-23 15:23 ` ✓ Xe.CI.BAT: success for " Patchwork
2026-09-24 2:19 ` [PATCH v2] " Ankit Nautiyal
2026-09-24 3:40 ` Kandpal, Suraj
2026-09-24 2:44 ` ✓ CI.KUnit: success for drm/i915/display: Update the CMN_SDP_TL in fastset path (rev2) Patchwork
2026-09-24 3:24 ` ✓ Xe.CI.BAT: " Patchwork
2026-09-24 4:01 ` ✗ Xe.CI.FULL: failure for drm/i915/display: Update the CMN_SDP_TL in fastset path Patchwork
2026-09-24 17:39 ` ✗ Xe.CI.FULL: failure for drm/i915/display: Update the CMN_SDP_TL in fastset path (rev2) Patchwork
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