From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4B7B9C9833E for ; Mon, 28 Sep 2026 09:24:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F252410E900; Mon, 28 Sep 2026 09:24:08 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Uf1GUOen"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2B94A10E840 for ; Mon, 28 Sep 2026 09:24:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1790587446; x=1822123446; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YNwWpVbC9jth4Kokey+HrYdvzexzGTw3Rbk54pd/v/s=; b=Uf1GUOen3r1deVLVVB289PVa1YOR2iI5WQoaZM8kxPANyU9UOOLvTQ3+ rzd2Ho/YxlxMDJy368PQ85qT7lyj3bWm+7QfFE2IZckc3LbrJEMzoAIEM VT0nZgs6C9SOMTwltlqYLpmG4ifc+51LDuCDzoAROZOqO2prxizsVkjdY MYj50o2zpD6foxuSn9t/iZq+fpF93u8kHVO3zVAmVpzGQTmbKfluA/HWG KPZYNfXuToiqn69Qhl+NjzYqhbhDsuBNEE7jTfi3r+J+f8Bnc6HQGQAyp EpKW6Icw0JQ3Xx5yzaWpcczNFbfvYV/ZeNW/5yODwbl0z2ljzXc/5kZaE g==; X-CSE-ConnectionGUID: IH0TYzOOQD2qo33sZYJqKA== X-CSE-MsgGUID: uImxVa5sQ1Kd/n7xWVr0aw== X-IronPort-AV: E=McAfee;i="6800,10657,11918"; a="78845457" X-IronPort-AV: E=Sophos;i="6.27,128,1787036400"; d="scan'208";a="78845457" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2026 02:22:19 -0700 X-CSE-ConnectionGUID: weZOcuaBSv65vyq4lw9bjQ== X-CSE-MsgGUID: kGmJmnnDSIaTe63ujGoV5w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.27,128,1787036400"; d="scan'208";a="283078010" Received: from dbhadane-mobl1.iind.intel.com ([10.190.239.58]) by fmviesa005.fm.intel.com with ESMTP; 28 Sep 2026 02:21:21 -0700 From: Dnyaneshwar Bhadane To: intel-xe@lists.freedesktop.org Cc: michal.wajdeczko@intel.com, mallesh.koujalagi@intel.com, Dnyaneshwar Bhadane Subject: [PATCH v4 03/12] drm/xe/hwmon: Report errors using structured xe_log API Date: Mon, 28 Sep 2026 14:51:05 +0530 Message-ID: <20260928092114.1610203-4-dnyaneshwar.bhadane@intel.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260928092114.1610203-1-dnyaneshwar.bhadane@intel.com> References: <20260928092114.1610203-1-dnyaneshwar.bhadane@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" Replace drm_err() calls with xe_log_err() using the HWMON component tag to enable structured error reporting with SIGID for hardware monitor failures: Signed-off-by: Dnyaneshwar Bhadane --- drivers/gpu/drm/xe/xe_hwmon.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c index 5edeac961ec3..dbeb32d748e6 100644 --- a/drivers/gpu/drm/xe/xe_hwmon.c +++ b/drivers/gpu/drm/xe/xe_hwmon.c @@ -15,6 +15,7 @@ #include "regs/xe_pcode_regs.h" #include "xe_device.h" #include "xe_hwmon.h" +#include "xe_log.h" #include "xe_mmio.h" #include "xe_pcode.h" #include "xe_pcode_api.h" @@ -558,9 +559,9 @@ xe_hwmon_power_max_interval_show(struct device *dev, struct device_attribute *at if (hwmon->xe->info.has_mbx_power_limits) { ret = xe_hwmon_pcode_read_power_limit(hwmon, power_attr, channel, ®_val); if (ret) { - drm_err(&hwmon->xe->drm, - "power interval read fail, ch %d, attr %d, val 0x%08x, ret %d\n", - channel, power_attr, reg_val, ret); + xe_log_err(hwmon->xe, HWMON, ret, + "power interval read fail, ch %d, attr %d, val 0x%08x\n", + channel, power_attr, reg_val); reg_val = 0; } } else { @@ -1594,7 +1595,8 @@ int xe_hwmon_register(struct xe_device *xe) &hwmon_chip_info, hwmon_groups); if (IS_ERR(hwmon->hwmon_dev)) { - drm_err(&xe->drm, "Failed to register xe hwmon (%pe)\n", hwmon->hwmon_dev); + xe_log_err(xe, HWMON, PTR_ERR(hwmon->hwmon_dev), + "Failed to register xe hwmon\n"); xe->hwmon = NULL; return PTR_ERR(hwmon->hwmon_dev); } -- 2.54.0