From: "Piórkowski, Piotr" <piotr.piorkowski@intel.com>
To: <intel-xe@lists.freedesktop.org>
Cc: "Piotr Piórkowski" <piotr.piorkowski@intel.com>
Subject: [PATCH v1 7/7] drm/xe/kunit: Test VRAM pool allocation
Date: Fri, 2 Oct 2026 12:40:18 +0200 [thread overview]
Message-ID: <20261002104018.3648425-8-piotr.piorkowski@intel.com> (raw)
In-Reply-To: <20261002104018.3648425-1-piotr.piorkowski@intel.com>
From: Piotr Piórkowski <piotr.piorkowski@intel.com>
Exercise default pool setup, pool splitting and partition limits, and
TTM placement range narrowing.
Assisted-by: Claude Opus 5.5
Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
---
drivers/gpu/drm/xe/tests/xe_vram.c | 155 +++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_vram.c | 4 +
2 files changed, 159 insertions(+)
create mode 100644 drivers/gpu/drm/xe/tests/xe_vram.c
diff --git a/drivers/gpu/drm/xe/tests/xe_vram.c b/drivers/gpu/drm/xe/tests/xe_vram.c
new file mode 100644
index 0000000000000..043c40b6bb0a9
--- /dev/null
+++ b/drivers/gpu/drm/xe/tests/xe_vram.c
@@ -0,0 +1,155 @@
+// SPDX-License-Identifier: GPL-2.0 AND MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include <kunit/test.h>
+
+#include "xe_kunit_helpers.h"
+#include "xe_pci_test.h"
+
+static int xe_vram_test_init(struct kunit *test)
+{
+ struct xe_pci_fake_data fake = {
+ .platform = XE_BATTLEMAGE,
+ .graphics_verx100 = 2001,
+ };
+
+ test->priv = &fake;
+ xe_kunit_helper_xe_device_test_init(test);
+
+ return 0;
+}
+
+static struct xe_vram_pool *tile_pool(struct kunit *test, struct xe_device *xe)
+{
+ struct xe_vram_region *vram = xe_vram_region_alloc_tile(xe, 0);
+ struct xe_vram_pool *pool;
+
+ KUNIT_ASSERT_NOT_NULL(test, vram);
+ vram->usable_size = SZ_64M;
+ vram->io_size = SZ_64M;
+ pool = xe_vram_region_default_pool(vram);
+ pool->size = SZ_64M;
+ pool->purpose = XE_VRAM_POOL_GENERAL;
+ vram->num_partitions = 1;
+
+ return pool;
+}
+
+static void kernel_pool_defaults_to_general(struct kunit *test)
+{
+ struct xe_device *xe = test->priv;
+ struct xe_vram_pool *general = tile_pool(test, xe);
+ struct xe_tile *tile = &xe->tiles[0];
+
+ tile->mem.vram = general;
+ tile->mem.kernel_vram = NULL;
+
+ KUNIT_ASSERT_EQ(test, xe_vram_tile_alloc_kernel(tile), 0);
+ KUNIT_EXPECT_PTR_EQ(test, tile->mem.kernel_vram, tile->mem.vram);
+}
+
+static void partition_carve(struct kunit *test)
+{
+ struct xe_device *xe = test->priv;
+ struct xe_vram_pool *general = tile_pool(test, xe);
+ struct xe_vram_region *vram = general->region;
+ struct xe_vram_pool *kernel0 = &vram->partitions[1];
+
+ KUNIT_EXPECT_PTR_EQ(test, xe_vram_pool_create(vram, XE_VRAM_POOL_KERNEL, 0), NULL);
+ KUNIT_EXPECT_PTR_EQ(test, xe_vram_pool_create(vram, XE_VRAM_POOL_KERNEL, SZ_1M), NULL);
+ KUNIT_EXPECT_PTR_EQ(test, xe_vram_pool_create(vram, XE_VRAM_POOL_KERNEL, SZ_64M), NULL);
+ KUNIT_EXPECT_EQ(test, vram->num_partitions, 1u);
+
+ KUNIT_ASSERT_NOT_NULL(test, xe_vram_pool_create(vram, XE_VRAM_POOL_KERNEL, SZ_8M));
+ KUNIT_ASSERT_EQ(test, vram->num_partitions, 2u);
+ KUNIT_EXPECT_EQ(test, kernel0->purpose, XE_VRAM_POOL_KERNEL);
+ KUNIT_EXPECT_EQ(test, kernel0->offset, 0ull);
+ KUNIT_EXPECT_EQ(test, kernel0->size, (u64)SZ_8M);
+ KUNIT_EXPECT_EQ(test, general->purpose, XE_VRAM_POOL_GENERAL);
+ KUNIT_EXPECT_EQ(test, general->offset, (u64)SZ_8M);
+ KUNIT_EXPECT_EQ(test, general->size, (u64)(SZ_64M - SZ_8M));
+
+ /* Both partitions keep sharing the region, its manager and its placement */
+ KUNIT_EXPECT_PTR_EQ(test, kernel0->region, vram);
+ KUNIT_EXPECT_PTR_EQ(test, general->region, vram);
+ KUNIT_EXPECT_EQ(test, vram->placement, (u32)XE_PL_VRAM0);
+
+ KUNIT_EXPECT_EQ(test, xe_vram_pool_usable_size(kernel0), (resource_size_t)SZ_8M);
+ KUNIT_EXPECT_EQ(test, xe_vram_pool_usable_size(general),
+ (resource_size_t)(SZ_64M - SZ_8M));
+}
+
+static void partition_limit(struct kunit *test)
+{
+ struct xe_device *xe = test->priv;
+ struct xe_vram_pool *general = tile_pool(test, xe);
+ struct xe_vram_region *vram = general->region;
+ struct xe_vram_pool *pool;
+ unsigned int i;
+
+ for (i = 1; i < XE_VRAM_MAX_PARTITIONS; i++) {
+ pool = xe_vram_pool_create(vram, XE_VRAM_POOL_KERNEL, SZ_2M);
+ KUNIT_ASSERT_NOT_NULL(test, pool);
+ }
+
+ KUNIT_EXPECT_EQ(test, vram->num_partitions, XE_VRAM_MAX_PARTITIONS);
+ KUNIT_EXPECT_PTR_EQ(test,
+ xe_vram_pool_create(vram, XE_VRAM_POOL_KERNEL, SZ_2M),
+ NULL);
+}
+
+static void pool_place(struct kunit *test)
+{
+ struct xe_device *xe = test->priv;
+ struct xe_vram_pool *general = tile_pool(test, xe);
+ struct xe_vram_region *vram = general->region;
+ struct xe_vram_pool *kernel = &vram->partitions[1];
+ struct ttm_place place = {};
+
+ /* A pool spanning the region only resolves to its placement */
+ xe_vram_pool_place(general, &place);
+ KUNIT_EXPECT_EQ(test, place.mem_type, (u32)XE_PL_VRAM0);
+ KUNIT_EXPECT_EQ(test, place.fpfn, 0u);
+ KUNIT_EXPECT_EQ(test, place.lpfn, 0u);
+
+ KUNIT_ASSERT_NOT_NULL(test, xe_vram_pool_create(vram, XE_VRAM_POOL_KERNEL, SZ_8M));
+
+ place = (struct ttm_place) {};
+ xe_vram_pool_place(kernel, &place);
+ KUNIT_EXPECT_EQ(test, place.fpfn, 0u);
+ KUNIT_EXPECT_EQ(test, place.lpfn, SZ_8M >> PAGE_SHIFT);
+
+ place = (struct ttm_place) {};
+ xe_vram_pool_place(general, &place);
+ KUNIT_EXPECT_EQ(test, place.fpfn, SZ_8M >> PAGE_SHIFT);
+ KUNIT_EXPECT_EQ(test, place.lpfn, SZ_64M >> PAGE_SHIFT);
+
+ /* A caller supplied range, e.g. the CPU visible one, is only narrowed */
+ place = (struct ttm_place) { .lpfn = SZ_4M >> PAGE_SHIFT };
+ xe_vram_pool_place(kernel, &place);
+ KUNIT_EXPECT_EQ(test, place.fpfn, 0u);
+ KUNIT_EXPECT_EQ(test, place.lpfn, SZ_4M >> PAGE_SHIFT);
+
+ place = (struct ttm_place) { .lpfn = SZ_32M >> PAGE_SHIFT };
+ xe_vram_pool_place(general, &place);
+ KUNIT_EXPECT_EQ(test, place.fpfn, SZ_8M >> PAGE_SHIFT);
+ KUNIT_EXPECT_EQ(test, place.lpfn, SZ_32M >> PAGE_SHIFT);
+}
+
+static struct kunit_case xe_vram_tests[] = {
+ KUNIT_CASE(kernel_pool_defaults_to_general),
+ KUNIT_CASE(partition_carve),
+ KUNIT_CASE(partition_limit),
+ KUNIT_CASE(pool_place),
+ {}
+};
+
+static struct kunit_suite xe_vram_test_suite = {
+ .name = "xe_vram",
+ .test_cases = xe_vram_tests,
+ .init = xe_vram_test_init,
+};
+
+kunit_test_suite(xe_vram_test_suite);
diff --git a/drivers/gpu/drm/xe/xe_vram.c b/drivers/gpu/drm/xe/xe_vram.c
index 1df4f2514afc0..cfc1dc77b2cb4 100644
--- a/drivers/gpu/drm/xe/xe_vram.c
+++ b/drivers/gpu/drm/xe/xe_vram.c
@@ -639,6 +639,10 @@ resource_size_t xe_vram_region_actual_physical_size(const struct xe_vram_region
}
EXPORT_SYMBOL_IF_KUNIT(xe_vram_region_actual_physical_size);
+#if IS_ENABLED(CONFIG_DRM_XE_KUNIT_TEST)
+#include "tests/xe_vram.c"
+#endif
+
#if IS_ENABLED(CONFIG_DRM_XE_DEBUG_MEM)
static void memtest_bo_cleanup(void *arg)
{
--
2.34.1
next prev parent reply other threads:[~2026-10-02 10:41 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-02 10:40 [PATCH v1 0/7] Introduce purpose-specific VRAM pools Piórkowski, Piotr
2026-10-02 10:40 ` [PATCH v1 1/7] drm/xe: Define partitioned VRAM manager types Piórkowski, Piotr
2026-10-02 10:40 ` [PATCH v1 2/7] drm/xe: Define VRAM regions and pools Piórkowski, Piotr
2026-10-02 10:40 ` [PATCH v1 3/7] drm/xe/vram: Make VRAM pools the allocation handle Piórkowski, Piotr
2026-10-02 10:53 ` sashiko-bot
2026-10-02 10:40 ` [PATCH v1 4/7] drm/xe/ttm: Back each VRAM pool with its own buddy allocator Piórkowski, Piotr
2026-10-02 10:40 ` [PATCH v1 5/7] drm/xe/vram: Allow splitting a region into pools Piórkowski, Piotr
2026-10-02 10:40 ` [PATCH v1 6/7] drm/xe/kunit: Test partitioned VRAM manager Piórkowski, Piotr
2026-10-02 10:40 ` Piórkowski, Piotr [this message]
2026-10-02 10:47 ` ✗ CI.checkpatch: warning for Introduce purpose-specific VRAM pools Patchwork
2026-10-02 10:49 ` ✓ CI.KUnit: success " Patchwork
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