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From: Suraj Kandpal <suraj.kandpal@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: mitulkumar.ajitkumar.golani@intel.com,
	Suraj Kandpal <suraj.kandpal@intel.com>
Subject: [PATCH v7 03/13] drm/i915/display_wa: Add support for Wa_14014191401
Date: Thu, 22 Oct 2026 08:52:37 +0530	[thread overview]
Message-ID: <20261022032247.1378809-4-suraj.kandpal@intel.com> (raw)
In-Reply-To: <20261022032247.1378809-1-suraj.kandpal@intel.com>

The DG2 transcoder timing generator DDA only supports a Link M/N ratio
of up to 4. The Link M/N ratio limit uses a bare platform check for it.

Add Wa_14014191401 for DG2 and use it for the limit instead.

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_wa.c | 2 ++
 drivers/gpu/drm/i915/display/intel_display_wa.h | 1 +
 drivers/gpu/drm/i915/display/intel_dp.c         | 3 ++-
 3 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index 2e3ff4861ef4..91395076e903 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -94,6 +94,8 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
 			IS_DISPLAY_STEP(display, STEP_A0, STEP_A2);
 	case INTEL_DISPLAY_WA_14014143976:
 		return IS_DISPLAY_STEP(display, STEP_E0, STEP_FOREVER);
+	case INTEL_DISPLAY_WA_14014191401:
+		return display->platform.dg2;
 	case INTEL_DISPLAY_WA_14016740474:
 		return IS_DISPLAY_VERx100_STEP(display, 1400, STEP_A0, STEP_C0);
 	case INTEL_DISPLAY_WA_14020863754:
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index b707147a7587..f41e58d1d6e7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -31,6 +31,7 @@ enum intel_display_wa {
 	INTEL_DISPLAY_WA_14011508470,
 	INTEL_DISPLAY_WA_14011765242,
 	INTEL_DISPLAY_WA_14014143976,
+	INTEL_DISPLAY_WA_14014191401,
 	INTEL_DISPLAY_WA_14016740474,
 	INTEL_DISPLAY_WA_14020863754,
 	INTEL_DISPLAY_WA_14025769978,
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 7ceb7c02b597..f3a79ae49b18 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -70,6 +70,7 @@
 #include "intel_display_regs.h"
 #include "intel_display_rpm.h"
 #include "intel_display_types.h"
+#include "intel_display_wa.h"
 #include "intel_dp.h"
 #include "intel_dp_aux.h"
 #include "intel_dp_hdcp.h"
@@ -1271,7 +1272,7 @@ bool intel_dp_has_dsc(const struct intel_connector *connector)
 static int
 intel_dp_get_max_m_n_ratio(struct intel_display *display)
 {
-	if (display->platform.dg2)
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_14014191401))
 		return 4;
 
 	return 10;
-- 
2.34.1


  parent reply	other threads:[~2026-10-22  3:23 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-22  3:22 [PATCH v7 00/13] Implement Wa_14021768792 to bypass m_n ratio limit Suraj Kandpal
2026-10-22  3:22 ` [PATCH v7 01/13] drm/i915/display: Add helper to compute link M/N ratio for reuse Suraj Kandpal
2026-10-22  3:22 ` [PATCH v7 02/13] drm/i915/dp: Limit M/N ratio for DP Suraj Kandpal
2026-10-22  3:34   ` sashiko-bot
2026-10-22 16:29   ` Golani, Mitulkumar Ajitkumar
2026-10-22  3:22 ` Suraj Kandpal [this message]
2026-10-22  3:22 ` [PATCH v7 04/13] drm/i915/dp_mst: Limit M/N ratio for MST Suraj Kandpal
2026-10-22  3:43   ` sashiko-bot
2026-10-22 16:42   ` Golani, Mitulkumar Ajitkumar
2026-10-22  3:22 ` [PATCH v7 05/13] drm/i915/dp: Add M/N ratio check for DP link config Suraj Kandpal
2026-10-22  3:22 ` [PATCH v7 06/13] drm/i915/display: Add bits for link_n_extended for DISPLAY >= 14 Suraj Kandpal
2026-10-22  3:22 ` [PATCH v7 07/13] drm/i915/display_wa: Add support for Wa_14021768792 Suraj Kandpal
2026-10-22  3:22 ` [PATCH v7 08/13] drm/i915/display: Add bits for Wa_14021768792 for linkm/n ratio > 10 Suraj Kandpal
2026-10-22 17:32   ` Golani, Mitulkumar Ajitkumar
2026-10-22 17:42     ` Golani, Mitulkumar Ajitkumar
2026-10-23  3:39       ` Kandpal, Suraj
2026-10-22  3:22 ` [PATCH v7 09/13] drm/i915/display: Compare bypass_m_n_ratio_limit in the state checker Suraj Kandpal
2026-10-22  3:22 ` [PATCH v7 10/13] drm/i915/display: Dump bypass_m_n_ratio_limit in the crtc state dump Suraj Kandpal
2026-10-22  7:38   ` Golani, Mitulkumar Ajitkumar
2026-10-22  3:22 ` [PATCH v7 11/13] drm/i915/display: Implement Wa_14021768792 for BMG DP for link_m/n ratio > 10 Suraj Kandpal
2026-10-22  3:22 ` [PATCH v7 12/13] drm/i915/dp: Extend intel_dp_can_support_m_n() for BMG M/N bypass Suraj Kandpal
2026-10-22 16:13   ` Golani, Mitulkumar Ajitkumar
2026-10-22 17:05     ` Kandpal, Suraj
2026-10-22  3:22 ` [PATCH v7 13/13] drm/i915/dp: Bump the max Link M/N ratio to 22 for DISPLAY_VER >= 35 Suraj Kandpal
2026-10-22 14:08   ` Golani, Mitulkumar Ajitkumar
2026-10-22  3:32 ` ✓ CI.KUnit: success for Implement Wa_14021768792 to bypass m_n ratio limit (rev11) Patchwork
2026-10-22  4:10 ` ✓ Xe.CI.BAT: " Patchwork
2026-10-22  7:39 ` ✗ Xe.CI.FULL: failure " Patchwork

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