From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 946F5606A31A for ; Fri, 23 Oct 2026 06:08:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key, unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=ZLFc2YDj Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 51A5310E5B3; Fri, 23 Oct 2026 06:08:48 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id A253A10E529 for ; Fri, 23 Oct 2026 06:08:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1792735711; x=1824271711; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=d2xJrv7hDtfUtZeglCD6phobZx4D8lEVjYxVgfHBe5s=; b=ZLFc2YDjWRCG+n4N0O8AYpykPxxZXsNrUWf8eG2kSp4tqP4eORQwl7X/ q/KIOUc0UVy4LmIHida1mKAv/1lA3SqoWcj/j5Vh6QRWbw3IcCGztIVn0 QvpiEM+BHlS8o4oMEnd7gLT8wicV2zov7eKY0f9/Vj7evnFDzpuW3SYun IPvFodEHyUAh+s0elPRH2aSuiEtiGvnmqzY1uKVNBKmmiKPc7XjYjRbqy P6yGIoHwkba/c5GKOrsvc9bo5BWOpWkUGV0Dh6lvtXl2jQTlb8b8yK3JS N4VlAbBY6Az/dasgQD1nTJYzMkSwwjMxE5m6l3DUkH3WiNZ3VRDXOZ0U8 w==; X-CSE-ConnectionGUID: yjf/pDeeQZeiqTQ50/e0LQ== X-CSE-MsgGUID: zWP71ipGQK2acEA/9tIHig== X-IronPort-AV: E=McAfee;i="6800,10657,11943"; a="1386726" X-IronPort-AV: E=Sophos;i="6.27,173,1787036400"; d="scan'208";a="1386726" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Oct 2026 23:08:30 -0700 X-CSE-ConnectionGUID: qtQRlpllQ2CiqhY6QFXeOQ== X-CSE-MsgGUID: KOvLsHqXRQWjrXLxT7jFfQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.27,173,1787036400"; d="scan'208";a="3646542" Received: from gfx-coremm-kmd15.iind.intel.com ([10.223.55.8]) by fmviesa003.fm.intel.com with ESMTP; 22 Oct 2026 23:08:26 -0700 From: Nareshkumar Gollakoti To: intel-xe@lists.freedesktop.org Cc: tejas.upadhyay@intel.com, Nareshkumar Gollakoti Subject: [PATCH v5 4/7] drm/xe: dump GAM page fault report registers in devcoredump Date: Fri, 23 Oct 2026 11:35:51 +0530 Message-ID: <20261023060554.2643515-5-naresh.kumar.g@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261023060554.2643515-1-naresh.kumar.g@intel.com> References: <20261023060554.2643515-1-naresh.kumar.g@intel.com> X-Archived-By: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Intel-xe" X-Spam-Status: No, score=-19.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 Add PAGE_FLTRPTQ_HEAD_GAMCTRL and PAGE_FLTRPTQ_TAIL_GAMCTRL to the Xe register definitions and capture them as part of the devcoredump snapshot. Include the register dump in the devcoredump output and release the snapshot during cleanup so page fault report state is available for post-mortem debugging. v2: - As design change made for previous patches. refactored this patch as well to accommodate those changes. - Add PF occurred print when the two register values are not equal v4: Refactored as per the patch1 change(Tejas) v5: Refactored as per patch1 changes Signed-off-by: Nareshkumar Gollakoti --- drivers/gpu/drm/xe/regs/xe_gt_regs.h | 3 ++ drivers/gpu/drm/xe/xe_devcoredump.c | 37 +++++++++++++++++++++++ drivers/gpu/drm/xe/xe_devcoredump_types.h | 3 ++ 3 files changed, 43 insertions(+) diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h index e93895e0c731..e9eb0bd04af1 100644 --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h @@ -530,6 +530,9 @@ #define LMEM_EN REG_BIT(31) #define LMTT_DIR_PTR REG_GENMASK(30, 0) /* in multiples of 64KB */ +#define PAGE_FLTRPTQ_HEAD_GAMCTRL XE_REG(0xcf90) +#define PAGE_FLTRPTQ_TAIL_GAMCTRL XE_REG(0xcf94) + #define HALF_SLICE_CHICKEN5 XE_REG_MCR(0xe188, XE_REG_OPTION_MASKED) #define DISABLE_SAMPLE_G_PERFORMANCE REG_BIT(0) diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c index 49a7c020a161..8d59f80e2929 100644 --- a/drivers/gpu/drm/xe/xe_devcoredump.c +++ b/drivers/gpu/drm/xe/xe_devcoredump.c @@ -114,6 +114,11 @@ static const struct xe_reg_desc xe_dbg_media_gt_rpm_reglist[] = { XE_REG_DESC(RPM_GCD, "RPM_GCD"), }; +static const struct xe_reg_desc xe_dbg_gam_pf_reglist[] = { + XE_REG_DESC(PAGE_FLTRPTQ_HEAD_GAMCTRL, "PAGE_FLTRPTQ_HEAD_GAMCTRL"), + XE_REG_DESC(PAGE_FLTRPTQ_TAIL_GAMCTRL, "PAGE_FLTRPTQ_TAIL_GAMCTRL"), +}; + /** * struct xe_gt_regset - Struct for register descriptor list for GT * @@ -133,12 +138,14 @@ struct xe_gt_regset { * @XE_DBG_REGSET_FUSE: Fuse register set * @XE_DBG_REGSET_RPM: RPM register set * @XE_DBG_REGSET_GUC: GUC register set + * @XE_DBG_REGSET_GAM_PF: GAM Pagefault registers set * @XE_DBG_REGSET_MAX: Number of debug register set types */ enum xe_dbg_regset_type { XE_DBG_REGSET_FUSE, XE_DBG_REGSET_RPM, XE_DBG_REGSET_GUC, + XE_DBG_REGSET_GAM_PF, XE_DBG_REGSET_MAX, }; @@ -161,6 +168,10 @@ static const struct xe_gt_regset xe_dbg_regsets[XE_DBG_REGSET_MAX] = { .gt[XE_GT_TYPE_MEDIA] = { xe_dbg_gt_guc_reglist, ARRAY_SIZE(xe_dbg_gt_guc_reglist) }, }, + [XE_DBG_REGSET_GAM_PF] = { + .gt[XE_GT_TYPE_MAIN] = { xe_dbg_gam_pf_reglist, + ARRAY_SIZE(xe_dbg_gam_pf_reglist) }, + }, }; static void xe_dbg_reg_snapshot_print(struct drm_printer *p, @@ -202,6 +213,23 @@ static const u32 *xe_dbg_find_value(const struct xe_dbg_reg_snapshot *snap, return NULL; } +static void xe_gam_pf_snapshot_print(struct drm_printer *p, + const char *title, + const struct xe_dbg_reg_snapshot *snap) +{ + const u32 *val1, *val2; + + xe_dbg_reg_snapshot_print(p, title, snap); + + if (!snap) + return; + + val1 = xe_dbg_find_value(snap, PAGE_FLTRPTQ_HEAD_GAMCTRL); + val2 = xe_dbg_find_value(snap, PAGE_FLTRPTQ_TAIL_GAMCTRL); + if ((val1 && val2) && (*val1 != *val2)) + drm_printf(p, "PF occurred, refer to dmesg log for PF info\n"); +} + static void xe_gt_rpm_snapshot_print(struct drm_printer *p, const char *title, const struct xe_dbg_reg_snapshot *snap) @@ -315,6 +343,8 @@ static ssize_t __xe_devcoredump_read(char *buffer, ssize_t count, drm_puts(&p, "\n**** GuC CT ****\n"); xe_guc_ct_snapshot_print(ss->guc.ct, &p, ss->gt); + xe_gam_pf_snapshot_print(&p, "GAM PF Report", ss->gam_pf_report); + drm_puts(&p, "\n**** Contexts ****\n"); xe_guc_exec_queue_snapshot_print(ss->ge, &p); @@ -369,6 +399,9 @@ static void xe_devcoredump_snapshot_free(struct xe_devcoredump_snapshot *ss) xe_guc_capture_put_matched_nodes(&ss->gt->uc.guc); ss->matched_node = NULL; + xe_dbg_reg_snapshot_free(ss->gam_pf_report); + ss->gam_pf_report = NULL; + xe_guc_exec_queue_snapshot_free(ss->ge); ss->ge = NULL; @@ -565,6 +598,10 @@ static void xe_devcoredump_capture_gt_regs(struct xe_devcoredump_snapshot *ss, other_gt, XE_DBG_REGSET_GUC, XE_GT_TYPE_MEDIA); + ss->gam_pf_report = xe_dbg_gt_snapshot_capture(gt, + other_gt, + XE_DBG_REGSET_GAM_PF, + XE_GT_TYPE_MAIN); } static void devcoredump_snapshot(struct xe_devcoredump *coredump, diff --git a/drivers/gpu/drm/xe/xe_devcoredump_types.h b/drivers/gpu/drm/xe/xe_devcoredump_types.h index 52db64640f89..34f224a6751f 100644 --- a/drivers/gpu/drm/xe/xe_devcoredump_types.h +++ b/drivers/gpu/drm/xe/xe_devcoredump_types.h @@ -103,6 +103,9 @@ struct xe_devcoredump_snapshot { struct xe_guc_log_snapshot *log; } guc; + /** @gam_pf_report: GAM PF report snapshot */ + struct xe_dbg_reg_snapshot *gam_pf_report; + /** @ge: GuC Submission Engine snapshot */ struct xe_guc_submit_exec_queue_snapshot *ge; -- 2.43.0