On Mon, 19 Jan 2026, Jani Nikula wrote:
> On Fri, 16 Jan 2026, Michał Grzelak <michal.grzelak@intel.com> wrote:
>> While moving the code, should we rename val & val1 into val1 & val2 (or
>> val2 & val1)? I think even renaming val -> val0 would suffice.
>
> The variable naming matches the register macro naming. Historically,
> there was only GEN6_PCODE_DATA, and GEN6_PCODE_DATA1 was added
> afterwards. Hence val and val1.
>
> Nowadays the spec has DATA0 and DATA1, so renaming both the register
> macro and the variable to DATA0 and val0, respectively, would be fine.

One question though: should the renaming include also variable from
functions which take only val as argument instead of val & val1?
E.g. should we rename val->val0 from snb_pcode_write_timeout() or
is it unnecessary?

Asking since unsure if the argument consistenly references generic
variable name or former register macro.

BR,
Michał

>
> Just not in this patch. Generally, only do one thing at a time.
>
>> Or (if the comment is valid) should I send it as a separate patch?
>
> The latter.
>
>> Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
>
> Thanks,
> Jani.
>
>
> -- 
> Jani Nikula, Intel
>