[PATCH 03/10] drm/i915/color: Program fixed-function CSC on SDR planes

Chaitanya Kumar Borah
2026-03-06T17:18:51Z

Program the fixed-function CSC block for SDR planes based on the
DRM_COLOROP_CSC_FF state.

Track the bypass state explicitly as a boolean in the plane hw state
since bypass is managed separately from the CSC_FF enum value in the
colorop framework.

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
.../drm/i915/display/intel_display_types.h | 2 ++
drivers/gpu/drm/i915/display/intel_plane.c | 12 ++++++--
.../drm/i915/display/skl_universal_plane.c | 30 +++++++++++++++++++
3 files changed, 42 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index e189f8c39ccb..02b1cee18e4a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -679,6 +679,8 @@ struct intel_plane_state {
enum drm_color_range color_range;
enum drm_scaling_filter scaling_filter;
struct drm_property_blob *ctm, *degamma_lut, *gamma_lut, *lut_3d;
+ enum drm_colorop_csc_ff_type csc_ff_type; /* For SDR plane */
+ bool csc_ff_enable;
} hw;

struct i915_vma *ggtt_vma;
diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
index e06a0618b4c6..c271a0ceb94e 100644
--- a/drivers/gpu/drm/i915/display/intel_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_plane.c
@@ -378,11 +378,19 @@ intel_plane_color_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,
while (iter_colorop) {
for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
if (new_colorop_state->colorop == iter_colorop) {
- blob = new_colorop_state->bypass ? NULL : new_colorop_state->data;
intel_colorop = to_intel_colorop(colorop);
- changed |= intel_plane_colorop_replace_blob(plane_state,
+ if (intel_colorop->id == INTEL_PLANE_CB_CSC_FF) {
+ plane_state->hw.csc_ff_enable =
+ !new_colorop_state->bypass;
+ plane_state->hw.csc_ff_type =
+ new_colorop_state->csc_ff_type;
+ } else {
+ blob = new_colorop_state->bypass ?
+ NULL : new_colorop_state->data;
+ changed |= intel_plane_colorop_replace_blob(plane_state,
intel_colorop,
blob);
+ }
}
}
iter_colorop = iter_colorop->next;
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 677f1339b7f8..3d96975f97ae 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1239,6 +1239,32 @@ static u32 glk_plane_color_ctl_crtc(const struct intel_crtc_state *crtc_state)
return plane_color_ctl;
}

+static u32 intel_csc_ff_type_to_csc_mode(enum drm_colorop_csc_ff_type csc_ff_type,
+ bool enable)
+{
+ u32 csc_mode = PLANE_COLOR_CSC_MODE_BYPASS;
+
+ if (enable) {
+ switch (csc_ff_type) {
+ case DRM_COLOROP_CSC_FF_YUV601_RGB601:
+ csc_mode = PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
+ break;
+ case DRM_COLOROP_CSC_FF_YUV709_RGB709:
+ csc_mode = PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
+ break;
+ case DRM_COLOROP_CSC_FF_YUV2020_RGB2020:
+ csc_mode = PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
+ break;
+ case DRM_COLOROP_CSC_FF_RGB709_RGB2020:
+ csc_mode = PLANE_COLOR_CSC_MODE_RGB709_TO_RGB2020;
+ break;
+ default:
+ csc_mode = PLANE_COLOR_CSC_MODE_BYPASS;
+ }
+ }
+ return csc_mode;
+}
+
static u32 glk_plane_color_ctl(const struct intel_plane_state *plane_state)
{
struct intel_display *display = to_intel_display(plane_state);
@@ -1270,6 +1296,10 @@ static u32 glk_plane_color_ctl(const struct intel_plane_state *plane_state)
plane_color_ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
}

+ if (!icl_is_hdr_plane(display, plane->id))
+ plane_color_ctl |= intel_csc_ff_type_to_csc_mode(plane_state->hw.csc_ff_type,
+ plane_state->hw.csc_ff_enable);
+
if (plane_state->force_black)
plane_color_ctl |= PLANE_COLOR_PLANE_CSC_ENABLE;

--
2.25.1