Re: [RFC 1/8] drm/i915/cmtg: enable cmtg LNL onwards

[Jani Nikula <jani.nikula@linux.intel.com>]

On Mon, 17 Nov 2025, Animesh Manna <animesh.manna@intel.com> wrote:
> Introduce a flag for cmtg. LNL onwards CMTG support will be added.
> Set the flag as per DISPLAY_VER() check.
>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_types.h | 3 +++
>  drivers/gpu/drm/i915/display/intel_dp.c            | 5 +++++
>  2 files changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 38702a9e0f50..7b8343755c90 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1351,6 +1351,9 @@ struct intel_crtc_state {
>  
>  	struct drm_rect psr2_su_area;
>  
> +	/* CMTG Enable */

The comment is useless, it's literally the same as the member name.

> +	bool enable_cmtg;

Please let's add this stuff in sub-structs, we should do it more in
general:

	struct {
		bool enable;
        } cmtg;

> +
>  	/* Variable Refresh Rate state */
>  	struct {
>  		bool enable, in_range;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 0ec82fcbcf48..3f7da4c08665 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -3421,6 +3421,11 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
>  	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
>  
> +	if(DISPLAY_VER(display) >= 15 && intel_dp_is_edp(intel_dp)) {
> +		pipe_config->enable_cmtg = true;
> +		drm_dbg_kms(display->drm,"ANI-DBG: intel_dp_compute_config\n");

Please don't leave personal debug stuff even in RFC code.

> +	}
> +
>  	return intel_dp_tunnel_atomic_compute_stream_bw(state, intel_dp, connector,
>  							pipe_config);
>  }

-- 
Jani Nikula, Intel