Re: [PATCH v7 10/10] drm/xe/guc: toggle paging engine support for NVL-S+

[Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>]

On 6/26/2026 4:15 AM, Matthew Auld wrote:
> NVL-S with latest GuC should be the first platform combo to
> support the special GUC_PAGING_CLASS feature.
>
> v2:
>    - Update with the final GuC version
> v3:
>    - Split VF vs PF versioning. Which is recommendation from GuC side.
>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Daniele

> ---
>   drivers/gpu/drm/xe/xe_guc.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> index 244943843018..feae2d4f4482 100644
> --- a/drivers/gpu/drm/xe/xe_guc.c
> +++ b/drivers/gpu/drm/xe/xe_guc.c
> @@ -1863,8 +1863,8 @@ bool xe_guc_has_paging_engine(struct xe_guc *guc)
>   	if (IS_SRIOV_VF(xe))
>   		return xe_gt_sriov_vf_paging_engines(gt);
>   
> -	/* TODO: Have some way to query this from the GuC? */
> -	return false;
> +	return xe->info.platform >= XE_NOVALAKE_S &&
> +	       GUC_FIRMWARE_VER_AT_LEAST(guc, 70, 69, 0);
>   }
>   
>   /**