From: Matthew Auld <matthew.auld@intel.com>
To: Akshata Jahagirdar <akshata.jahagirdar@intel.com>,
intel-xe@lists.freedesktop.org
Cc: matthew.d.roper@intel.com, himal.prasad.ghimiray@intel.com,
lucas.demarchi@intel.com
Subject: Re: [PATCH 1/6] drm/xe/migrate: Handle clear ccs logic for xe2 dgfx
Date: Thu, 11 Jul 2024 13:09:40 +0100 [thread overview]
Message-ID: <26effdad-d3f2-4db6-a75d-899f03639666@intel.com> (raw)
In-Reply-To: <2b3532ca86b91da122154e56bd4ae95c2dafc04a.1720689220.git.akshata.jahagirdar@intel.com>
On 11/07/2024 10:18, Akshata Jahagirdar wrote:
> For Xe2 dGPU, we clear the bo by modifying the VRAM using an
> uncompressed pat index which then indirectly updates the
> compression status as uncompressed i.e zeroed CCS.
> So xe_migrate_clear() should be updated for BMG to not
> emit CCS surf copy commands.
>
> Signed-off-by: Akshata Jahagirdar <akshata.jahagirdar@intel.com>
> ---
> drivers/gpu/drm/xe/xe_device.h | 5 +++++
> drivers/gpu/drm/xe/xe_migrate.c | 6 +++---
> 2 files changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
> index 0a2a3e7fd402..c3093506c28c 100644
> --- a/drivers/gpu/drm/xe/xe_device.h
> +++ b/drivers/gpu/drm/xe/xe_device.h
> @@ -144,6 +144,11 @@ static inline bool xe_device_has_flat_ccs(struct xe_device *xe)
> return xe->info.has_flat_ccs;
> }
>
> +static inline bool xe_device_needs_ccs_emit(struct xe_device *xe)
> +{
> + return xe_device_has_flat_ccs(xe) && !(GRAPHICS_VER(xe) >= 20 && IS_DGFX(xe));
> +}
> +
This should in theory be hyper specific to the migration code
implementation. I think best keep in xe_migrate.c, instead of exporting
(if possible).
With that,
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
> static inline bool xe_device_has_sriov(struct xe_device *xe)
> {
> return xe->info.has_sriov;
> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
> index fa23a7e7ec43..2fc2cf375b1e 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -420,7 +420,7 @@ struct xe_migrate *xe_migrate_init(struct xe_tile *tile)
> return ERR_PTR(err);
>
> if (IS_DGFX(xe)) {
> - if (xe_device_has_flat_ccs(xe))
> + if (xe_device_needs_ccs_emit(xe))
> /* min chunk size corresponds to 4K of CCS Metadata */
> m->min_chunk_size = SZ_4K * SZ_64K /
> xe_device_ccs_bytes(xe, SZ_64K);
> @@ -1034,7 +1034,7 @@ struct dma_fence *xe_migrate_clear(struct xe_migrate *m,
> clear_system_ccs ? 0 : emit_clear_cmd_len(gt), 0,
> avail_pts);
>
> - if (xe_device_has_flat_ccs(xe))
> + if (xe_device_needs_ccs_emit(xe))
> batch_size += EMIT_COPY_CCS_DW;
>
> /* Clear commands */
> @@ -1062,7 +1062,7 @@ struct dma_fence *xe_migrate_clear(struct xe_migrate *m,
> if (!clear_system_ccs)
> emit_clear(gt, bb, clear_L0_ofs, clear_L0, XE_PAGE_SIZE, clear_vram);
>
> - if (xe_device_has_flat_ccs(xe)) {
> + if (xe_device_needs_ccs_emit(xe)) {
> emit_copy_ccs(gt, bb, clear_L0_ofs, true,
> m->cleared_mem_ofs, false, clear_L0);
> flush_flags = MI_FLUSH_DW_CCS;
next prev parent reply other threads:[~2024-07-11 12:09 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <cover.1720689220.git.akshata.jahagirdar@intel.com>
2024-07-11 9:18 ` [PATCH 1/6] drm/xe/migrate: Handle clear ccs logic for xe2 dgfx Akshata Jahagirdar
2024-07-11 9:19 ` Akshata Jahagirdar
2024-07-11 12:09 ` Matthew Auld [this message]
2024-07-12 4:09 ` Jahagirdar, Akshata
2024-07-11 9:18 ` [PATCH 2/6] drm/xe/migrate: Add kunit to test clear functionality Akshata Jahagirdar
2024-07-11 9:19 ` Akshata Jahagirdar
2024-07-11 14:27 ` Matthew Auld
2024-07-12 4:15 ` Jahagirdar, Akshata
2024-07-16 8:51 ` Matthew Auld
2024-07-11 9:18 ` [PATCH 3/6] drm/xe/xe2: Introduce identity map for compressed pat for vram Akshata Jahagirdar
2024-07-11 9:19 ` Akshata Jahagirdar
2024-07-11 12:32 ` Matthew Auld
2024-07-12 4:24 ` Jahagirdar, Akshata
2024-07-13 0:14 ` Matthew Brost
2024-07-11 9:18 ` [PATCH 4/6] drm/xe/xe_migrate: Handle migration logic for xe2+ dgfx Akshata Jahagirdar
2024-07-11 9:20 ` Akshata Jahagirdar
2024-07-11 12:57 ` Matthew Auld
2024-07-11 9:18 ` [PATCH 5/6] drm/xe/migrate: Add kunit to test migration functionality for BMG Akshata Jahagirdar
2024-07-11 9:20 ` Akshata Jahagirdar
2024-07-11 9:18 ` [PATCH 6/6] drm/xe/xe2: Do not run xe_bo_test for xe2+ dgfx Akshata Jahagirdar
2024-07-11 9:20 ` Akshata Jahagirdar
2024-07-11 10:05 ` ✓ CI.Patch_applied: success for series starting with [1/6] drm/xe/migrate: Handle clear ccs logic for xe2 dgfx Patchwork
2024-07-11 10:06 ` ✗ CI.checkpatch: warning " Patchwork
2024-07-11 10:07 ` ✓ CI.KUnit: success " Patchwork
2024-07-11 10:19 ` ✓ CI.Build: " Patchwork
2024-07-11 10:21 ` ✓ CI.Hooks: " Patchwork
2024-07-11 10:22 ` ✓ CI.checksparse: " Patchwork
2024-07-11 11:20 ` ✓ CI.BAT: " Patchwork
2024-07-11 12:50 ` ✗ CI.FULL: failure " Patchwork
[not found] <cover.1720768378.git.akshata.jahagirdar@intel.com>
2024-07-12 7:24 ` [PATCH 1/6] " Akshata Jahagirdar
2024-07-12 6:39 [PATCH 0/6] Implement compression support on BMG Akshata Jahagirdar
2024-07-12 6:39 ` [PATCH 1/6] drm/xe/migrate: Handle clear ccs logic for xe2 dgfx Akshata Jahagirdar
-- strict thread matches above, loose matches on Subject: below --
2024-07-11 9:18 [PATCH 0/6] Implement compression support on BMG Akshata Jahagirdar
2024-07-12 3:11 ` [PATCH 1/6] drm/xe/migrate: Handle clear ccs logic for xe2 dgfx Akshata Jahagirdar
[not found] <cover.1720677099.git.akshata.jahagirdar@intel.com>
2024-07-11 5:55 ` Akshata Jahagirdar
2024-07-10 7:53 [PATCH 0/6] Implement compression support on BMG Akshata Jahagirdar
2024-07-10 7:53 ` [PATCH 1/6] drm/xe/migrate: Handle clear ccs logic for xe2 dgfx Akshata Jahagirdar
2024-07-10 8:01 ` Nirmoy Das
2024-07-10 8:17 ` Akshata Jahagirdar
2024-07-11 11:27 ` Akshata Jahagirdar
2024-07-11 12:42 ` Akshata Jahagirdar
2024-07-11 13:07 ` Akshata Jahagirdar
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