[PATCH 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling

[PATCH 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Restructure the DP/HDMI sink format handling. I got inspired to do this
by https://lore.kernel.org/dri-devel/20260324-color-format-v11-8-605559af4fb4@collabora.com/

I envision that after this the aforementioned patch could just
become something like this:

1. s/intel_foo_compute_formats/intel_foo_compute_formats_auto/
2. Add a new intel_foo_compute_formats()

   intel_foo_compute_formats()
   {
	switch (color_format) {
	case YCBCR420:
		return intel_foo_compute_output_format(YCBCR420);
	case RGB:
		return intel_foo_compute_output_format(RGB);
	case AUTO:
		return intel_foo_compute_formats_auto();
	}
   }

Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>

Ville Syrjälä (9):
  drm/i915/hdmi: Add missing intel_pfit_mode_valid() for 4:2:0 also
    modes
  drm/i915/hdmi: Restructure the sink/output format selection
  drm/i915/hdmi: Restructure 4:2:0 vs. 4:4:4 mode validation
  drm/i915/dp: Restructure the sink/output format selection
  drm/i915/dp: Validate "4:2:0 also" modes twice
  drm/i915/dp: Require a HDMI sink for YCbCr output via PCON
  drm/i915/dp: Validate sink format in .mode_valid()
  drm/i915/hdmi: Make the RGB fallback for "4:2:0 only" modes the last
    resort
  drm/i915/dp: Make the RGB fallback for "4:2:0 only" modes the last
    resort

 drivers/gpu/drm/i915/display/intel_dp.c   | 213 ++++++++++++++--------
 drivers/gpu/drm/i915/display/intel_hdmi.c | 167 ++++++++++-------
 2 files changed, 237 insertions(+), 143 deletions(-)

-- 
2.52.0

[PATCH 1/9] drm/i915/hdmi: Add missing intel_pfit_mode_valid() for 4:2:0 also modes

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

intel_hdmi_mode_valid() is calling intel_pfit_mode_valid() only
on the first attempt (4:2:0 for "4:2:0 only" modes, 4:4:4 for
everything else). Add the call also for the "4:2:0 also" modes case
so that we actually know the pipe scaler can actually produce the
4:2:0 output.

Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 05e898d10a2b..072b0554cc24 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2079,6 +2079,11 @@ intel_hdmi_mode_valid(struct drm_connector *_connector,
 			return status;
 
 		sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
+
+		status = intel_pfit_mode_valid(display, mode, sink_format, 0);
+		if (status != MODE_OK)
+			return status;
+
 		status = intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink,
 						     sink_format);
 		if (status != MODE_OK)
-- 
2.52.0

Re: [PATCH 1/9] drm/i915/hdmi: Add missing intel_pfit_mode_valid() for 4:2:0 also modes

[Nautiyal, Ankit K]

On 3/31/2026 5:23 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> intel_hdmi_mode_valid() is calling intel_pfit_mode_valid() only
> on the first attempt (4:2:0 for "4:2:0 only" modes, 4:4:4 for
> everything else). Add the call also for the "4:2:0 also" modes case
> so that we actually know the pipe scaler can actually produce the
> 4:2:0 output.
>
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


> ---
>   drivers/gpu/drm/i915/display/intel_hdmi.c | 5 +++++
>   1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 05e898d10a2b..072b0554cc24 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2079,6 +2079,11 @@ intel_hdmi_mode_valid(struct drm_connector *_connector,
>   			return status;
>   
>   		sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> +
> +		status = intel_pfit_mode_valid(display, mode, sink_format, 0);
> +		if (status != MODE_OK)
> +			return status;
> +
>   		status = intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink,
>   						     sink_format);
>   		if (status != MODE_OK)

[PATCH 2/9] drm/i915/hdmi: Restructure the sink/output format selection

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

intel_hdmi_compute_output_format() is a bit of a mess. Try to
restructure it into a more readable form.

Right now we basically have two main code paths:
- YCbCr 4:2:0 only modes
- everything else including YCbCr 4:2:0 also modes

Those two basically do the same two steps (try 4:2:0 and try 4:4:4)
but in opposite orders. Let's write that out in a more explicit
if-else form. And since I'm running out of function names I'll
rename the function with that high level logic into
intel_hdmi_compute_formats() and it will call (the new) with
intel_hdmi_compute_output_format() with an explicit sink_format
as needed.

Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c | 112 ++++++++++++++--------
 1 file changed, 70 insertions(+), 42 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 072b0554cc24..16873fc7bcb9 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2021,6 +2021,30 @@ intel_hdmi_mode_clock_valid(struct drm_connector *_connector, int clock,
 	return status;
 }
 
+static enum drm_mode_status
+intel_hdmi_sink_format_valid(struct intel_connector *connector,
+			     const struct drm_display_mode *mode,
+			     bool has_hdmi_sink,
+			     enum intel_output_format sink_format)
+{
+	const struct drm_display_info *info = &connector->base.display_info;
+
+	switch (sink_format) {
+	case INTEL_OUTPUT_FORMAT_YCBCR420:
+		if (!has_hdmi_sink ||
+		    !connector->base.ycbcr_420_allowed ||
+		    !drm_mode_is_420(info, mode))
+			return MODE_NO_420;
+
+		return MODE_OK;
+	case INTEL_OUTPUT_FORMAT_RGB:
+		return MODE_OK;
+	default:
+		MISSING_CASE(sink_format);
+		return MODE_BAD;
+	}
+}
+
 static enum drm_mode_status
 intel_hdmi_mode_valid(struct drm_connector *_connector,
 		      const struct drm_display_mode *mode)
@@ -2246,20 +2270,6 @@ static bool intel_hdmi_has_audio(struct intel_encoder *encoder,
 		return intel_conn_state->force_audio == HDMI_AUDIO_ON;
 }
 
-static enum intel_output_format
-intel_hdmi_sink_format(const struct intel_crtc_state *crtc_state,
-		       struct intel_connector *connector,
-		       bool ycbcr_420_output)
-{
-	if (!crtc_state->has_hdmi_sink)
-		return INTEL_OUTPUT_FORMAT_RGB;
-
-	if (connector->base.ycbcr_420_allowed && ycbcr_420_output)
-		return INTEL_OUTPUT_FORMAT_YCBCR420;
-	else
-		return INTEL_OUTPUT_FORMAT_RGB;
-}
-
 static enum intel_output_format
 intel_hdmi_output_format(const struct intel_crtc_state *crtc_state)
 {
@@ -2268,37 +2278,55 @@ intel_hdmi_output_format(const struct intel_crtc_state *crtc_state)
 
 static int intel_hdmi_compute_output_format(struct intel_encoder *encoder,
 					    struct intel_crtc_state *crtc_state,
-					    const struct drm_connector_state *conn_state,
-					    bool respect_downstream_limits)
+					    struct intel_connector *connector,
+					    bool respect_downstream_limits,
+					    enum intel_output_format sink_format)
 {
-	struct intel_display *display = to_intel_display(encoder);
-	struct intel_connector *connector = to_intel_connector(conn_state->connector);
 	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
-	const struct drm_display_info *info = &connector->base.display_info;
-	bool ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
-	int ret;
 
-	crtc_state->sink_format =
-		intel_hdmi_sink_format(crtc_state, connector, ycbcr_420_only);
-
-	if (ycbcr_420_only && crtc_state->sink_format != INTEL_OUTPUT_FORMAT_YCBCR420) {
-		drm_dbg_kms(display->drm,
-			    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
-		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
-	}
+	if (intel_hdmi_sink_format_valid(connector, adjusted_mode,
+					 crtc_state->has_hdmi_sink, sink_format) != MODE_OK)
+		return -EINVAL;
 
+	crtc_state->sink_format = sink_format;
 	crtc_state->output_format = intel_hdmi_output_format(crtc_state);
-	ret = intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
-	if (ret) {
-		if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
-		    !crtc_state->has_hdmi_sink ||
-		    !connector->base.ycbcr_420_allowed ||
-		    !drm_mode_is_420_also(info, adjusted_mode))
-			return ret;
-
-		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
-		crtc_state->output_format = intel_hdmi_output_format(crtc_state);
-		ret = intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
+
+	return intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
+}
+
+static int intel_hdmi_compute_formats(struct intel_encoder *encoder,
+				      struct intel_crtc_state *crtc_state,
+				      const struct drm_connector_state *conn_state,
+				      bool respect_downstream_limits)
+{
+	struct intel_display *display = to_intel_display(encoder);
+	struct intel_connector *connector = to_intel_connector(conn_state->connector);
+	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+	const struct drm_display_info *info = &connector->base.display_info;
+	int ret;
+
+	if (drm_mode_is_420_only(info, adjusted_mode)) {
+		ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
+						       respect_downstream_limits,
+						       INTEL_OUTPUT_FORMAT_YCBCR420);
+
+		if (ret) {
+			drm_dbg_kms(display->drm,
+				    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
+
+			ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
+							       respect_downstream_limits,
+							       INTEL_OUTPUT_FORMAT_RGB);
+		}
+	} else {
+		ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
+						       respect_downstream_limits,
+						       INTEL_OUTPUT_FORMAT_RGB);
+
+		if (ret && drm_mode_is_420_also(info, adjusted_mode))
+			ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
+							       respect_downstream_limits,
+							       INTEL_OUTPUT_FORMAT_YCBCR420);
 	}
 
 	return ret;
@@ -2375,9 +2403,9 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
 	 * Try to respect downstream TMDS clock limits first, if
 	 * that fails assume the user might know something we don't.
 	 */
-	ret = intel_hdmi_compute_output_format(encoder, pipe_config, conn_state, true);
+	ret = intel_hdmi_compute_formats(encoder, pipe_config, conn_state, true);
 	if (ret)
-		ret = intel_hdmi_compute_output_format(encoder, pipe_config, conn_state, false);
+		ret = intel_hdmi_compute_formats(encoder, pipe_config, conn_state, false);
 	if (ret) {
 		drm_dbg_kms(display->drm,
 			    "unsupported HDMI clock (%d kHz), rejecting mode\n",
-- 
2.52.0

Re: [PATCH 2/9] drm/i915/hdmi: Restructure the sink/output format selection

[Nicolas Frattaroli]

On Tuesday, 31 March 2026 01:53:32 Central European Summer Time Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> intel_hdmi_compute_output_format() is a bit of a mess. Try to
> restructure it into a more readable form.
> 
> Right now we basically have two main code paths:
> - YCbCr 4:2:0 only modes
> - everything else including YCbCr 4:2:0 also modes
> 
> Those two basically do the same two steps (try 4:2:0 and try 4:4:4)
> but in opposite orders. Let's write that out in a more explicit
> if-else form. And since I'm running out of function names I'll
> rename the function with that high level logic into
> intel_hdmi_compute_formats() and it will call (the new) with
> intel_hdmi_compute_output_format() with an explicit sink_format
> as needed.
> 
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_hdmi.c | 112 ++++++++++++++--------
>  1 file changed, 70 insertions(+), 42 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 072b0554cc24..16873fc7bcb9 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2021,6 +2021,30 @@ intel_hdmi_mode_clock_valid(struct drm_connector *_connector, int clock,
>  	return status;
>  }
>  
> +static enum drm_mode_status
> +intel_hdmi_sink_format_valid(struct intel_connector *connector,
> +			     const struct drm_display_mode *mode,
> +			     bool has_hdmi_sink,
> +			     enum intel_output_format sink_format)
> +{
> +	const struct drm_display_info *info = &connector->base.display_info;
> +
> +	switch (sink_format) {
> +	case INTEL_OUTPUT_FORMAT_YCBCR420:
> +		if (!has_hdmi_sink ||
> +		    !connector->base.ycbcr_420_allowed ||
> +		    !drm_mode_is_420(info, mode))
> +			return MODE_NO_420;
> +
> +		return MODE_OK;
> +	case INTEL_OUTPUT_FORMAT_RGB:
> +		return MODE_OK;
> +	default:
> +		MISSING_CASE(sink_format);
> +		return MODE_BAD;
> +	}
> +}

I think this here is missing INTEL_OUTPUT_FORMAT_YCBCR444 as a case.
The following diff adding it for both intel_hdmi_sink_format_valid
and intel_hdmi_sink_bpc_possible that I quickly whipped up may be the
way to go, but I'm unsure about the interaction between the two:

---
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 6bc1689cbf93..38b9924ebef0 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -1966,6 +1966,8 @@ static bool intel_hdmi_sink_bpc_possible(struct drm_connector *_connector,
 
                if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR420)
                        return hdmi->y420_dc_modes & DRM_EDID_YCBCR420_DC_36;
+               else if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR444)
+                       return info->edid_hdmi_ycbcr444_dc_modes & DRM_EDID_HDMI_DC_36;
                else
                        return info->edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_36;
        case 10:
@@ -1974,6 +1976,8 @@ static bool intel_hdmi_sink_bpc_possible(struct drm_connector *_connector,
 
                if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR420)
                        return hdmi->y420_dc_modes & DRM_EDID_YCBCR420_DC_30;
+               else if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR444)
+                       return info->edid_hdmi_ycbcr444_dc_modes & DRM_EDID_HDMI_DC_30;
                else
                        return info->edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_30;
        case 8:
@@ -2038,6 +2042,11 @@ intel_hdmi_sink_format_valid(struct intel_connector *connector,
 
                return MODE_OK;
        case INTEL_OUTPUT_FORMAT_RGB:
+               return MODE_OK;
+       case INTEL_OUTPUT_FORMAT_YCBCR444:
+               if (!(info->color_formats & BIT(DRM_OUTPUT_COLOR_FORMAT_YCBCR444)))
+                       return MODE_BAD;
+
                return MODE_OK;
        default:
                MISSING_CASE(sink_format);
---

It does work for me though at YCBCr 4:4:4 @ 12bpc, 10bpc and 8bpc, so both info
members this relies on are populated correctly.

> +
>  static enum drm_mode_status
>  intel_hdmi_mode_valid(struct drm_connector *_connector,
>  		      const struct drm_display_mode *mode)
> @@ -2246,20 +2270,6 @@ static bool intel_hdmi_has_audio(struct intel_encoder *encoder,
>  		return intel_conn_state->force_audio == HDMI_AUDIO_ON;
>  }
>  
> -static enum intel_output_format
> -intel_hdmi_sink_format(const struct intel_crtc_state *crtc_state,
> -		       struct intel_connector *connector,
> -		       bool ycbcr_420_output)
> -{
> -	if (!crtc_state->has_hdmi_sink)
> -		return INTEL_OUTPUT_FORMAT_RGB;
> -
> -	if (connector->base.ycbcr_420_allowed && ycbcr_420_output)
> -		return INTEL_OUTPUT_FORMAT_YCBCR420;
> -	else
> -		return INTEL_OUTPUT_FORMAT_RGB;
> -}
> -
>  static enum intel_output_format
>  intel_hdmi_output_format(const struct intel_crtc_state *crtc_state)
>  {
> @@ -2268,37 +2278,55 @@ intel_hdmi_output_format(const struct intel_crtc_state *crtc_state)
>  
>  static int intel_hdmi_compute_output_format(struct intel_encoder *encoder,
>  					    struct intel_crtc_state *crtc_state,
> -					    const struct drm_connector_state *conn_state,
> -					    bool respect_downstream_limits)
> +					    struct intel_connector *connector,
> +					    bool respect_downstream_limits,
> +					    enum intel_output_format sink_format)
>  {
> -	struct intel_display *display = to_intel_display(encoder);
> -	struct intel_connector *connector = to_intel_connector(conn_state->connector);
>  	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> -	const struct drm_display_info *info = &connector->base.display_info;
> -	bool ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
> -	int ret;
>  
> -	crtc_state->sink_format =
> -		intel_hdmi_sink_format(crtc_state, connector, ycbcr_420_only);
> -
> -	if (ycbcr_420_only && crtc_state->sink_format != INTEL_OUTPUT_FORMAT_YCBCR420) {
> -		drm_dbg_kms(display->drm,
> -			    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
> -		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
> -	}
> +	if (intel_hdmi_sink_format_valid(connector, adjusted_mode,
> +					 crtc_state->has_hdmi_sink, sink_format) != MODE_OK)
> +		return -EINVAL;
>  
> +	crtc_state->sink_format = sink_format;
>  	crtc_state->output_format = intel_hdmi_output_format(crtc_state);
> -	ret = intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
> -	if (ret) {
> -		if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
> -		    !crtc_state->has_hdmi_sink ||
> -		    !connector->base.ycbcr_420_allowed ||
> -		    !drm_mode_is_420_also(info, adjusted_mode))
> -			return ret;
> -
> -		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> -		crtc_state->output_format = intel_hdmi_output_format(crtc_state);
> -		ret = intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
> +
> +	return intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
> +}
> +
> +static int intel_hdmi_compute_formats(struct intel_encoder *encoder,
> +				      struct intel_crtc_state *crtc_state,
> +				      const struct drm_connector_state *conn_state,
> +				      bool respect_downstream_limits)
> +{
> +	struct intel_display *display = to_intel_display(encoder);
> +	struct intel_connector *connector = to_intel_connector(conn_state->connector);
> +	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> +	const struct drm_display_info *info = &connector->base.display_info;
> +	int ret;
> +
> +	if (drm_mode_is_420_only(info, adjusted_mode)) {
> +		ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
> +						       respect_downstream_limits,
> +						       INTEL_OUTPUT_FORMAT_YCBCR420);
> +
> +		if (ret) {
> +			drm_dbg_kms(display->drm,
> +				    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
> +
> +			ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
> +							       respect_downstream_limits,
> +							       INTEL_OUTPUT_FORMAT_RGB);
> +		}
> +	} else {
> +		ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
> +						       respect_downstream_limits,
> +						       INTEL_OUTPUT_FORMAT_RGB);
> +
> +		if (ret && drm_mode_is_420_also(info, adjusted_mode))
> +			ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
> +							       respect_downstream_limits,
> +							       INTEL_OUTPUT_FORMAT_YCBCR420);
>  	}
>  
>  	return ret;
> @@ -2375,9 +2403,9 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
>  	 * Try to respect downstream TMDS clock limits first, if
>  	 * that fails assume the user might know something we don't.
>  	 */
> -	ret = intel_hdmi_compute_output_format(encoder, pipe_config, conn_state, true);
> +	ret = intel_hdmi_compute_formats(encoder, pipe_config, conn_state, true);
>  	if (ret)
> -		ret = intel_hdmi_compute_output_format(encoder, pipe_config, conn_state, false);
> +		ret = intel_hdmi_compute_formats(encoder, pipe_config, conn_state, false);
>  	if (ret) {
>  		drm_dbg_kms(display->drm,
>  			    "unsupported HDMI clock (%d kHz), rejecting mode\n",
> 

Re: [PATCH 2/9] drm/i915/hdmi: Restructure the sink/output format selection

[Nautiyal, Ankit K]

On 3/31/2026 5:42 PM, Nicolas Frattaroli wrote:
> On Tuesday, 31 March 2026 01:53:32 Central European Summer Time Ville Syrjala wrote:
>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>
>> intel_hdmi_compute_output_format() is a bit of a mess. Try to
>> restructure it into a more readable form.
>>
>> Right now we basically have two main code paths:
>> - YCbCr 4:2:0 only modes
>> - everything else including YCbCr 4:2:0 also modes
>>
>> Those two basically do the same two steps (try 4:2:0 and try 4:4:4)
>> but in opposite orders. Let's write that out in a more explicit
>> if-else form. And since I'm running out of function names I'll
>> rename the function with that high level logic into
>> intel_hdmi_compute_formats() and it will call (the new) with
>> intel_hdmi_compute_output_format() with an explicit sink_format
>> as needed.
>>
>> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
>> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_hdmi.c | 112 ++++++++++++++--------
>>   1 file changed, 70 insertions(+), 42 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
>> index 072b0554cc24..16873fc7bcb9 100644
>> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
>> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
>> @@ -2021,6 +2021,30 @@ intel_hdmi_mode_clock_valid(struct drm_connector *_connector, int clock,
>>   	return status;
>>   }
>>   
>> +static enum drm_mode_status
>> +intel_hdmi_sink_format_valid(struct intel_connector *connector,
>> +			     const struct drm_display_mode *mode,
>> +			     bool has_hdmi_sink,
>> +			     enum intel_output_format sink_format)
>> +{
>> +	const struct drm_display_info *info = &connector->base.display_info;
>> +
>> +	switch (sink_format) {
>> +	case INTEL_OUTPUT_FORMAT_YCBCR420:
>> +		if (!has_hdmi_sink ||
>> +		    !connector->base.ycbcr_420_allowed ||
>> +		    !drm_mode_is_420(info, mode))
>> +			return MODE_NO_420;
>> +
>> +		return MODE_OK;
>> +	case INTEL_OUTPUT_FORMAT_RGB:
>> +		return MODE_OK;
>> +	default:
>> +		MISSING_CASE(sink_format);
>> +		return MODE_BAD;
>> +	}
>> +}
> I think this here is missing INTEL_OUTPUT_FORMAT_YCBCR444 as a case.
> The following diff adding it for both intel_hdmi_sink_format_valid
> and intel_hdmi_sink_bpc_possible that I quickly whipped up may be the
> way to go, but I'm unsure about the interaction between the two:

Hmm.. Trying YCBCR444 format, is not yet implemented.

We need to have a well defined policy as to when to use YCBCR444, and 
that should be in the newly created intel_hdmi_compute_formats(), 
perhaps it should be after we have tried and failed with RGB444.

(Although I am not sure in what case compute for RGB 444 will fail and 
pass for YCBCR444).

However,this should be a separate patch/series.


Regards,

Ankit


>
> ---
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 6bc1689cbf93..38b9924ebef0 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -1966,6 +1966,8 @@ static bool intel_hdmi_sink_bpc_possible(struct drm_connector *_connector,
>   
>                  if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR420)
>                          return hdmi->y420_dc_modes & DRM_EDID_YCBCR420_DC_36;
> +               else if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR444)
> +                       return info->edid_hdmi_ycbcr444_dc_modes & DRM_EDID_HDMI_DC_36;
>                  else
>                          return info->edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_36;
>          case 10:
> @@ -1974,6 +1976,8 @@ static bool intel_hdmi_sink_bpc_possible(struct drm_connector *_connector,
>   
>                  if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR420)
>                          return hdmi->y420_dc_modes & DRM_EDID_YCBCR420_DC_30;
> +               else if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR444)
> +                       return info->edid_hdmi_ycbcr444_dc_modes & DRM_EDID_HDMI_DC_30;
>                  else
>                          return info->edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_30;
>          case 8:
> @@ -2038,6 +2042,11 @@ intel_hdmi_sink_format_valid(struct intel_connector *connector,
>   
>                  return MODE_OK;
>          case INTEL_OUTPUT_FORMAT_RGB:
> +               return MODE_OK;
> +       case INTEL_OUTPUT_FORMAT_YCBCR444:
> +               if (!(info->color_formats & BIT(DRM_OUTPUT_COLOR_FORMAT_YCBCR444)))
> +                       return MODE_BAD;
> +
>                  return MODE_OK;
>          default:
>                  MISSING_CASE(sink_format);
> ---
>
> It does work for me though at YCBCr 4:4:4 @ 12bpc, 10bpc and 8bpc, so both info
> members this relies on are populated correctly.
>
>> +
>>   static enum drm_mode_status
>>   intel_hdmi_mode_valid(struct drm_connector *_connector,
>>   		      const struct drm_display_mode *mode)
>> @@ -2246,20 +2270,6 @@ static bool intel_hdmi_has_audio(struct intel_encoder *encoder,
>>   		return intel_conn_state->force_audio == HDMI_AUDIO_ON;
>>   }
>>   
>> -static enum intel_output_format
>> -intel_hdmi_sink_format(const struct intel_crtc_state *crtc_state,
>> -		       struct intel_connector *connector,
>> -		       bool ycbcr_420_output)
>> -{
>> -	if (!crtc_state->has_hdmi_sink)
>> -		return INTEL_OUTPUT_FORMAT_RGB;
>> -
>> -	if (connector->base.ycbcr_420_allowed && ycbcr_420_output)
>> -		return INTEL_OUTPUT_FORMAT_YCBCR420;
>> -	else
>> -		return INTEL_OUTPUT_FORMAT_RGB;
>> -}
>> -
>>   static enum intel_output_format
>>   intel_hdmi_output_format(const struct intel_crtc_state *crtc_state)
>>   {
>> @@ -2268,37 +2278,55 @@ intel_hdmi_output_format(const struct intel_crtc_state *crtc_state)
>>   
>>   static int intel_hdmi_compute_output_format(struct intel_encoder *encoder,
>>   					    struct intel_crtc_state *crtc_state,
>> -					    const struct drm_connector_state *conn_state,
>> -					    bool respect_downstream_limits)
>> +					    struct intel_connector *connector,
>> +					    bool respect_downstream_limits,
>> +					    enum intel_output_format sink_format)
>>   {
>> -	struct intel_display *display = to_intel_display(encoder);
>> -	struct intel_connector *connector = to_intel_connector(conn_state->connector);
>>   	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
>> -	const struct drm_display_info *info = &connector->base.display_info;
>> -	bool ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
>> -	int ret;
>>   
>> -	crtc_state->sink_format =
>> -		intel_hdmi_sink_format(crtc_state, connector, ycbcr_420_only);
>> -
>> -	if (ycbcr_420_only && crtc_state->sink_format != INTEL_OUTPUT_FORMAT_YCBCR420) {
>> -		drm_dbg_kms(display->drm,
>> -			    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
>> -		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
>> -	}
>> +	if (intel_hdmi_sink_format_valid(connector, adjusted_mode,
>> +					 crtc_state->has_hdmi_sink, sink_format) != MODE_OK)
>> +		return -EINVAL;
>>   
>> +	crtc_state->sink_format = sink_format;
>>   	crtc_state->output_format = intel_hdmi_output_format(crtc_state);
>> -	ret = intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
>> -	if (ret) {
>> -		if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
>> -		    !crtc_state->has_hdmi_sink ||
>> -		    !connector->base.ycbcr_420_allowed ||
>> -		    !drm_mode_is_420_also(info, adjusted_mode))
>> -			return ret;
>> -
>> -		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
>> -		crtc_state->output_format = intel_hdmi_output_format(crtc_state);
>> -		ret = intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
>> +
>> +	return intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
>> +}
>> +
>> +static int intel_hdmi_compute_formats(struct intel_encoder *encoder,
>> +				      struct intel_crtc_state *crtc_state,
>> +				      const struct drm_connector_state *conn_state,
>> +				      bool respect_downstream_limits)
>> +{
>> +	struct intel_display *display = to_intel_display(encoder);
>> +	struct intel_connector *connector = to_intel_connector(conn_state->connector);
>> +	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
>> +	const struct drm_display_info *info = &connector->base.display_info;
>> +	int ret;
>> +
>> +	if (drm_mode_is_420_only(info, adjusted_mode)) {
>> +		ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
>> +						       respect_downstream_limits,
>> +						       INTEL_OUTPUT_FORMAT_YCBCR420);
>> +
>> +		if (ret) {
>> +			drm_dbg_kms(display->drm,
>> +				    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
>> +
>> +			ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
>> +							       respect_downstream_limits,
>> +							       INTEL_OUTPUT_FORMAT_RGB);
>> +		}
>> +	} else {
>> +		ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
>> +						       respect_downstream_limits,
>> +						       INTEL_OUTPUT_FORMAT_RGB);
>> +
>> +		if (ret && drm_mode_is_420_also(info, adjusted_mode))
>> +			ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
>> +							       respect_downstream_limits,
>> +							       INTEL_OUTPUT_FORMAT_YCBCR420);
>>   	}
>>   
>>   	return ret;
>> @@ -2375,9 +2403,9 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
>>   	 * Try to respect downstream TMDS clock limits first, if
>>   	 * that fails assume the user might know something we don't.
>>   	 */
>> -	ret = intel_hdmi_compute_output_format(encoder, pipe_config, conn_state, true);
>> +	ret = intel_hdmi_compute_formats(encoder, pipe_config, conn_state, true);
>>   	if (ret)
>> -		ret = intel_hdmi_compute_output_format(encoder, pipe_config, conn_state, false);
>> +		ret = intel_hdmi_compute_formats(encoder, pipe_config, conn_state, false);
>>   	if (ret) {
>>   		drm_dbg_kms(display->drm,
>>   			    "unsupported HDMI clock (%d kHz), rejecting mode\n",
>>
>
>
>

Re: [PATCH 2/9] drm/i915/hdmi: Restructure the sink/output format selection

[Nicolas Frattaroli]

On Monday, 6 April 2026 07:26:04 Central European Summer Time Nautiyal, Ankit K wrote:
> On 3/31/2026 5:42 PM, Nicolas Frattaroli wrote:
> > On Tuesday, 31 March 2026 01:53:32 Central European Summer Time Ville Syrjala wrote:
> >> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>
> >> intel_hdmi_compute_output_format() is a bit of a mess. Try to
> >> restructure it into a more readable form.
> >>
> >> Right now we basically have two main code paths:
> >> - YCbCr 4:2:0 only modes
> >> - everything else including YCbCr 4:2:0 also modes
> >>
> >> Those two basically do the same two steps (try 4:2:0 and try 4:4:4)
> >> but in opposite orders. Let's write that out in a more explicit
> >> if-else form. And since I'm running out of function names I'll
> >> rename the function with that high level logic into
> >> intel_hdmi_compute_formats() and it will call (the new) with
> >> intel_hdmi_compute_output_format() with an explicit sink_format
> >> as needed.
> >>
> >> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> >> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >> ---
> >>   drivers/gpu/drm/i915/display/intel_hdmi.c | 112 ++++++++++++++--------
> >>   1 file changed, 70 insertions(+), 42 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> >> index 072b0554cc24..16873fc7bcb9 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> >> @@ -2021,6 +2021,30 @@ intel_hdmi_mode_clock_valid(struct drm_connector *_connector, int clock,
> >>   	return status;
> >>   }
> >>   
> >> +static enum drm_mode_status
> >> +intel_hdmi_sink_format_valid(struct intel_connector *connector,
> >> +			     const struct drm_display_mode *mode,
> >> +			     bool has_hdmi_sink,
> >> +			     enum intel_output_format sink_format)
> >> +{
> >> +	const struct drm_display_info *info = &connector->base.display_info;
> >> +
> >> +	switch (sink_format) {
> >> +	case INTEL_OUTPUT_FORMAT_YCBCR420:
> >> +		if (!has_hdmi_sink ||
> >> +		    !connector->base.ycbcr_420_allowed ||
> >> +		    !drm_mode_is_420(info, mode))
> >> +			return MODE_NO_420;
> >> +
> >> +		return MODE_OK;
> >> +	case INTEL_OUTPUT_FORMAT_RGB:
> >> +		return MODE_OK;
> >> +	default:
> >> +		MISSING_CASE(sink_format);
> >> +		return MODE_BAD;
> >> +	}
> >> +}
> > I think this here is missing INTEL_OUTPUT_FORMAT_YCBCR444 as a case.
> > The following diff adding it for both intel_hdmi_sink_format_valid
> > and intel_hdmi_sink_bpc_possible that I quickly whipped up may be the
> > way to go, but I'm unsure about the interaction between the two:
> 
> Hmm.. Trying YCBCR444 format, is not yet implemented.
> 
> We need to have a well defined policy as to when to use YCBCR444, and 
> that should be in the newly created intel_hdmi_compute_formats(), 
> perhaps it should be after we have tried and failed with RGB444.
> 
> (Although I am not sure in what case compute for RGB 444 will fail and 
> pass for YCBCR444).
> 
> However,this should be a separate patch/series.

Makes sense. Instead of defining this policy for automatic selection,
I'll add the necessary code to handle it in my color format series,
where such an output format can be explicitly requested through a DRM
property. I don't think using it as a fallback in automatic selection
makes any sense: it saves no bandwidth over RGB444 and I'm pretty sure
HDMI mandates that anything supported in YCBCR444 is also supported in
RGB444.

Kind regards,
Nicolas Frattaroli

> 
> 
> Regards,
> 
> Ankit
> 
> 
> > [... snip ...]

Re: [PATCH 2/9] drm/i915/hdmi: Restructure the sink/output format selection

[Nautiyal, Ankit K]

On 3/31/2026 5:23 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> intel_hdmi_compute_output_format() is a bit of a mess. Try to
> restructure it into a more readable form.
>
> Right now we basically have two main code paths:
> - YCbCr 4:2:0 only modes
> - everything else including YCbCr 4:2:0 also modes
>
> Those two basically do the same two steps (try 4:2:0 and try 4:4:4)
> but in opposite orders. Let's write that out in a more explicit
> if-else form. And since I'm running out of function names I'll
> rename the function with that high level logic into
> intel_hdmi_compute_formats() and it will call (the new) with

Nitpick : Extra 'with'.

Apart from above, the change looks good to me.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


Regards,

Ankit

> intel_hdmi_compute_output_format() with an explicit sink_format
> as needed.
>
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_hdmi.c | 112 ++++++++++++++--------
>   1 file changed, 70 insertions(+), 42 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 072b0554cc24..16873fc7bcb9 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2021,6 +2021,30 @@ intel_hdmi_mode_clock_valid(struct drm_connector *_connector, int clock,
>   	return status;
>   }
>   
> +static enum drm_mode_status
> +intel_hdmi_sink_format_valid(struct intel_connector *connector,
> +			     const struct drm_display_mode *mode,
> +			     bool has_hdmi_sink,
> +			     enum intel_output_format sink_format)
> +{
> +	const struct drm_display_info *info = &connector->base.display_info;
> +
> +	switch (sink_format) {
> +	case INTEL_OUTPUT_FORMAT_YCBCR420:
> +		if (!has_hdmi_sink ||
> +		    !connector->base.ycbcr_420_allowed ||
> +		    !drm_mode_is_420(info, mode))
> +			return MODE_NO_420;
> +
> +		return MODE_OK;
> +	case INTEL_OUTPUT_FORMAT_RGB:
> +		return MODE_OK;
> +	default:
> +		MISSING_CASE(sink_format);
> +		return MODE_BAD;
> +	}
> +}
> +
>   static enum drm_mode_status
>   intel_hdmi_mode_valid(struct drm_connector *_connector,
>   		      const struct drm_display_mode *mode)
> @@ -2246,20 +2270,6 @@ static bool intel_hdmi_has_audio(struct intel_encoder *encoder,
>   		return intel_conn_state->force_audio == HDMI_AUDIO_ON;
>   }
>   
> -static enum intel_output_format
> -intel_hdmi_sink_format(const struct intel_crtc_state *crtc_state,
> -		       struct intel_connector *connector,
> -		       bool ycbcr_420_output)
> -{
> -	if (!crtc_state->has_hdmi_sink)
> -		return INTEL_OUTPUT_FORMAT_RGB;
> -
> -	if (connector->base.ycbcr_420_allowed && ycbcr_420_output)
> -		return INTEL_OUTPUT_FORMAT_YCBCR420;
> -	else
> -		return INTEL_OUTPUT_FORMAT_RGB;
> -}
> -
>   static enum intel_output_format
>   intel_hdmi_output_format(const struct intel_crtc_state *crtc_state)
>   {
> @@ -2268,37 +2278,55 @@ intel_hdmi_output_format(const struct intel_crtc_state *crtc_state)
>   
>   static int intel_hdmi_compute_output_format(struct intel_encoder *encoder,
>   					    struct intel_crtc_state *crtc_state,
> -					    const struct drm_connector_state *conn_state,
> -					    bool respect_downstream_limits)
> +					    struct intel_connector *connector,
> +					    bool respect_downstream_limits,
> +					    enum intel_output_format sink_format)
>   {
> -	struct intel_display *display = to_intel_display(encoder);
> -	struct intel_connector *connector = to_intel_connector(conn_state->connector);
>   	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> -	const struct drm_display_info *info = &connector->base.display_info;
> -	bool ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
> -	int ret;
>   
> -	crtc_state->sink_format =
> -		intel_hdmi_sink_format(crtc_state, connector, ycbcr_420_only);
> -
> -	if (ycbcr_420_only && crtc_state->sink_format != INTEL_OUTPUT_FORMAT_YCBCR420) {
> -		drm_dbg_kms(display->drm,
> -			    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
> -		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
> -	}
> +	if (intel_hdmi_sink_format_valid(connector, adjusted_mode,
> +					 crtc_state->has_hdmi_sink, sink_format) != MODE_OK)
> +		return -EINVAL;
>   
> +	crtc_state->sink_format = sink_format;
>   	crtc_state->output_format = intel_hdmi_output_format(crtc_state);
> -	ret = intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
> -	if (ret) {
> -		if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
> -		    !crtc_state->has_hdmi_sink ||
> -		    !connector->base.ycbcr_420_allowed ||
> -		    !drm_mode_is_420_also(info, adjusted_mode))
> -			return ret;
> -
> -		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> -		crtc_state->output_format = intel_hdmi_output_format(crtc_state);
> -		ret = intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
> +
> +	return intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
> +}
> +
> +static int intel_hdmi_compute_formats(struct intel_encoder *encoder,
> +				      struct intel_crtc_state *crtc_state,
> +				      const struct drm_connector_state *conn_state,
> +				      bool respect_downstream_limits)
> +{
> +	struct intel_display *display = to_intel_display(encoder);
> +	struct intel_connector *connector = to_intel_connector(conn_state->connector);
> +	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> +	const struct drm_display_info *info = &connector->base.display_info;
> +	int ret;
> +
> +	if (drm_mode_is_420_only(info, adjusted_mode)) {
> +		ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
> +						       respect_downstream_limits,
> +						       INTEL_OUTPUT_FORMAT_YCBCR420);
> +
> +		if (ret) {
> +			drm_dbg_kms(display->drm,
> +				    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
> +
> +			ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
> +							       respect_downstream_limits,
> +							       INTEL_OUTPUT_FORMAT_RGB);
> +		}
> +	} else {
> +		ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
> +						       respect_downstream_limits,
> +						       INTEL_OUTPUT_FORMAT_RGB);
> +
> +		if (ret && drm_mode_is_420_also(info, adjusted_mode))
> +			ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
> +							       respect_downstream_limits,
> +							       INTEL_OUTPUT_FORMAT_YCBCR420);
>   	}
>   
>   	return ret;
> @@ -2375,9 +2403,9 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
>   	 * Try to respect downstream TMDS clock limits first, if
>   	 * that fails assume the user might know something we don't.
>   	 */
> -	ret = intel_hdmi_compute_output_format(encoder, pipe_config, conn_state, true);
> +	ret = intel_hdmi_compute_formats(encoder, pipe_config, conn_state, true);
>   	if (ret)
> -		ret = intel_hdmi_compute_output_format(encoder, pipe_config, conn_state, false);
> +		ret = intel_hdmi_compute_formats(encoder, pipe_config, conn_state, false);
>   	if (ret) {
>   		drm_dbg_kms(display->drm,
>   			    "unsupported HDMI clock (%d kHz), rejecting mode\n",

[PATCH 3/9] drm/i915/hdmi: Restructure 4:2:0 vs. 4:4:4 mode validation

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Restructure the HDMI mode validation to resemble the new
intel_hdmi_compute_formats(). Keeping the two in sync helps
to avoid different bugs in each.

The main difference between mode_valid() and
intel_hdmi_compute_formats() is that we don't want the
Hail Mary RGB fallback for "4:2:0 only" modes.

Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c | 60 ++++++++++++-----------
 1 file changed, 32 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 16873fc7bcb9..95bd38c620d1 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2045,6 +2045,27 @@ intel_hdmi_sink_format_valid(struct intel_connector *connector,
 	}
 }
 
+static enum drm_mode_status
+intel_hdmi_mode_valid_format(struct intel_connector *connector,
+			     const struct drm_display_mode *mode,
+			     int clock, bool has_hdmi_sink,
+			     enum intel_output_format sink_format)
+{
+	struct intel_display *display = to_intel_display(connector);
+	enum drm_mode_status status;
+
+	status = intel_hdmi_sink_format_valid(connector, mode,
+					      has_hdmi_sink, sink_format);
+	if (status != MODE_OK)
+		return status;
+
+	status = intel_pfit_mode_valid(display, mode, sink_format, 0);
+	if (status != MODE_OK)
+		return status;
+
+	return intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink, sink_format);
+}
+
 static enum drm_mode_status
 intel_hdmi_mode_valid(struct drm_connector *_connector,
 		      const struct drm_display_mode *mode)
@@ -2052,12 +2073,11 @@ intel_hdmi_mode_valid(struct drm_connector *_connector,
 	struct intel_connector *connector = to_intel_connector(_connector);
 	struct intel_display *display = to_intel_display(connector);
 	struct intel_hdmi *hdmi = intel_attached_hdmi(connector);
+	const struct drm_display_info *info = &connector->base.display_info;
 	enum drm_mode_status status;
 	int clock = mode->clock;
 	int max_dotclk = display->cdclk.max_dotclk_freq;
 	bool has_hdmi_sink = intel_has_hdmi_sink(hdmi, connector->base.state);
-	bool ycbcr_420_only;
-	enum intel_output_format sink_format;
 
 	status = intel_cpu_transcoder_mode_valid(display, mode);
 	if (status != MODE_OK)
@@ -2084,36 +2104,20 @@ intel_hdmi_mode_valid(struct drm_connector *_connector,
 	if (clock > 600000)
 		return MODE_CLOCK_HIGH;
 
-	ycbcr_420_only = drm_mode_is_420_only(&connector->base.display_info, mode);
+	if (drm_mode_is_420_only(info, mode)) {
+		status = intel_hdmi_mode_valid_format(connector, mode, clock, has_hdmi_sink,
+						      INTEL_OUTPUT_FORMAT_YCBCR420);
+	} else {
+		status = intel_hdmi_mode_valid_format(connector, mode, clock, has_hdmi_sink,
+						      INTEL_OUTPUT_FORMAT_RGB);
 
-	if (ycbcr_420_only)
-		sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
-	else
-		sink_format = INTEL_OUTPUT_FORMAT_RGB;
-
-	status = intel_pfit_mode_valid(display, mode, sink_format, 0);
+		if (status != MODE_OK && drm_mode_is_420_also(info, mode))
+			status = intel_hdmi_mode_valid_format(connector, mode, clock, has_hdmi_sink,
+							      INTEL_OUTPUT_FORMAT_YCBCR420);
+	}
 	if (status != MODE_OK)
 		return status;
 
-	status = intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink, sink_format);
-	if (status != MODE_OK) {
-		if (ycbcr_420_only ||
-		    !connector->base.ycbcr_420_allowed ||
-		    !drm_mode_is_420_also(&connector->base.display_info, mode))
-			return status;
-
-		sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
-
-		status = intel_pfit_mode_valid(display, mode, sink_format, 0);
-		if (status != MODE_OK)
-			return status;
-
-		status = intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink,
-						     sink_format);
-		if (status != MODE_OK)
-			return status;
-	}
-
 	return intel_mode_valid_max_plane_size(display, mode, 1);
 }
 
-- 
2.52.0

Re: [PATCH 3/9] drm/i915/hdmi: Restructure 4:2:0 vs. 4:4:4 mode validation

[Nautiyal, Ankit K]

On 3/31/2026 5:23 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Restructure the HDMI mode validation to resemble the new
> intel_hdmi_compute_formats(). Keeping the two in sync helps
> to avoid different bugs in each.
>
> The main difference between mode_valid() and
> intel_hdmi_compute_formats() is that we don't want the
> Hail Mary RGB fallback for "4:2:0 only" modes.
>
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


> ---
>   drivers/gpu/drm/i915/display/intel_hdmi.c | 60 ++++++++++++-----------
>   1 file changed, 32 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 16873fc7bcb9..95bd38c620d1 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2045,6 +2045,27 @@ intel_hdmi_sink_format_valid(struct intel_connector *connector,
>   	}
>   }
>   
> +static enum drm_mode_status
> +intel_hdmi_mode_valid_format(struct intel_connector *connector,
> +			     const struct drm_display_mode *mode,
> +			     int clock, bool has_hdmi_sink,
> +			     enum intel_output_format sink_format)
> +{
> +	struct intel_display *display = to_intel_display(connector);
> +	enum drm_mode_status status;
> +
> +	status = intel_hdmi_sink_format_valid(connector, mode,
> +					      has_hdmi_sink, sink_format);
> +	if (status != MODE_OK)
> +		return status;
> +
> +	status = intel_pfit_mode_valid(display, mode, sink_format, 0);
> +	if (status != MODE_OK)
> +		return status;
> +
> +	return intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink, sink_format);
> +}
> +
>   static enum drm_mode_status
>   intel_hdmi_mode_valid(struct drm_connector *_connector,
>   		      const struct drm_display_mode *mode)
> @@ -2052,12 +2073,11 @@ intel_hdmi_mode_valid(struct drm_connector *_connector,
>   	struct intel_connector *connector = to_intel_connector(_connector);
>   	struct intel_display *display = to_intel_display(connector);
>   	struct intel_hdmi *hdmi = intel_attached_hdmi(connector);
> +	const struct drm_display_info *info = &connector->base.display_info;
>   	enum drm_mode_status status;
>   	int clock = mode->clock;
>   	int max_dotclk = display->cdclk.max_dotclk_freq;
>   	bool has_hdmi_sink = intel_has_hdmi_sink(hdmi, connector->base.state);
> -	bool ycbcr_420_only;
> -	enum intel_output_format sink_format;
>   
>   	status = intel_cpu_transcoder_mode_valid(display, mode);
>   	if (status != MODE_OK)
> @@ -2084,36 +2104,20 @@ intel_hdmi_mode_valid(struct drm_connector *_connector,
>   	if (clock > 600000)
>   		return MODE_CLOCK_HIGH;
>   
> -	ycbcr_420_only = drm_mode_is_420_only(&connector->base.display_info, mode);
> +	if (drm_mode_is_420_only(info, mode)) {
> +		status = intel_hdmi_mode_valid_format(connector, mode, clock, has_hdmi_sink,
> +						      INTEL_OUTPUT_FORMAT_YCBCR420);
> +	} else {
> +		status = intel_hdmi_mode_valid_format(connector, mode, clock, has_hdmi_sink,
> +						      INTEL_OUTPUT_FORMAT_RGB);
>   
> -	if (ycbcr_420_only)
> -		sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> -	else
> -		sink_format = INTEL_OUTPUT_FORMAT_RGB;
> -
> -	status = intel_pfit_mode_valid(display, mode, sink_format, 0);
> +		if (status != MODE_OK && drm_mode_is_420_also(info, mode))
> +			status = intel_hdmi_mode_valid_format(connector, mode, clock, has_hdmi_sink,
> +							      INTEL_OUTPUT_FORMAT_YCBCR420);
> +	}
>   	if (status != MODE_OK)
>   		return status;
>   
> -	status = intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink, sink_format);
> -	if (status != MODE_OK) {
> -		if (ycbcr_420_only ||
> -		    !connector->base.ycbcr_420_allowed ||
> -		    !drm_mode_is_420_also(&connector->base.display_info, mode))
> -			return status;
> -
> -		sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> -
> -		status = intel_pfit_mode_valid(display, mode, sink_format, 0);
> -		if (status != MODE_OK)
> -			return status;
> -
> -		status = intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink,
> -						     sink_format);
> -		if (status != MODE_OK)
> -			return status;
> -	}
> -
>   	return intel_mode_valid_max_plane_size(display, mode, 1);
>   }
>   

[PATCH 4/9] drm/i915/dp: Restructure the sink/output format selection

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Restructure intel_dp_compute_output_format() to resemble the new
intel_hdmi_compute_output_formats().

Again, we basically have two main code paths:
- YCbCr 4:2:0 only modes
- everything else including YCbCr 4:2:0 also modes

Take the exact same approach with the DP code, making the
format selection much less convoluted.

Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 98 +++++++++++++++++--------
 1 file changed, 69 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 4955bd8b11d7..230b45acde29 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1371,6 +1371,28 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
 	return MODE_OK;
 }
 
+static enum drm_mode_status
+intel_dp_sink_format_valid(struct intel_connector *connector,
+			   const struct drm_display_mode *mode,
+			   enum intel_output_format sink_format)
+{
+	const struct drm_display_info *info = &connector->base.display_info;
+
+	switch (sink_format) {
+	case INTEL_OUTPUT_FORMAT_YCBCR420:
+		if (!connector->base.ycbcr_420_allowed ||
+		    !drm_mode_is_420(info, mode))
+			return MODE_NO_420;
+
+		return MODE_OK;
+	case INTEL_OUTPUT_FORMAT_RGB:
+		return MODE_OK;
+	default:
+		MISSING_CASE(sink_format);
+		return MODE_BAD;
+	}
+}
+
 int intel_dp_max_hdisplay_per_pipe(struct intel_display *display)
 {
 	return DISPLAY_VER(display) >= 30 ? 6144 : 5120;
@@ -3330,41 +3352,59 @@ static int
 intel_dp_compute_output_format(struct intel_encoder *encoder,
 			       struct intel_crtc_state *crtc_state,
 			       struct drm_connector_state *conn_state,
-			       bool respect_downstream_limits)
+			       bool respect_downstream_limits,
+			       enum intel_output_format sink_format)
 {
-	struct intel_display *display = to_intel_display(encoder);
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 	struct intel_connector *connector = intel_dp->attached_connector;
-	const struct drm_display_info *info = &connector->base.display_info;
 	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
-	bool ycbcr_420_only;
-	int ret;
 
-	ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
-
-	if (ycbcr_420_only && !connector->base.ycbcr_420_allowed) {
-		drm_dbg_kms(display->drm,
-			    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
-		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
-	} else {
-		crtc_state->sink_format = intel_dp_sink_format(connector, adjusted_mode);
-	}
+	if (intel_dp_sink_format_valid(connector, adjusted_mode,
+				       sink_format) != MODE_OK)
+		return -EINVAL;
 
+	crtc_state->sink_format = sink_format;
 	crtc_state->output_format = intel_dp_output_format(connector, crtc_state->sink_format);
 
-	ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
-					   respect_downstream_limits);
-	if (ret) {
-		if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
-		    !connector->base.ycbcr_420_allowed ||
-		    !drm_mode_is_420_also(info, adjusted_mode))
-			return ret;
-
-		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
-		crtc_state->output_format = intel_dp_output_format(connector,
-								   crtc_state->sink_format);
-		ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
-						   respect_downstream_limits);
+	return intel_dp_compute_link_config(encoder, crtc_state, conn_state,
+					    respect_downstream_limits);
+}
+
+static int
+intel_dp_compute_formats(struct intel_encoder *encoder,
+			 struct intel_crtc_state *crtc_state,
+			 struct drm_connector_state *conn_state,
+			 bool respect_downstream_limits)
+{
+	struct intel_display *display = to_intel_display(encoder);
+	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+	struct intel_connector *connector = intel_dp->attached_connector;
+	const struct drm_display_info *info = &connector->base.display_info;
+	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+	int ret;
+
+	if (drm_mode_is_420_only(info, adjusted_mode)) {
+		ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
+						     respect_downstream_limits,
+						     INTEL_OUTPUT_FORMAT_YCBCR420);
+
+		if (ret) {
+			drm_dbg_kms(display->drm,
+				    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
+
+			ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
+							     respect_downstream_limits,
+							     INTEL_OUTPUT_FORMAT_RGB);
+		}
+	} else {
+		ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
+						     respect_downstream_limits,
+						     INTEL_OUTPUT_FORMAT_RGB);
+
+		if (ret && drm_mode_is_420_also(info, adjusted_mode))
+			ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
+							     respect_downstream_limits,
+							     INTEL_OUTPUT_FORMAT_YCBCR420);
 	}
 
 	return ret;
@@ -3539,9 +3579,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 	 * Try to respect downstream TMDS clock limits first, if
 	 * that fails assume the user might know something we don't.
 	 */
-	ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state, true);
+	ret = intel_dp_compute_formats(encoder, pipe_config, conn_state, true);
 	if (ret)
-		ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state, false);
+		ret = intel_dp_compute_formats(encoder, pipe_config, conn_state, false);
 	if (ret)
 		return ret;
 
-- 
2.52.0

Re: [PATCH 4/9] drm/i915/dp: Restructure the sink/output format selection

[Nicolas Frattaroli]

On Tuesday, 31 March 2026 01:53:34 Central European Summer Time Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Restructure intel_dp_compute_output_format() to resemble the new
> intel_hdmi_compute_output_formats().
> 
> Again, we basically have two main code paths:
> - YCbCr 4:2:0 only modes
> - everything else including YCbCr 4:2:0 also modes
> 
> Take the exact same approach with the DP code, making the
> format selection much less convoluted.
> 
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 98 +++++++++++++++++--------
>  1 file changed, 69 insertions(+), 29 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 4955bd8b11d7..230b45acde29 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1371,6 +1371,28 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
>  	return MODE_OK;
>  }
>  
> +static enum drm_mode_status
> +intel_dp_sink_format_valid(struct intel_connector *connector,
> +			   const struct drm_display_mode *mode,
> +			   enum intel_output_format sink_format)
> +{
> +	const struct drm_display_info *info = &connector->base.display_info;
> +
> +	switch (sink_format) {
> +	case INTEL_OUTPUT_FORMAT_YCBCR420:
> +		if (!connector->base.ycbcr_420_allowed ||
> +		    !drm_mode_is_420(info, mode))
> +			return MODE_NO_420;
> +
> +		return MODE_OK;
> +	case INTEL_OUTPUT_FORMAT_RGB:
> +		return MODE_OK;
> +	default:
> +		MISSING_CASE(sink_format);
> +		return MODE_BAD;
> +	}
> +}
> +

I think here we'll want another
---
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index e23162fc3f8b..a1dc089c54f5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1373,6 +1373,11 @@ intel_dp_sink_format_valid(struct intel_connector *connector,
 
                return MODE_OK;
        case INTEL_OUTPUT_FORMAT_RGB:
+               return MODE_OK;
+       case INTEL_OUTPUT_FORMAT_YCBCR444:
+               if (!(info->color_formats & BIT(DRM_OUTPUT_COLOR_FORMAT_YCBCR444)))
+                       return MODE_BAD;
+
                return MODE_OK;
        default:
                MISSING_CASE(sink_format);
---

though this time, no bpc related changes. With that fixed, I get
YCbCr444 at 10bpc as well as 8bpc. Can't test 4:2:0 for what appears
to be unrelated userspace reasons, though the KMS property's enum
value is exposed properly.

>  int intel_dp_max_hdisplay_per_pipe(struct intel_display *display)
>  {
>  	return DISPLAY_VER(display) >= 30 ? 6144 : 5120;
> @@ -3330,41 +3352,59 @@ static int
>  intel_dp_compute_output_format(struct intel_encoder *encoder,
>  			       struct intel_crtc_state *crtc_state,
>  			       struct drm_connector_state *conn_state,
> -			       bool respect_downstream_limits)
> +			       bool respect_downstream_limits,
> +			       enum intel_output_format sink_format)
>  {
> -	struct intel_display *display = to_intel_display(encoder);
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  	struct intel_connector *connector = intel_dp->attached_connector;
> -	const struct drm_display_info *info = &connector->base.display_info;
>  	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> -	bool ycbcr_420_only;
> -	int ret;
>  
> -	ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
> -
> -	if (ycbcr_420_only && !connector->base.ycbcr_420_allowed) {
> -		drm_dbg_kms(display->drm,
> -			    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
> -		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
> -	} else {
> -		crtc_state->sink_format = intel_dp_sink_format(connector, adjusted_mode);
> -	}
> +	if (intel_dp_sink_format_valid(connector, adjusted_mode,
> +				       sink_format) != MODE_OK)
> +		return -EINVAL;
>  
> +	crtc_state->sink_format = sink_format;
>  	crtc_state->output_format = intel_dp_output_format(connector, crtc_state->sink_format);
>  
> -	ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> -					   respect_downstream_limits);
> -	if (ret) {
> -		if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
> -		    !connector->base.ycbcr_420_allowed ||
> -		    !drm_mode_is_420_also(info, adjusted_mode))
> -			return ret;
> -
> -		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> -		crtc_state->output_format = intel_dp_output_format(connector,
> -								   crtc_state->sink_format);
> -		ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> -						   respect_downstream_limits);
> +	return intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> +					    respect_downstream_limits);

With the removal of intel_dp_sink_format in this function, I wonder
if we can get rid of it entirely now. It's only called in
intel_dp_mode_min_link_bpp_x16, which seems to be used for bandwidth
limitation calculations (where YCbCr444 vs RGB444 doesn't matter, so
we're fine in that regard).

Judging by the "min" in the function name, I assume it should be
using INTEL_OUTPUT_FORMAT_YCBCR420 in drm_mode_is_420_also cases,
whereas right now it only gets this from intel_dp_sink_format if
the mode is drm_mode_is_420_only. So I think removing
intel_dp_sink_format entirely as a follow-up, and folding a
corrected minimum bandwidth computation that uses 420 if
drm_mode_is_420 into intel_dp_mode_min_link_bpp_x16 would make
sense, unless I'm totally misunderstanding the code here.

> +}
> +
> +static int
> +intel_dp_compute_formats(struct intel_encoder *encoder,
> +			 struct intel_crtc_state *crtc_state,
> +			 struct drm_connector_state *conn_state,
> +			 bool respect_downstream_limits)
> +{
> +	struct intel_display *display = to_intel_display(encoder);
> +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> +	struct intel_connector *connector = intel_dp->attached_connector;
> +	const struct drm_display_info *info = &connector->base.display_info;
> +	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> +	int ret;
> +
> +	if (drm_mode_is_420_only(info, adjusted_mode)) {
> +		ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
> +						     respect_downstream_limits,
> +						     INTEL_OUTPUT_FORMAT_YCBCR420);
> +
> +		if (ret) {
> +			drm_dbg_kms(display->drm,
> +				    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
> +
> +			ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
> +							     respect_downstream_limits,
> +							     INTEL_OUTPUT_FORMAT_RGB);
> +		}
> +	} else {
> +		ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
> +						     respect_downstream_limits,
> +						     INTEL_OUTPUT_FORMAT_RGB);
> +
> +		if (ret && drm_mode_is_420_also(info, adjusted_mode))
> +			ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
> +							     respect_downstream_limits,
> +							     INTEL_OUTPUT_FORMAT_YCBCR420);
>  	}
>  
>  	return ret;
> @@ -3539,9 +3579,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  	 * Try to respect downstream TMDS clock limits first, if
>  	 * that fails assume the user might know something we don't.
>  	 */
> -	ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state, true);
> +	ret = intel_dp_compute_formats(encoder, pipe_config, conn_state, true);
>  	if (ret)
> -		ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state, false);
> +		ret = intel_dp_compute_formats(encoder, pipe_config, conn_state, false);
>  	if (ret)
>  		return ret;
>  
> 

Re: [PATCH 4/9] drm/i915/dp: Restructure the sink/output format selection

[Nautiyal, Ankit K]

On 3/31/2026 7:05 PM, Nicolas Frattaroli wrote:
> On Tuesday, 31 March 2026 01:53:34 Central European Summer Time Ville Syrjala wrote:
>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>
>> Restructure intel_dp_compute_output_format() to resemble the new
>> intel_hdmi_compute_output_formats().
>>
>> Again, we basically have two main code paths:
>> - YCbCr 4:2:0 only modes
>> - everything else including YCbCr 4:2:0 also modes
>>
>> Take the exact same approach with the DP code, making the
>> format selection much less convoluted.
>>
>> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
>> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_dp.c | 98 +++++++++++++++++--------
>>   1 file changed, 69 insertions(+), 29 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 4955bd8b11d7..230b45acde29 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -1371,6 +1371,28 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
>>   	return MODE_OK;
>>   }
>>   
>> +static enum drm_mode_status
>> +intel_dp_sink_format_valid(struct intel_connector *connector,
>> +			   const struct drm_display_mode *mode,
>> +			   enum intel_output_format sink_format)
>> +{
>> +	const struct drm_display_info *info = &connector->base.display_info;
>> +
>> +	switch (sink_format) {
>> +	case INTEL_OUTPUT_FORMAT_YCBCR420:
>> +		if (!connector->base.ycbcr_420_allowed ||
>> +		    !drm_mode_is_420(info, mode))
>> +			return MODE_NO_420;
>> +
>> +		return MODE_OK;
>> +	case INTEL_OUTPUT_FORMAT_RGB:
>> +		return MODE_OK;
>> +	default:
>> +		MISSING_CASE(sink_format);
>> +		return MODE_BAD;
>> +	}
>> +}
>> +
> I think here we'll want another
> ---
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index e23162fc3f8b..a1dc089c54f5 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1373,6 +1373,11 @@ intel_dp_sink_format_valid(struct intel_connector *connector,
>   
>                  return MODE_OK;
>          case INTEL_OUTPUT_FORMAT_RGB:
> +               return MODE_OK;
> +       case INTEL_OUTPUT_FORMAT_YCBCR444:
> +               if (!(info->color_formats & BIT(DRM_OUTPUT_COLOR_FORMAT_YCBCR444)))
> +                       return MODE_BAD;
> +
>                  return MODE_OK;
>          default:
>                  MISSING_CASE(sink_format);
> ---
>
> though this time, no bpc related changes. With that fixed, I get
> YCbCr444 at 10bpc as well as 8bpc. Can't test 4:2:0 for what appears
> to be unrelated userspace reasons, though the KMS property's enum
> value is exposed properly.


Hmm... this alone should not be sufficient till we actually have code to 
try with YCBCR444 in intel_dp_compute_formats().


>
>>   int intel_dp_max_hdisplay_per_pipe(struct intel_display *display)
>>   {
>>   	return DISPLAY_VER(display) >= 30 ? 6144 : 5120;
>> @@ -3330,41 +3352,59 @@ static int
>>   intel_dp_compute_output_format(struct intel_encoder *encoder,
>>   			       struct intel_crtc_state *crtc_state,
>>   			       struct drm_connector_state *conn_state,
>> -			       bool respect_downstream_limits)
>> +			       bool respect_downstream_limits,
>> +			       enum intel_output_format sink_format)
>>   {
>> -	struct intel_display *display = to_intel_display(encoder);
>>   	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>>   	struct intel_connector *connector = intel_dp->attached_connector;
>> -	const struct drm_display_info *info = &connector->base.display_info;
>>   	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
>> -	bool ycbcr_420_only;
>> -	int ret;
>>   
>> -	ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
>> -
>> -	if (ycbcr_420_only && !connector->base.ycbcr_420_allowed) {
>> -		drm_dbg_kms(display->drm,
>> -			    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
>> -		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
>> -	} else {
>> -		crtc_state->sink_format = intel_dp_sink_format(connector, adjusted_mode);
>> -	}
>> +	if (intel_dp_sink_format_valid(connector, adjusted_mode,
>> +				       sink_format) != MODE_OK)
>> +		return -EINVAL;
>>   
>> +	crtc_state->sink_format = sink_format;
>>   	crtc_state->output_format = intel_dp_output_format(connector, crtc_state->sink_format);
>>   
>> -	ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
>> -					   respect_downstream_limits);
>> -	if (ret) {
>> -		if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
>> -		    !connector->base.ycbcr_420_allowed ||
>> -		    !drm_mode_is_420_also(info, adjusted_mode))
>> -			return ret;
>> -
>> -		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
>> -		crtc_state->output_format = intel_dp_output_format(connector,
>> -								   crtc_state->sink_format);
>> -		ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
>> -						   respect_downstream_limits);
>> +	return intel_dp_compute_link_config(encoder, crtc_state, conn_state,
>> +					    respect_downstream_limits);
> With the removal of intel_dp_sink_format in this function, I wonder
> if we can get rid of it entirely now. It's only called in
> intel_dp_mode_min_link_bpp_x16, which seems to be used for bandwidth
> limitation calculations (where YCbCr444 vs RGB444 doesn't matter, so
> we're fine in that regard).

I agree we can remove intel_dp_sink_format() but IMO it should be after 
patch#7 where we are validating sink format for mode valid.

I guess, with that change, intel_dp_mode_min_link_bpp_x16() can be 
passed the sink_format directly since we have already validated that.


Regards,

Ankit


>
> Judging by the "min" in the function name, I assume it should be
> using INTEL_OUTPUT_FORMAT_YCBCR420 in drm_mode_is_420_also cases,
> whereas right now it only gets this from intel_dp_sink_format if
> the mode is drm_mode_is_420_only. So I think removing
> intel_dp_sink_format entirely as a follow-up, and folding a
> corrected minimum bandwidth computation that uses 420 if
> drm_mode_is_420 into intel_dp_mode_min_link_bpp_x16 would make
> sense, unless I'm totally misunderstanding the code here.
>
>> +}
>> +
>> +static int
>> +intel_dp_compute_formats(struct intel_encoder *encoder,
>> +			 struct intel_crtc_state *crtc_state,
>> +			 struct drm_connector_state *conn_state,
>> +			 bool respect_downstream_limits)
>> +{
>> +	struct intel_display *display = to_intel_display(encoder);
>> +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>> +	struct intel_connector *connector = intel_dp->attached_connector;
>> +	const struct drm_display_info *info = &connector->base.display_info;
>> +	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
>> +	int ret;
>> +
>> +	if (drm_mode_is_420_only(info, adjusted_mode)) {
>> +		ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
>> +						     respect_downstream_limits,
>> +						     INTEL_OUTPUT_FORMAT_YCBCR420);
>> +
>> +		if (ret) {
>> +			drm_dbg_kms(display->drm,
>> +				    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
>> +
>> +			ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
>> +							     respect_downstream_limits,
>> +							     INTEL_OUTPUT_FORMAT_RGB);
>> +		}
>> +	} else {
>> +		ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
>> +						     respect_downstream_limits,
>> +						     INTEL_OUTPUT_FORMAT_RGB);
>> +
>> +		if (ret && drm_mode_is_420_also(info, adjusted_mode))
>> +			ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
>> +							     respect_downstream_limits,
>> +							     INTEL_OUTPUT_FORMAT_YCBCR420);
>>   	}
>>   
>>   	return ret;
>> @@ -3539,9 +3579,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>>   	 * Try to respect downstream TMDS clock limits first, if
>>   	 * that fails assume the user might know something we don't.
>>   	 */
>> -	ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state, true);
>> +	ret = intel_dp_compute_formats(encoder, pipe_config, conn_state, true);
>>   	if (ret)
>> -		ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state, false);
>> +		ret = intel_dp_compute_formats(encoder, pipe_config, conn_state, false);
>>   	if (ret)
>>   		return ret;
>>   
>>
>
>
>

Re: [PATCH 4/9] drm/i915/dp: Restructure the sink/output format selection

[Ville Syrjälä]

On Mon, Apr 06, 2026 at 11:02:03AM +0530, Nautiyal, Ankit K wrote:
> 
> On 3/31/2026 7:05 PM, Nicolas Frattaroli wrote:
> > On Tuesday, 31 March 2026 01:53:34 Central European Summer Time Ville Syrjala wrote:
> >> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>
> >> Restructure intel_dp_compute_output_format() to resemble the new
> >> intel_hdmi_compute_output_formats().
> >>
> >> Again, we basically have two main code paths:
> >> - YCbCr 4:2:0 only modes
> >> - everything else including YCbCr 4:2:0 also modes
> >>
> >> Take the exact same approach with the DP code, making the
> >> format selection much less convoluted.
> >>
> >> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> >> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >> ---
> >>   drivers/gpu/drm/i915/display/intel_dp.c | 98 +++++++++++++++++--------
> >>   1 file changed, 69 insertions(+), 29 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> >> index 4955bd8b11d7..230b45acde29 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> >> @@ -1371,6 +1371,28 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
> >>   	return MODE_OK;
> >>   }
> >>   
> >> +static enum drm_mode_status
> >> +intel_dp_sink_format_valid(struct intel_connector *connector,
> >> +			   const struct drm_display_mode *mode,
> >> +			   enum intel_output_format sink_format)
> >> +{
> >> +	const struct drm_display_info *info = &connector->base.display_info;
> >> +
> >> +	switch (sink_format) {
> >> +	case INTEL_OUTPUT_FORMAT_YCBCR420:
> >> +		if (!connector->base.ycbcr_420_allowed ||
> >> +		    !drm_mode_is_420(info, mode))
> >> +			return MODE_NO_420;
> >> +
> >> +		return MODE_OK;
> >> +	case INTEL_OUTPUT_FORMAT_RGB:
> >> +		return MODE_OK;
> >> +	default:
> >> +		MISSING_CASE(sink_format);
> >> +		return MODE_BAD;
> >> +	}
> >> +}
> >> +
> > I think here we'll want another
> > ---
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > index e23162fc3f8b..a1dc089c54f5 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -1373,6 +1373,11 @@ intel_dp_sink_format_valid(struct intel_connector *connector,
> >   
> >                  return MODE_OK;
> >          case INTEL_OUTPUT_FORMAT_RGB:
> > +               return MODE_OK;
> > +       case INTEL_OUTPUT_FORMAT_YCBCR444:
> > +               if (!(info->color_formats & BIT(DRM_OUTPUT_COLOR_FORMAT_YCBCR444)))
> > +                       return MODE_BAD;
> > +
> >                  return MODE_OK;
> >          default:
> >                  MISSING_CASE(sink_format);
> > ---
> >
> > though this time, no bpc related changes. With that fixed, I get
> > YCbCr444 at 10bpc as well as 8bpc. Can't test 4:2:0 for what appears
> > to be unrelated userspace reasons, though the KMS property's enum
> > value is exposed properly.
> 
> 
> Hmm... this alone should not be sufficient till we actually have code to 
> try with YCBCR444 in intel_dp_compute_formats().
> 
> 
> >
> >>   int intel_dp_max_hdisplay_per_pipe(struct intel_display *display)
> >>   {
> >>   	return DISPLAY_VER(display) >= 30 ? 6144 : 5120;
> >> @@ -3330,41 +3352,59 @@ static int
> >>   intel_dp_compute_output_format(struct intel_encoder *encoder,
> >>   			       struct intel_crtc_state *crtc_state,
> >>   			       struct drm_connector_state *conn_state,
> >> -			       bool respect_downstream_limits)
> >> +			       bool respect_downstream_limits,
> >> +			       enum intel_output_format sink_format)
> >>   {
> >> -	struct intel_display *display = to_intel_display(encoder);
> >>   	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> >>   	struct intel_connector *connector = intel_dp->attached_connector;
> >> -	const struct drm_display_info *info = &connector->base.display_info;
> >>   	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> >> -	bool ycbcr_420_only;
> >> -	int ret;
> >>   
> >> -	ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
> >> -
> >> -	if (ycbcr_420_only && !connector->base.ycbcr_420_allowed) {
> >> -		drm_dbg_kms(display->drm,
> >> -			    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
> >> -		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
> >> -	} else {
> >> -		crtc_state->sink_format = intel_dp_sink_format(connector, adjusted_mode);
> >> -	}
> >> +	if (intel_dp_sink_format_valid(connector, adjusted_mode,
> >> +				       sink_format) != MODE_OK)
> >> +		return -EINVAL;
> >>   
> >> +	crtc_state->sink_format = sink_format;
> >>   	crtc_state->output_format = intel_dp_output_format(connector, crtc_state->sink_format);
> >>   
> >> -	ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> >> -					   respect_downstream_limits);
> >> -	if (ret) {
> >> -		if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
> >> -		    !connector->base.ycbcr_420_allowed ||
> >> -		    !drm_mode_is_420_also(info, adjusted_mode))
> >> -			return ret;
> >> -
> >> -		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> >> -		crtc_state->output_format = intel_dp_output_format(connector,
> >> -								   crtc_state->sink_format);
> >> -		ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> >> -						   respect_downstream_limits);
> >> +	return intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> >> +					    respect_downstream_limits);
> > With the removal of intel_dp_sink_format in this function, I wonder
> > if we can get rid of it entirely now. It's only called in
> > intel_dp_mode_min_link_bpp_x16, which seems to be used for bandwidth
> > limitation calculations (where YCbCr444 vs RGB444 doesn't matter, so
> > we're fine in that regard).
> 
> I agree we can remove intel_dp_sink_format() but IMO it should be after 
> patch#7 where we are validating sink format for mode valid.
> 
> I guess, with that change, intel_dp_mode_min_link_bpp_x16() can be 
> passed the sink_format directly since we have already validated that.

Aye. I think that really should have been part of patch 5
https://lore.kernel.org/intel-gfx/20260330235339.29479-6-ville.syrjala@linux.intel.com/
where I explicitly pass in the desired sink format.

I'll fix that up.


-- 
Ville Syrjälä
Intel

Re: [PATCH 4/9] drm/i915/dp: Restructure the sink/output format selection

[Ville Syrjälä]

On Tue, Apr 07, 2026 at 09:00:30PM +0300, Ville Syrjälä wrote:
> On Mon, Apr 06, 2026 at 11:02:03AM +0530, Nautiyal, Ankit K wrote:
> > 
> > On 3/31/2026 7:05 PM, Nicolas Frattaroli wrote:
> > > On Tuesday, 31 March 2026 01:53:34 Central European Summer Time Ville Syrjala wrote:
> > >> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >>
> > >> Restructure intel_dp_compute_output_format() to resemble the new
> > >> intel_hdmi_compute_output_formats().
> > >>
> > >> Again, we basically have two main code paths:
> > >> - YCbCr 4:2:0 only modes
> > >> - everything else including YCbCr 4:2:0 also modes
> > >>
> > >> Take the exact same approach with the DP code, making the
> > >> format selection much less convoluted.
> > >>
> > >> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> > >> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >> ---
> > >>   drivers/gpu/drm/i915/display/intel_dp.c | 98 +++++++++++++++++--------
> > >>   1 file changed, 69 insertions(+), 29 deletions(-)
> > >>
> > >> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > >> index 4955bd8b11d7..230b45acde29 100644
> > >> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > >> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > >> @@ -1371,6 +1371,28 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
> > >>   	return MODE_OK;
> > >>   }
> > >>   
> > >> +static enum drm_mode_status
> > >> +intel_dp_sink_format_valid(struct intel_connector *connector,
> > >> +			   const struct drm_display_mode *mode,
> > >> +			   enum intel_output_format sink_format)
> > >> +{
> > >> +	const struct drm_display_info *info = &connector->base.display_info;
> > >> +
> > >> +	switch (sink_format) {
> > >> +	case INTEL_OUTPUT_FORMAT_YCBCR420:
> > >> +		if (!connector->base.ycbcr_420_allowed ||
> > >> +		    !drm_mode_is_420(info, mode))
> > >> +			return MODE_NO_420;
> > >> +
> > >> +		return MODE_OK;
> > >> +	case INTEL_OUTPUT_FORMAT_RGB:
> > >> +		return MODE_OK;
> > >> +	default:
> > >> +		MISSING_CASE(sink_format);
> > >> +		return MODE_BAD;
> > >> +	}
> > >> +}
> > >> +
> > > I think here we'll want another
> > > ---
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > > index e23162fc3f8b..a1dc089c54f5 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > > @@ -1373,6 +1373,11 @@ intel_dp_sink_format_valid(struct intel_connector *connector,
> > >   
> > >                  return MODE_OK;
> > >          case INTEL_OUTPUT_FORMAT_RGB:
> > > +               return MODE_OK;
> > > +       case INTEL_OUTPUT_FORMAT_YCBCR444:
> > > +               if (!(info->color_formats & BIT(DRM_OUTPUT_COLOR_FORMAT_YCBCR444)))
> > > +                       return MODE_BAD;
> > > +
> > >                  return MODE_OK;
> > >          default:
> > >                  MISSING_CASE(sink_format);
> > > ---
> > >
> > > though this time, no bpc related changes. With that fixed, I get
> > > YCbCr444 at 10bpc as well as 8bpc. Can't test 4:2:0 for what appears
> > > to be unrelated userspace reasons, though the KMS property's enum
> > > value is exposed properly.
> > 
> > 
> > Hmm... this alone should not be sufficient till we actually have code to 
> > try with YCBCR444 in intel_dp_compute_formats().
> > 
> > 
> > >
> > >>   int intel_dp_max_hdisplay_per_pipe(struct intel_display *display)
> > >>   {
> > >>   	return DISPLAY_VER(display) >= 30 ? 6144 : 5120;
> > >> @@ -3330,41 +3352,59 @@ static int
> > >>   intel_dp_compute_output_format(struct intel_encoder *encoder,
> > >>   			       struct intel_crtc_state *crtc_state,
> > >>   			       struct drm_connector_state *conn_state,
> > >> -			       bool respect_downstream_limits)
> > >> +			       bool respect_downstream_limits,
> > >> +			       enum intel_output_format sink_format)
> > >>   {
> > >> -	struct intel_display *display = to_intel_display(encoder);
> > >>   	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > >>   	struct intel_connector *connector = intel_dp->attached_connector;
> > >> -	const struct drm_display_info *info = &connector->base.display_info;
> > >>   	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> > >> -	bool ycbcr_420_only;
> > >> -	int ret;
> > >>   
> > >> -	ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
> > >> -
> > >> -	if (ycbcr_420_only && !connector->base.ycbcr_420_allowed) {
> > >> -		drm_dbg_kms(display->drm,
> > >> -			    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
> > >> -		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
> > >> -	} else {
> > >> -		crtc_state->sink_format = intel_dp_sink_format(connector, adjusted_mode);
> > >> -	}
> > >> +	if (intel_dp_sink_format_valid(connector, adjusted_mode,
> > >> +				       sink_format) != MODE_OK)
> > >> +		return -EINVAL;
> > >>   
> > >> +	crtc_state->sink_format = sink_format;
> > >>   	crtc_state->output_format = intel_dp_output_format(connector, crtc_state->sink_format);
> > >>   
> > >> -	ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> > >> -					   respect_downstream_limits);
> > >> -	if (ret) {
> > >> -		if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
> > >> -		    !connector->base.ycbcr_420_allowed ||
> > >> -		    !drm_mode_is_420_also(info, adjusted_mode))
> > >> -			return ret;
> > >> -
> > >> -		crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> > >> -		crtc_state->output_format = intel_dp_output_format(connector,
> > >> -								   crtc_state->sink_format);
> > >> -		ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> > >> -						   respect_downstream_limits);
> > >> +	return intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> > >> +					    respect_downstream_limits);
> > > With the removal of intel_dp_sink_format in this function, I wonder
> > > if we can get rid of it entirely now. It's only called in
> > > intel_dp_mode_min_link_bpp_x16, which seems to be used for bandwidth
> > > limitation calculations (where YCbCr444 vs RGB444 doesn't matter, so
> > > we're fine in that regard).
> > 
> > I agree we can remove intel_dp_sink_format() but IMO it should be after 
> > patch#7 where we are validating sink format for mode valid.
> > 
> > I guess, with that change, intel_dp_mode_min_link_bpp_x16() can be 
> > passed the sink_format directly since we have already validated that.
> 
> Aye. I think that really should have been part of patch 5
> https://lore.kernel.org/intel-gfx/20260330235339.29479-6-ville.syrjala@linux.intel.com/
> where I explicitly pass in the desired sink format.
> 
> I'll fix that up.

The use of intel_dp_mode_min_link_bpp_x16() for the FRL bandwidth seems
completely incorrect. We are trying to check for bandwidth on the HDMI
link after the PCON, not the DP link before the PCON. I'll just send
a separate fix for that...

-- 
Ville Syrjälä
Intel

[PATCH 5/9] drm/i915/dp: Validate "4:2:0 also" modes twice

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Currently we only validate "4:2:0 also" modes as RGB. But
if that fails we could perhaps still use the mode in with
4:2:0 output. All we have to do is retry the validation with
the different sink format.

So far we did the double validation only so far as it affects
PCON TMDS clock limits. But validating everything twice seems
a bit more sane.

Note that intel_dp_output_format() might still end up picking
RGB for the actual output format (and letting PCON deal with
the YCbCr conversion). So I suppose we could still fail the
validation due to that, and forcing even the output format
to 4:2:0 might solve it on a third try. But we'd need the
same fallback logic in intel_dp_compute_config(). For now
this seems sufficient.

Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 114 +++++++++++++-----------
 1 file changed, 61 insertions(+), 53 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 230b45acde29..86319bf09a19 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1320,12 +1320,10 @@ intel_dp_tmds_clock_valid(struct intel_dp *intel_dp,
 static enum drm_mode_status
 intel_dp_mode_valid_downstream(struct intel_connector *connector,
 			       const struct drm_display_mode *mode,
-			       int target_clock)
+			       int target_clock,
+			       enum intel_output_format sink_format)
 {
 	struct intel_dp *intel_dp = intel_attached_dp(connector);
-	const struct drm_display_info *info = &connector->base.display_info;
-	enum drm_mode_status status;
-	enum intel_output_format sink_format;
 
 	/* If PCON supports FRL MODE, check FRL bandwidth constraints */
 	if (intel_dp->dfp.pcon_max_frl_bw) {
@@ -1350,25 +1348,9 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
 	    target_clock > intel_dp->dfp.max_dotclock)
 		return MODE_CLOCK_HIGH;
 
-	sink_format = intel_dp_sink_format(connector, mode);
-
 	/* Assume 8bpc for the DP++/HDMI/DVI TMDS clock check */
-	status = intel_dp_tmds_clock_valid(intel_dp, target_clock,
-					   8, sink_format, true);
-
-	if (status != MODE_OK) {
-		if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
-		    !connector->base.ycbcr_420_allowed ||
-		    !drm_mode_is_420_also(info, mode))
-			return status;
-		sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
-		status = intel_dp_tmds_clock_valid(intel_dp, target_clock,
-						   8, sink_format, true);
-		if (status != MODE_OK)
-			return status;
-	}
-
-	return MODE_OK;
+	return intel_dp_tmds_clock_valid(intel_dp, target_clock,
+					 8, sink_format, true);
 }
 
 static enum drm_mode_status
@@ -1464,15 +1446,14 @@ bool intel_dp_dotclk_valid(struct intel_display *display,
 }
 
 static enum drm_mode_status
-intel_dp_mode_valid(struct drm_connector *_connector,
-		    const struct drm_display_mode *mode)
+intel_dp_mode_valid_format(struct intel_connector *connector,
+			   const struct drm_display_mode *mode,
+			   int target_clock,
+			   enum intel_output_format sink_format)
 {
-	struct intel_display *display = to_intel_display(_connector->dev);
-	struct intel_connector *connector = to_intel_connector(_connector);
+	struct intel_display *display = to_intel_display(connector);
 	struct intel_dp *intel_dp = intel_attached_dp(connector);
-	enum intel_output_format sink_format, output_format;
-	const struct drm_display_mode *fixed_mode;
-	int target_clock = mode->clock;
+	enum intel_output_format output_format;
 	int max_rate, mode_rate, max_lanes, max_link_clock;
 	u16 dsc_max_compressed_bpp = 0;
 	enum drm_mode_status status;
@@ -1480,29 +1461,6 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 	int num_joined_pipes;
 	int link_bpp_x16;
 
-	status = intel_cpu_transcoder_mode_valid(display, mode);
-	if (status != MODE_OK)
-		return status;
-
-	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
-		return MODE_H_ILLEGAL;
-
-	if (mode->clock < 10000)
-		return MODE_CLOCK_LOW;
-
-	if (intel_dp_hdisplay_bad(display, mode->hdisplay))
-		return MODE_H_ILLEGAL;
-
-	fixed_mode = intel_panel_fixed_mode(connector, mode);
-	if (intel_dp_is_edp(intel_dp) && fixed_mode) {
-		status = intel_panel_mode_valid(connector, mode);
-		if (status != MODE_OK)
-			return status;
-
-		target_clock = fixed_mode->clock;
-	}
-
-	sink_format = intel_dp_sink_format(connector, mode);
 	output_format = intel_dp_output_format(connector, sink_format);
 
 	max_link_clock = intel_dp_max_link_rate(intel_dp);
@@ -1600,7 +1558,57 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 	if (status != MODE_OK)
 		return status;
 
-	return intel_dp_mode_valid_downstream(connector, mode, target_clock);
+	return intel_dp_mode_valid_downstream(connector, mode,
+					      target_clock, sink_format);
+}
+
+static enum drm_mode_status
+intel_dp_mode_valid(struct drm_connector *_connector,
+		    const struct drm_display_mode *mode)
+{
+	struct intel_display *display = to_intel_display(_connector->dev);
+	struct intel_connector *connector = to_intel_connector(_connector);
+	const struct drm_display_info *info = &connector->base.display_info;
+	struct intel_dp *intel_dp = intel_attached_dp(connector);
+	const struct drm_display_mode *fixed_mode;
+	int target_clock = mode->clock;
+	enum drm_mode_status status;
+
+	status = intel_cpu_transcoder_mode_valid(display, mode);
+	if (status != MODE_OK)
+		return status;
+
+	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
+		return MODE_H_ILLEGAL;
+
+	if (mode->clock < 10000)
+		return MODE_CLOCK_LOW;
+
+	if (intel_dp_hdisplay_bad(display, mode->hdisplay))
+		return MODE_H_ILLEGAL;
+
+	fixed_mode = intel_panel_fixed_mode(connector, mode);
+	if (intel_dp_is_edp(intel_dp) && fixed_mode) {
+		status = intel_panel_mode_valid(connector, mode);
+		if (status != MODE_OK)
+			return status;
+
+		target_clock = fixed_mode->clock;
+	}
+
+	if (drm_mode_is_420_only(info, mode)) {
+		status = intel_dp_mode_valid_format(connector, mode, target_clock,
+						    INTEL_OUTPUT_FORMAT_YCBCR420);
+	} else {
+		status = intel_dp_mode_valid_format(connector, mode, target_clock,
+						    INTEL_OUTPUT_FORMAT_RGB);
+
+		if (status != MODE_OK && drm_mode_is_420_also(info, mode))
+			status = intel_dp_mode_valid_format(connector, mode, target_clock,
+							    INTEL_OUTPUT_FORMAT_YCBCR420);
+	}
+
+	return status;
 }
 
 bool intel_dp_source_supports_tps3(struct intel_display *display)
-- 
2.52.0

Re: [PATCH 5/9] drm/i915/dp: Validate "4:2:0 also" modes twice

[Nautiyal, Ankit K]

On 3/31/2026 5:23 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Currently we only validate "4:2:0 also" modes as RGB. But
> if that fails we could perhaps still use the mode in with
> 4:2:0 output. All we have to do is retry the validation with
> the different sink format.
>
> So far we did the double validation only so far as it affects
> PCON TMDS clock limits. But validating everything twice seems
> a bit more sane.
>
> Note that intel_dp_output_format() might still end up picking
> RGB for the actual output format (and letting PCON deal with
> the YCbCr conversion). So I suppose we could still fail the
> validation due to that, and forcing even the output format
> to 4:2:0 might solve it on a third try. But we'd need the
> same fallback logic in intel_dp_compute_config(). For now
> this seems sufficient.
>
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_dp.c | 114 +++++++++++++-----------
>   1 file changed, 61 insertions(+), 53 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 230b45acde29..86319bf09a19 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1320,12 +1320,10 @@ intel_dp_tmds_clock_valid(struct intel_dp *intel_dp,
>   static enum drm_mode_status
>   intel_dp_mode_valid_downstream(struct intel_connector *connector,
>   			       const struct drm_display_mode *mode,
> -			       int target_clock)
> +			       int target_clock,
> +			       enum intel_output_format sink_format)
>   {
>   	struct intel_dp *intel_dp = intel_attached_dp(connector);
> -	const struct drm_display_info *info = &connector->base.display_info;
> -	enum drm_mode_status status;
> -	enum intel_output_format sink_format;
>   
>   	/* If PCON supports FRL MODE, check FRL bandwidth constraints */
>   	if (intel_dp->dfp.pcon_max_frl_bw) {
> @@ -1350,25 +1348,9 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
>   	    target_clock > intel_dp->dfp.max_dotclock)
>   		return MODE_CLOCK_HIGH;
>   
> -	sink_format = intel_dp_sink_format(connector, mode);
> -
>   	/* Assume 8bpc for the DP++/HDMI/DVI TMDS clock check */
> -	status = intel_dp_tmds_clock_valid(intel_dp, target_clock,
> -					   8, sink_format, true);
> -
> -	if (status != MODE_OK) {
> -		if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
> -		    !connector->base.ycbcr_420_allowed ||
> -		    !drm_mode_is_420_also(info, mode))
> -			return status;
> -		sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> -		status = intel_dp_tmds_clock_valid(intel_dp, target_clock,
> -						   8, sink_format, true);
> -		if (status != MODE_OK)
> -			return status;
> -	}
> -
> -	return MODE_OK;
> +	return intel_dp_tmds_clock_valid(intel_dp, target_clock,
> +					 8, sink_format, true);
>   }
>   
>   static enum drm_mode_status
> @@ -1464,15 +1446,14 @@ bool intel_dp_dotclk_valid(struct intel_display *display,
>   }
>   
>   static enum drm_mode_status
> -intel_dp_mode_valid(struct drm_connector *_connector,
> -		    const struct drm_display_mode *mode)
> +intel_dp_mode_valid_format(struct intel_connector *connector,
> +			   const struct drm_display_mode *mode,
> +			   int target_clock,
> +			   enum intel_output_format sink_format)
>   {
> -	struct intel_display *display = to_intel_display(_connector->dev);
> -	struct intel_connector *connector = to_intel_connector(_connector);
> +	struct intel_display *display = to_intel_display(connector);
>   	struct intel_dp *intel_dp = intel_attached_dp(connector);
> -	enum intel_output_format sink_format, output_format;
> -	const struct drm_display_mode *fixed_mode;
> -	int target_clock = mode->clock;
> +	enum intel_output_format output_format;
>   	int max_rate, mode_rate, max_lanes, max_link_clock;
>   	u16 dsc_max_compressed_bpp = 0;
>   	enum drm_mode_status status;
> @@ -1480,29 +1461,6 @@ intel_dp_mode_valid(struct drm_connector *_connector,
>   	int num_joined_pipes;
>   	int link_bpp_x16;
>   
> -	status = intel_cpu_transcoder_mode_valid(display, mode);
> -	if (status != MODE_OK)
> -		return status;
> -
> -	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
> -		return MODE_H_ILLEGAL;
> -
> -	if (mode->clock < 10000)
> -		return MODE_CLOCK_LOW;
> -
> -	if (intel_dp_hdisplay_bad(display, mode->hdisplay))
> -		return MODE_H_ILLEGAL;
> -
> -	fixed_mode = intel_panel_fixed_mode(connector, mode);
> -	if (intel_dp_is_edp(intel_dp) && fixed_mode) {
> -		status = intel_panel_mode_valid(connector, mode);
> -		if (status != MODE_OK)
> -			return status;
> -
> -		target_clock = fixed_mode->clock;
> -	}
> -
> -	sink_format = intel_dp_sink_format(connector, mode);
>   	output_format = intel_dp_output_format(connector, sink_format);
>   
>   	max_link_clock = intel_dp_max_link_rate(intel_dp);
> @@ -1600,7 +1558,57 @@ intel_dp_mode_valid(struct drm_connector *_connector,
>   	if (status != MODE_OK)
>   		return status;
>   
> -	return intel_dp_mode_valid_downstream(connector, mode, target_clock);
> +	return intel_dp_mode_valid_downstream(connector, mode,
> +					      target_clock, sink_format);
> +}
> +
> +static enum drm_mode_status
> +intel_dp_mode_valid(struct drm_connector *_connector,
> +		    const struct drm_display_mode *mode)
> +{
> +	struct intel_display *display = to_intel_display(_connector->dev);
> +	struct intel_connector *connector = to_intel_connector(_connector);
> +	const struct drm_display_info *info = &connector->base.display_info;
> +	struct intel_dp *intel_dp = intel_attached_dp(connector);
> +	const struct drm_display_mode *fixed_mode;
> +	int target_clock = mode->clock;
> +	enum drm_mode_status status;
> +
> +	status = intel_cpu_transcoder_mode_valid(display, mode);
> +	if (status != MODE_OK)
> +		return status;
> +
> +	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
> +		return MODE_H_ILLEGAL;
> +
> +	if (mode->clock < 10000)
> +		return MODE_CLOCK_LOW;
> +
> +	if (intel_dp_hdisplay_bad(display, mode->hdisplay))
> +		return MODE_H_ILLEGAL;
> +
> +	fixed_mode = intel_panel_fixed_mode(connector, mode);
> +	if (intel_dp_is_edp(intel_dp) && fixed_mode) {
> +		status = intel_panel_mode_valid(connector, mode);
> +		if (status != MODE_OK)
> +			return status;
> +
> +		target_clock = fixed_mode->clock;
> +	}
> +
> +	if (drm_mode_is_420_only(info, mode)) {
> +		status = intel_dp_mode_valid_format(connector, mode, target_clock,
> +						    INTEL_OUTPUT_FORMAT_YCBCR420);
> +	} else {
> +		status = intel_dp_mode_valid_format(connector, mode, target_clock,
> +						    INTEL_OUTPUT_FORMAT_RGB);
> +

Perhaps we can write  a comment or TODO here about the PCON special case 
which you mentioned:

that even though we are trying 420 sink output format, with PCON it is 
possible that RGB output format gets picked up (if Pcon supports color 
conversion).

In which case the rest of the mode validation will be wrt to RGB. Unless 
we handle fallback in intel_dp_output_format().


In any case, the patch LGTM.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


> +		if (status != MODE_OK && drm_mode_is_420_also(info, mode))
> +			status = intel_dp_mode_valid_format(connector, mode, target_clock,
> +							    INTEL_OUTPUT_FORMAT_YCBCR420);
> +	}
> +
> +	return status;
>   }
>   
>   bool intel_dp_source_supports_tps3(struct intel_display *display)

[PATCH 6/9] drm/i915/dp: Require a HDMI sink for YCbCr output via PCON

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

DVI sinks can't deal with YCbCr. Make sure we have a HDMI sink connected
after the PCON before doing YCbCr 4:2:0 output.

Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 86319bf09a19..ce40d38557e1 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1358,10 +1358,15 @@ intel_dp_sink_format_valid(struct intel_connector *connector,
 			   const struct drm_display_mode *mode,
 			   enum intel_output_format sink_format)
 {
+	struct intel_dp *intel_dp = intel_attached_dp(connector);
 	const struct drm_display_info *info = &connector->base.display_info;
 
 	switch (sink_format) {
 	case INTEL_OUTPUT_FORMAT_YCBCR420:
+		if (intel_dp->dfp.min_tmds_clock &&
+		    !intel_dp_has_hdmi_sink(intel_dp))
+			return MODE_NO_420;
+
 		if (!connector->base.ycbcr_420_allowed ||
 		    !drm_mode_is_420(info, mode))
 			return MODE_NO_420;
-- 
2.52.0

Re: [PATCH 6/9] drm/i915/dp: Require a HDMI sink for YCbCr output via PCON

[Nautiyal, Ankit K]

On 3/31/2026 5:23 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> DVI sinks can't deal with YCbCr. Make sure we have a HDMI sink connected
> after the PCON before doing YCbCr 4:2:0 output.
>
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

LGTM.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


> ---
>   drivers/gpu/drm/i915/display/intel_dp.c | 5 +++++
>   1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 86319bf09a19..ce40d38557e1 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1358,10 +1358,15 @@ intel_dp_sink_format_valid(struct intel_connector *connector,
>   			   const struct drm_display_mode *mode,
>   			   enum intel_output_format sink_format)
>   {
> +	struct intel_dp *intel_dp = intel_attached_dp(connector);
>   	const struct drm_display_info *info = &connector->base.display_info;
>   
>   	switch (sink_format) {
>   	case INTEL_OUTPUT_FORMAT_YCBCR420:
> +		if (intel_dp->dfp.min_tmds_clock &&
> +		    !intel_dp_has_hdmi_sink(intel_dp))
> +			return MODE_NO_420;
> +
>   		if (!connector->base.ycbcr_420_allowed ||
>   		    !drm_mode_is_420(info, mode))
>   			return MODE_NO_420;

[PATCH 7/9] drm/i915/dp: Validate sink format in .mode_valid()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Make sure the sink supports out chosen sink format. I suppose it
might be at least possible that some PCONs might not snoop the EDID
hard enough and filter out all the modes that they should.

Also if we ever want to add a similar "force DVI" knob to DP
outputs that we have for native HDMI, we'd need to manually
get rid of anything DVI sinks can't handle.

Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index ce40d38557e1..ed89fbcdd549 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1466,6 +1466,10 @@ intel_dp_mode_valid_format(struct intel_connector *connector,
 	int num_joined_pipes;
 	int link_bpp_x16;
 
+	status = intel_dp_sink_format_valid(connector, mode, sink_format);
+	if (status != MODE_OK)
+		return status;
+
 	output_format = intel_dp_output_format(connector, sink_format);
 
 	max_link_clock = intel_dp_max_link_rate(intel_dp);
-- 
2.52.0

Re: [PATCH 7/9] drm/i915/dp: Validate sink format in .mode_valid()

[Nautiyal, Ankit K]

On 3/31/2026 5:23 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Make sure the sink supports out chosen sink format. I suppose it


s/out/our


Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


> might be at least possible that some PCONs might not snoop the EDID
> hard enough and filter out all the modes that they should.
>
> Also if we ever want to add a similar "force DVI" knob to DP
> outputs that we have for native HDMI, we'd need to manually
> get rid of anything DVI sinks can't handle.
>
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_dp.c | 4 ++++
>   1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index ce40d38557e1..ed89fbcdd549 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1466,6 +1466,10 @@ intel_dp_mode_valid_format(struct intel_connector *connector,
>   	int num_joined_pipes;
>   	int link_bpp_x16;
>   
> +	status = intel_dp_sink_format_valid(connector, mode, sink_format);
> +	if (status != MODE_OK)
> +		return status;
> +
>   	output_format = intel_dp_output_format(connector, sink_format);
>   
>   	max_link_clock = intel_dp_max_link_rate(intel_dp);

[PATCH 8/9] drm/i915/hdmi: Make the RGB fallback for "4:2:0 only" modes the last resort

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Currently we take the Hail Mary RGB fallback for "4:2:0 only" modes
already during the first pass when respect_downstream_limits==true.
It seems better to try everything else first (like ignoring TMDS
clock limits) while still preferring 4:2:0, and only if everything
else has failed fall back to RGB.

Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 95bd38c620d1..6bc1689cbf93 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2314,7 +2314,7 @@ static int intel_hdmi_compute_formats(struct intel_encoder *encoder,
 						       respect_downstream_limits,
 						       INTEL_OUTPUT_FORMAT_YCBCR420);
 
-		if (ret) {
+		if (ret && !respect_downstream_limits) {
 			drm_dbg_kms(display->drm,
 				    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
 
-- 
2.52.0

Re: [PATCH 8/9] drm/i915/hdmi: Make the RGB fallback for "4:2:0 only" modes the last resort

[Nautiyal, Ankit K]

On 3/31/2026 5:23 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Currently we take the Hail Mary RGB fallback for "4:2:0 only" modes
> already during the first pass when respect_downstream_limits==true.
> It seems better to try everything else first (like ignoring TMDS
> clock limits) while still preferring 4:2:0, and only if everything
> else has failed fall back to RGB.
>
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 95bd38c620d1..6bc1689cbf93 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2314,7 +2314,7 @@ static int intel_hdmi_compute_formats(struct intel_encoder *encoder,
>   						       respect_downstream_limits,
>   						       INTEL_OUTPUT_FORMAT_YCBCR420);
>   
> -		if (ret) {
> +		if (ret && !respect_downstream_limits) {

Makes sense.


Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

>   			drm_dbg_kms(display->drm,
>   				    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
>   

[PATCH 9/9] drm/i915/dp: Make the RGB fallback for "4:2:0 only" modes the last resort

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Currently we take the Hail Mary RGB fallback for "4:2:0 only" modes
already during the first pass when respect_downstream_limits==true.
It seems better to try everything else first (like ignoring TMDS
clock limits) while still preferring 4:2:0, and only if everything
else has failed fall back to RGB.

Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index ed89fbcdd549..e23162fc3f8b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3405,7 +3405,7 @@ intel_dp_compute_formats(struct intel_encoder *encoder,
 						     respect_downstream_limits,
 						     INTEL_OUTPUT_FORMAT_YCBCR420);
 
-		if (ret) {
+		if (ret && !respect_downstream_limits) {
 			drm_dbg_kms(display->drm,
 				    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
 
-- 
2.52.0

Re: [PATCH 9/9] drm/i915/dp: Make the RGB fallback for "4:2:0 only" modes the last resort

[Nautiyal, Ankit K]

On 3/31/2026 5:23 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Currently we take the Hail Mary RGB fallback for "4:2:0 only" modes
> already during the first pass when respect_downstream_limits==true.
> It seems better to try everything else first (like ignoring TMDS
> clock limits) while still preferring 4:2:0, and only if everything
> else has failed fall back to RGB.
>
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>


Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


> ---
>   drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index ed89fbcdd549..e23162fc3f8b 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -3405,7 +3405,7 @@ intel_dp_compute_formats(struct intel_encoder *encoder,
>   						     respect_downstream_limits,
>   						     INTEL_OUTPUT_FORMAT_YCBCR420);
>   
> -		if (ret) {
> +		if (ret && !respect_downstream_limits) {
>   			drm_dbg_kms(display->drm,
>   				    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
>   

✓ CI.KUnit: success for drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling

[Patchwork]

== Series Details ==

Series: drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling
URL   : https://patchwork.freedesktop.org/series/164123/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[00:00:15] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[00:00:20] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[00:00:51] Starting KUnit Kernel (1/1)...
[00:00:51] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[00:00:51] ================== guc_buf (11 subtests) ===================
[00:00:51] [PASSED] test_smallest
[00:00:51] [PASSED] test_largest
[00:00:51] [PASSED] test_granular
[00:00:51] [PASSED] test_unique
[00:00:51] [PASSED] test_overlap
[00:00:51] [PASSED] test_reusable
[00:00:51] [PASSED] test_too_big
[00:00:51] [PASSED] test_flush
[00:00:51] [PASSED] test_lookup
[00:00:51] [PASSED] test_data
[00:00:51] [PASSED] test_class
[00:00:51] ===================== [PASSED] guc_buf =====================
[00:00:51] =================== guc_dbm (7 subtests) ===================
[00:00:51] [PASSED] test_empty
[00:00:51] [PASSED] test_default
[00:00:51] ======================== test_size  ========================
[00:00:51] [PASSED] 4
[00:00:51] [PASSED] 8
[00:00:51] [PASSED] 32
[00:00:51] [PASSED] 256
[00:00:51] ==================== [PASSED] test_size ====================
[00:00:51] ======================= test_reuse  ========================
[00:00:51] [PASSED] 4
[00:00:51] [PASSED] 8
[00:00:51] [PASSED] 32
[00:00:51] [PASSED] 256
[00:00:51] =================== [PASSED] test_reuse ====================
[00:00:51] =================== test_range_overlap  ====================
[00:00:51] [PASSED] 4
[00:00:51] [PASSED] 8
[00:00:51] [PASSED] 32
[00:00:51] [PASSED] 256
[00:00:51] =============== [PASSED] test_range_overlap ================
[00:00:51] =================== test_range_compact  ====================
[00:00:51] [PASSED] 4
[00:00:51] [PASSED] 8
[00:00:51] [PASSED] 32
[00:00:51] [PASSED] 256
[00:00:51] =============== [PASSED] test_range_compact ================
[00:00:51] ==================== test_range_spare  =====================
[00:00:51] [PASSED] 4
[00:00:51] [PASSED] 8
[00:00:51] [PASSED] 32
[00:00:51] [PASSED] 256
[00:00:51] ================ [PASSED] test_range_spare =================
[00:00:51] ===================== [PASSED] guc_dbm =====================
[00:00:51] =================== guc_idm (6 subtests) ===================
[00:00:51] [PASSED] bad_init
[00:00:51] [PASSED] no_init
[00:00:51] [PASSED] init_fini
[00:00:51] [PASSED] check_used
[00:00:51] [PASSED] check_quota
[00:00:51] [PASSED] check_all
[00:00:51] ===================== [PASSED] guc_idm =====================
[00:00:51] ================== no_relay (3 subtests) ===================
[00:00:51] [PASSED] xe_drops_guc2pf_if_not_ready
[00:00:51] [PASSED] xe_drops_guc2vf_if_not_ready
[00:00:51] [PASSED] xe_rejects_send_if_not_ready
[00:00:51] ==================== [PASSED] no_relay =====================
[00:00:51] ================== pf_relay (14 subtests) ==================
[00:00:51] [PASSED] pf_rejects_guc2pf_too_short
[00:00:51] [PASSED] pf_rejects_guc2pf_too_long
[00:00:51] [PASSED] pf_rejects_guc2pf_no_payload
[00:00:51] [PASSED] pf_fails_no_payload
[00:00:51] [PASSED] pf_fails_bad_origin
[00:00:51] [PASSED] pf_fails_bad_type
[00:00:51] [PASSED] pf_txn_reports_error
[00:00:51] [PASSED] pf_txn_sends_pf2guc
[00:00:51] [PASSED] pf_sends_pf2guc
[00:00:51] [SKIPPED] pf_loopback_nop
[00:00:51] [SKIPPED] pf_loopback_echo
[00:00:51] [SKIPPED] pf_loopback_fail
[00:00:51] [SKIPPED] pf_loopback_busy
[00:00:51] [SKIPPED] pf_loopback_retry
[00:00:51] ==================== [PASSED] pf_relay =====================
[00:00:51] ================== vf_relay (3 subtests) ===================
[00:00:51] [PASSED] vf_rejects_guc2vf_too_short
[00:00:51] [PASSED] vf_rejects_guc2vf_too_long
[00:00:51] [PASSED] vf_rejects_guc2vf_no_payload
[00:00:51] ==================== [PASSED] vf_relay =====================
[00:00:51] ================ pf_gt_config (9 subtests) =================
[00:00:51] [PASSED] fair_contexts_1vf
[00:00:51] [PASSED] fair_doorbells_1vf
[00:00:51] [PASSED] fair_ggtt_1vf
[00:00:51] ====================== fair_vram_1vf  ======================
[00:00:51] [PASSED] 3.50 GiB
[00:00:51] [PASSED] 11.5 GiB
[00:00:51] [PASSED] 15.5 GiB
[00:00:51] [PASSED] 31.5 GiB
[00:00:51] [PASSED] 63.5 GiB
[00:00:51] [PASSED] 1.91 GiB
[00:00:51] ================== [PASSED] fair_vram_1vf ==================
[00:00:51] ================ fair_vram_1vf_admin_only  =================
[00:00:51] [PASSED] 3.50 GiB
[00:00:51] [PASSED] 11.5 GiB
[00:00:51] [PASSED] 15.5 GiB
[00:00:51] [PASSED] 31.5 GiB
[00:00:51] [PASSED] 63.5 GiB
[00:00:51] [PASSED] 1.91 GiB
[00:00:51] ============ [PASSED] fair_vram_1vf_admin_only =============
[00:00:51] ====================== fair_contexts  ======================
[00:00:51] [PASSED] 1 VF
[00:00:51] [PASSED] 2 VFs
[00:00:51] [PASSED] 3 VFs
[00:00:51] [PASSED] 4 VFs
[00:00:51] [PASSED] 5 VFs
[00:00:51] [PASSED] 6 VFs
[00:00:51] [PASSED] 7 VFs
[00:00:51] [PASSED] 8 VFs
[00:00:51] [PASSED] 9 VFs
[00:00:51] [PASSED] 10 VFs
[00:00:51] [PASSED] 11 VFs
[00:00:51] [PASSED] 12 VFs
[00:00:51] [PASSED] 13 VFs
[00:00:51] [PASSED] 14 VFs
[00:00:51] [PASSED] 15 VFs
[00:00:51] [PASSED] 16 VFs
[00:00:51] [PASSED] 17 VFs
[00:00:51] [PASSED] 18 VFs
[00:00:51] [PASSED] 19 VFs
[00:00:51] [PASSED] 20 VFs
[00:00:51] [PASSED] 21 VFs
[00:00:51] [PASSED] 22 VFs
[00:00:51] [PASSED] 23 VFs
[00:00:51] [PASSED] 24 VFs
[00:00:51] [PASSED] 25 VFs
[00:00:51] [PASSED] 26 VFs
[00:00:51] [PASSED] 27 VFs
[00:00:51] [PASSED] 28 VFs
[00:00:51] [PASSED] 29 VFs
[00:00:51] [PASSED] 30 VFs
[00:00:51] [PASSED] 31 VFs
[00:00:51] [PASSED] 32 VFs
[00:00:51] [PASSED] 33 VFs
[00:00:51] [PASSED] 34 VFs
[00:00:51] [PASSED] 35 VFs
[00:00:51] [PASSED] 36 VFs
[00:00:51] [PASSED] 37 VFs
[00:00:51] [PASSED] 38 VFs
[00:00:51] [PASSED] 39 VFs
[00:00:51] [PASSED] 40 VFs
[00:00:51] [PASSED] 41 VFs
[00:00:51] [PASSED] 42 VFs
[00:00:51] [PASSED] 43 VFs
[00:00:51] [PASSED] 44 VFs
[00:00:51] [PASSED] 45 VFs
[00:00:51] [PASSED] 46 VFs
[00:00:51] [PASSED] 47 VFs
[00:00:51] [PASSED] 48 VFs
[00:00:51] [PASSED] 49 VFs
[00:00:51] [PASSED] 50 VFs
[00:00:51] [PASSED] 51 VFs
[00:00:51] [PASSED] 52 VFs
[00:00:51] [PASSED] 53 VFs
[00:00:51] [PASSED] 54 VFs
[00:00:51] [PASSED] 55 VFs
[00:00:51] [PASSED] 56 VFs
[00:00:51] [PASSED] 57 VFs
[00:00:51] [PASSED] 58 VFs
[00:00:51] [PASSED] 59 VFs
[00:00:51] [PASSED] 60 VFs
[00:00:51] [PASSED] 61 VFs
[00:00:51] [PASSED] 62 VFs
[00:00:51] [PASSED] 63 VFs
[00:00:51] ================== [PASSED] fair_contexts ==================
[00:00:51] ===================== fair_doorbells  ======================
[00:00:51] [PASSED] 1 VF
[00:00:51] [PASSED] 2 VFs
[00:00:51] [PASSED] 3 VFs
[00:00:51] [PASSED] 4 VFs
[00:00:51] [PASSED] 5 VFs
[00:00:51] [PASSED] 6 VFs
[00:00:51] [PASSED] 7 VFs
[00:00:51] [PASSED] 8 VFs
[00:00:51] [PASSED] 9 VFs
[00:00:51] [PASSED] 10 VFs
[00:00:51] [PASSED] 11 VFs
[00:00:51] [PASSED] 12 VFs
[00:00:51] [PASSED] 13 VFs
[00:00:51] [PASSED] 14 VFs
[00:00:51] [PASSED] 15 VFs
[00:00:51] [PASSED] 16 VFs
[00:00:51] [PASSED] 17 VFs
[00:00:51] [PASSED] 18 VFs
[00:00:51] [PASSED] 19 VFs
[00:00:51] [PASSED] 20 VFs
[00:00:51] [PASSED] 21 VFs
[00:00:51] [PASSED] 22 VFs
[00:00:51] [PASSED] 23 VFs
[00:00:51] [PASSED] 24 VFs
[00:00:51] [PASSED] 25 VFs
[00:00:51] [PASSED] 26 VFs
[00:00:51] [PASSED] 27 VFs
[00:00:51] [PASSED] 28 VFs
[00:00:51] [PASSED] 29 VFs
[00:00:51] [PASSED] 30 VFs
[00:00:51] [PASSED] 31 VFs
[00:00:51] [PASSED] 32 VFs
[00:00:51] [PASSED] 33 VFs
[00:00:51] [PASSED] 34 VFs
[00:00:51] [PASSED] 35 VFs
[00:00:51] [PASSED] 36 VFs
[00:00:51] [PASSED] 37 VFs
[00:00:51] [PASSED] 38 VFs
[00:00:51] [PASSED] 39 VFs
[00:00:51] [PASSED] 40 VFs
[00:00:51] [PASSED] 41 VFs
[00:00:51] [PASSED] 42 VFs
[00:00:51] [PASSED] 43 VFs
[00:00:51] [PASSED] 44 VFs
[00:00:51] [PASSED] 45 VFs
[00:00:51] [PASSED] 46 VFs
[00:00:51] [PASSED] 47 VFs
[00:00:51] [PASSED] 48 VFs
[00:00:51] [PASSED] 49 VFs
[00:00:51] [PASSED] 50 VFs
[00:00:51] [PASSED] 51 VFs
[00:00:51] [PASSED] 52 VFs
[00:00:51] [PASSED] 53 VFs
[00:00:51] [PASSED] 54 VFs
[00:00:51] [PASSED] 55 VFs
[00:00:51] [PASSED] 56 VFs
[00:00:51] [PASSED] 57 VFs
[00:00:51] [PASSED] 58 VFs
[00:00:51] [PASSED] 59 VFs
[00:00:51] [PASSED] 60 VFs
[00:00:51] [PASSED] 61 VFs
[00:00:51] [PASSED] 62 VFs
[00:00:51] [PASSED] 63 VFs
[00:00:51] ================= [PASSED] fair_doorbells ==================
[00:00:51] ======================== fair_ggtt  ========================
[00:00:51] [PASSED] 1 VF
[00:00:51] [PASSED] 2 VFs
[00:00:51] [PASSED] 3 VFs
[00:00:51] [PASSED] 4 VFs
[00:00:51] [PASSED] 5 VFs
[00:00:51] [PASSED] 6 VFs
[00:00:51] [PASSED] 7 VFs
[00:00:51] [PASSED] 8 VFs
[00:00:51] [PASSED] 9 VFs
[00:00:51] [PASSED] 10 VFs
[00:00:51] [PASSED] 11 VFs
[00:00:51] [PASSED] 12 VFs
[00:00:51] [PASSED] 13 VFs
[00:00:51] [PASSED] 14 VFs
[00:00:51] [PASSED] 15 VFs
[00:00:51] [PASSED] 16 VFs
[00:00:51] [PASSED] 17 VFs
[00:00:51] [PASSED] 18 VFs
[00:00:51] [PASSED] 19 VFs
[00:00:51] [PASSED] 20 VFs
[00:00:51] [PASSED] 21 VFs
[00:00:51] [PASSED] 22 VFs
[00:00:51] [PASSED] 23 VFs
[00:00:51] [PASSED] 24 VFs
[00:00:51] [PASSED] 25 VFs
[00:00:51] [PASSED] 26 VFs
[00:00:51] [PASSED] 27 VFs
[00:00:51] [PASSED] 28 VFs
[00:00:51] [PASSED] 29 VFs
[00:00:51] [PASSED] 30 VFs
[00:00:51] [PASSED] 31 VFs
[00:00:51] [PASSED] 32 VFs
[00:00:51] [PASSED] 33 VFs
[00:00:51] [PASSED] 34 VFs
[00:00:51] [PASSED] 35 VFs
[00:00:51] [PASSED] 36 VFs
[00:00:51] [PASSED] 37 VFs
[00:00:51] [PASSED] 38 VFs
[00:00:51] [PASSED] 39 VFs
[00:00:51] [PASSED] 40 VFs
[00:00:51] [PASSED] 41 VFs
[00:00:51] [PASSED] 42 VFs
[00:00:51] [PASSED] 43 VFs
[00:00:51] [PASSED] 44 VFs
[00:00:51] [PASSED] 45 VFs
[00:00:51] [PASSED] 46 VFs
[00:00:51] [PASSED] 47 VFs
[00:00:51] [PASSED] 48 VFs
[00:00:51] [PASSED] 49 VFs
[00:00:51] [PASSED] 50 VFs
[00:00:51] [PASSED] 51 VFs
[00:00:51] [PASSED] 52 VFs
[00:00:51] [PASSED] 53 VFs
[00:00:51] [PASSED] 54 VFs
[00:00:51] [PASSED] 55 VFs
[00:00:51] [PASSED] 56 VFs
[00:00:51] [PASSED] 57 VFs
[00:00:51] [PASSED] 58 VFs
[00:00:51] [PASSED] 59 VFs
[00:00:51] [PASSED] 60 VFs
[00:00:51] [PASSED] 61 VFs
[00:00:51] [PASSED] 62 VFs
[00:00:51] [PASSED] 63 VFs
[00:00:51] ==================== [PASSED] fair_ggtt ====================
[00:00:51] ======================== fair_vram  ========================
[00:00:51] [PASSED] 1 VF
[00:00:51] [PASSED] 2 VFs
[00:00:51] [PASSED] 3 VFs
[00:00:51] [PASSED] 4 VFs
[00:00:51] [PASSED] 5 VFs
[00:00:51] [PASSED] 6 VFs
[00:00:51] [PASSED] 7 VFs
[00:00:51] [PASSED] 8 VFs
[00:00:51] [PASSED] 9 VFs
[00:00:51] [PASSED] 10 VFs
[00:00:51] [PASSED] 11 VFs
[00:00:51] [PASSED] 12 VFs
[00:00:51] [PASSED] 13 VFs
[00:00:51] [PASSED] 14 VFs
[00:00:51] [PASSED] 15 VFs
[00:00:51] [PASSED] 16 VFs
[00:00:51] [PASSED] 17 VFs
[00:00:51] [PASSED] 18 VFs
[00:00:51] [PASSED] 19 VFs
[00:00:51] [PASSED] 20 VFs
[00:00:51] [PASSED] 21 VFs
[00:00:51] [PASSED] 22 VFs
[00:00:51] [PASSED] 23 VFs
[00:00:51] [PASSED] 24 VFs
[00:00:51] [PASSED] 25 VFs
[00:00:51] [PASSED] 26 VFs
[00:00:51] [PASSED] 27 VFs
[00:00:51] [PASSED] 28 VFs
[00:00:51] [PASSED] 29 VFs
[00:00:51] [PASSED] 30 VFs
[00:00:51] [PASSED] 31 VFs
[00:00:51] [PASSED] 32 VFs
[00:00:51] [PASSED] 33 VFs
[00:00:51] [PASSED] 34 VFs
[00:00:51] [PASSED] 35 VFs
[00:00:51] [PASSED] 36 VFs
[00:00:51] [PASSED] 37 VFs
[00:00:51] [PASSED] 38 VFs
[00:00:51] [PASSED] 39 VFs
[00:00:51] [PASSED] 40 VFs
[00:00:51] [PASSED] 41 VFs
[00:00:51] [PASSED] 42 VFs
[00:00:51] [PASSED] 43 VFs
[00:00:51] [PASSED] 44 VFs
[00:00:51] [PASSED] 45 VFs
[00:00:51] [PASSED] 46 VFs
[00:00:51] [PASSED] 47 VFs
[00:00:51] [PASSED] 48 VFs
[00:00:51] [PASSED] 49 VFs
[00:00:51] [PASSED] 50 VFs
[00:00:51] [PASSED] 51 VFs
[00:00:51] [PASSED] 52 VFs
[00:00:51] [PASSED] 53 VFs
[00:00:51] [PASSED] 54 VFs
[00:00:51] [PASSED] 55 VFs
[00:00:51] [PASSED] 56 VFs
[00:00:51] [PASSED] 57 VFs
[00:00:51] [PASSED] 58 VFs
[00:00:51] [PASSED] 59 VFs
[00:00:51] [PASSED] 60 VFs
[00:00:51] [PASSED] 61 VFs
[00:00:51] [PASSED] 62 VFs
[00:00:51] [PASSED] 63 VFs
[00:00:51] ==================== [PASSED] fair_vram ====================
[00:00:51] ================== [PASSED] pf_gt_config ===================
[00:00:51] ===================== lmtt (1 subtest) =====================
[00:00:51] ======================== test_ops  =========================
[00:00:51] [PASSED] 2-level
[00:00:51] [PASSED] multi-level
[00:00:51] ==================== [PASSED] test_ops =====================
[00:00:51] ====================== [PASSED] lmtt =======================
[00:00:51] ================= pf_service (11 subtests) =================
[00:00:51] [PASSED] pf_negotiate_any
[00:00:51] [PASSED] pf_negotiate_base_match
[00:00:51] [PASSED] pf_negotiate_base_newer
[00:00:51] [PASSED] pf_negotiate_base_next
[00:00:51] [SKIPPED] pf_negotiate_base_older
[00:00:51] [PASSED] pf_negotiate_base_prev
[00:00:51] [PASSED] pf_negotiate_latest_match
[00:00:51] [PASSED] pf_negotiate_latest_newer
[00:00:51] [PASSED] pf_negotiate_latest_next
[00:00:51] [SKIPPED] pf_negotiate_latest_older
[00:00:51] [SKIPPED] pf_negotiate_latest_prev
[00:00:51] =================== [PASSED] pf_service ====================
[00:00:51] ================= xe_guc_g2g (2 subtests) ==================
[00:00:51] ============== xe_live_guc_g2g_kunit_default  ==============
[00:00:51] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[00:00:51] ============== xe_live_guc_g2g_kunit_allmem  ===============
[00:00:51] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[00:00:51] =================== [SKIPPED] xe_guc_g2g ===================
[00:00:51] =================== xe_mocs (2 subtests) ===================
[00:00:51] ================ xe_live_mocs_kernel_kunit  ================
[00:00:51] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[00:00:51] ================ xe_live_mocs_reset_kunit  =================
[00:00:51] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[00:00:51] ==================== [SKIPPED] xe_mocs =====================
[00:00:51] ================= xe_migrate (2 subtests) ==================
[00:00:51] ================= xe_migrate_sanity_kunit  =================
[00:00:51] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[00:00:51] ================== xe_validate_ccs_kunit  ==================
[00:00:51] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[00:00:51] =================== [SKIPPED] xe_migrate ===================
[00:00:51] ================== xe_dma_buf (1 subtest) ==================
[00:00:51] ==================== xe_dma_buf_kunit  =====================
[00:00:51] ================ [SKIPPED] xe_dma_buf_kunit ================
[00:00:51] =================== [SKIPPED] xe_dma_buf ===================
[00:00:51] ================= xe_bo_shrink (1 subtest) =================
[00:00:51] =================== xe_bo_shrink_kunit  ====================
[00:00:51] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[00:00:51] ================== [SKIPPED] xe_bo_shrink ==================
[00:00:51] ==================== xe_bo (2 subtests) ====================
[00:00:51] ================== xe_ccs_migrate_kunit  ===================
[00:00:51] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[00:00:51] ==================== xe_bo_evict_kunit  ====================
[00:00:51] =============== [SKIPPED] xe_bo_evict_kunit ================
[00:00:51] ===================== [SKIPPED] xe_bo ======================
[00:00:51] ==================== args (13 subtests) ====================
[00:00:51] [PASSED] count_args_test
[00:00:51] [PASSED] call_args_example
[00:00:51] [PASSED] call_args_test
[00:00:51] [PASSED] drop_first_arg_example
[00:00:51] [PASSED] drop_first_arg_test
[00:00:51] [PASSED] first_arg_example
[00:00:51] [PASSED] first_arg_test
[00:00:51] [PASSED] last_arg_example
[00:00:51] [PASSED] last_arg_test
[00:00:51] [PASSED] pick_arg_example
[00:00:51] [PASSED] if_args_example
[00:00:51] [PASSED] if_args_test
[00:00:51] [PASSED] sep_comma_example
[00:00:51] ====================== [PASSED] args =======================
[00:00:51] =================== xe_pci (3 subtests) ====================
[00:00:51] ==================== check_graphics_ip  ====================
[00:00:51] [PASSED] 12.00 Xe_LP
[00:00:51] [PASSED] 12.10 Xe_LP+
[00:00:51] [PASSED] 12.55 Xe_HPG
[00:00:51] [PASSED] 12.60 Xe_HPC
[00:00:51] [PASSED] 12.70 Xe_LPG
[00:00:51] [PASSED] 12.71 Xe_LPG
[00:00:51] [PASSED] 12.74 Xe_LPG+
[00:00:51] [PASSED] 20.01 Xe2_HPG
[00:00:51] [PASSED] 20.02 Xe2_HPG
[00:00:51] [PASSED] 20.04 Xe2_LPG
[00:00:51] [PASSED] 30.00 Xe3_LPG
[00:00:51] [PASSED] 30.01 Xe3_LPG
[00:00:51] [PASSED] 30.03 Xe3_LPG
[00:00:51] [PASSED] 30.04 Xe3_LPG
[00:00:51] [PASSED] 30.05 Xe3_LPG
[00:00:51] [PASSED] 35.10 Xe3p_LPG
[00:00:51] [PASSED] 35.11 Xe3p_XPC
[00:00:51] ================ [PASSED] check_graphics_ip ================
[00:00:51] ===================== check_media_ip  ======================
[00:00:51] [PASSED] 12.00 Xe_M
[00:00:51] [PASSED] 12.55 Xe_HPM
[00:00:51] [PASSED] 13.00 Xe_LPM+
[00:00:51] [PASSED] 13.01 Xe2_HPM
[00:00:51] [PASSED] 20.00 Xe2_LPM
[00:00:51] [PASSED] 30.00 Xe3_LPM
[00:00:51] [PASSED] 30.02 Xe3_LPM
[00:00:51] [PASSED] 35.00 Xe3p_LPM
[00:00:51] [PASSED] 35.03 Xe3p_HPM
[00:00:51] ================= [PASSED] check_media_ip ==================
[00:00:51] =================== check_platform_desc  ===================
[00:00:51] [PASSED] 0x9A60 (TIGERLAKE)
[00:00:51] [PASSED] 0x9A68 (TIGERLAKE)
[00:00:51] [PASSED] 0x9A70 (TIGERLAKE)
[00:00:51] [PASSED] 0x9A40 (TIGERLAKE)
[00:00:51] [PASSED] 0x9A49 (TIGERLAKE)
[00:00:51] [PASSED] 0x9A59 (TIGERLAKE)
[00:00:51] [PASSED] 0x9A78 (TIGERLAKE)
[00:00:51] [PASSED] 0x9AC0 (TIGERLAKE)
[00:00:51] [PASSED] 0x9AC9 (TIGERLAKE)
[00:00:51] [PASSED] 0x9AD9 (TIGERLAKE)
[00:00:51] [PASSED] 0x9AF8 (TIGERLAKE)
[00:00:51] [PASSED] 0x4C80 (ROCKETLAKE)
[00:00:51] [PASSED] 0x4C8A (ROCKETLAKE)
[00:00:51] [PASSED] 0x4C8B (ROCKETLAKE)
[00:00:51] [PASSED] 0x4C8C (ROCKETLAKE)
[00:00:51] [PASSED] 0x4C90 (ROCKETLAKE)
[00:00:51] [PASSED] 0x4C9A (ROCKETLAKE)
[00:00:51] [PASSED] 0x4680 (ALDERLAKE_S)
[00:00:51] [PASSED] 0x4682 (ALDERLAKE_S)
[00:00:51] [PASSED] 0x4688 (ALDERLAKE_S)
[00:00:51] [PASSED] 0x468A (ALDERLAKE_S)
[00:00:51] [PASSED] 0x468B (ALDERLAKE_S)
[00:00:51] [PASSED] 0x4690 (ALDERLAKE_S)
[00:00:51] [PASSED] 0x4692 (ALDERLAKE_S)
[00:00:51] [PASSED] 0x4693 (ALDERLAKE_S)
[00:00:51] [PASSED] 0x46A0 (ALDERLAKE_P)
[00:00:51] [PASSED] 0x46A1 (ALDERLAKE_P)
[00:00:51] [PASSED] 0x46A2 (ALDERLAKE_P)
[00:00:51] [PASSED] 0x46A3 (ALDERLAKE_P)
[00:00:51] [PASSED] 0x46A6 (ALDERLAKE_P)
[00:00:51] [PASSED] 0x46A8 (ALDERLAKE_P)
[00:00:51] [PASSED] 0x46AA (ALDERLAKE_P)
[00:00:51] [PASSED] 0x462A (ALDERLAKE_P)
[00:00:51] [PASSED] 0x4626 (ALDERLAKE_P)
[00:00:51] [PASSED] 0x4628 (ALDERLAKE_P)
[00:00:51] [PASSED] 0x46B0 (ALDERLAKE_P)
[00:00:51] [PASSED] 0x46B1 (ALDERLAKE_P)
[00:00:51] [PASSED] 0x46B2 (ALDERLAKE_P)
[00:00:51] [PASSED] 0x46B3 (ALDERLAKE_P)
[00:00:51] [PASSED] 0x46C0 (ALDERLAKE_P)
[00:00:51] [PASSED] 0x46C1 (ALDERLAKE_P)
[00:00:51] [PASSED] 0x46C2 (ALDERLAKE_P)
[00:00:51] [PASSED] 0x46C3 (ALDERLAKE_P)
[00:00:51] [PASSED] 0x46D0 (ALDERLAKE_N)
[00:00:51] [PASSED] 0x46D1 (ALDERLAKE_N)
[00:00:51] [PASSED] 0x46D2 (ALDERLAKE_N)
[00:00:51] [PASSED] 0x46D3 (ALDERLAKE_N)
[00:00:51] [PASSED] 0x46D4 (ALDERLAKE_N)
[00:00:51] [PASSED] 0xA721 (ALDERLAKE_P)
[00:00:51] [PASSED] 0xA7A1 (ALDERLAKE_P)
[00:00:51] [PASSED] 0xA7A9 (ALDERLAKE_P)
[00:00:51] [PASSED] 0xA7AC (ALDERLAKE_P)
[00:00:51] [PASSED] 0xA7AD (ALDERLAKE_P)
[00:00:51] [PASSED] 0xA720 (ALDERLAKE_P)
[00:00:51] [PASSED] 0xA7A0 (ALDERLAKE_P)
[00:00:51] [PASSED] 0xA7A8 (ALDERLAKE_P)
[00:00:51] [PASSED] 0xA7AA (ALDERLAKE_P)
[00:00:51] [PASSED] 0xA7AB (ALDERLAKE_P)
[00:00:51] [PASSED] 0xA780 (ALDERLAKE_S)
[00:00:51] [PASSED] 0xA781 (ALDERLAKE_S)
[00:00:51] [PASSED] 0xA782 (ALDERLAKE_S)
[00:00:51] [PASSED] 0xA783 (ALDERLAKE_S)
[00:00:51] [PASSED] 0xA788 (ALDERLAKE_S)
[00:00:51] [PASSED] 0xA789 (ALDERLAKE_S)
[00:00:51] [PASSED] 0xA78A (ALDERLAKE_S)
[00:00:51] [PASSED] 0xA78B (ALDERLAKE_S)
[00:00:51] [PASSED] 0x4905 (DG1)
[00:00:51] [PASSED] 0x4906 (DG1)
[00:00:51] [PASSED] 0x4907 (DG1)
[00:00:51] [PASSED] 0x4908 (DG1)
[00:00:51] [PASSED] 0x4909 (DG1)
[00:00:51] [PASSED] 0x56C0 (DG2)
[00:00:51] [PASSED] 0x56C2 (DG2)
[00:00:51] [PASSED] 0x56C1 (DG2)
[00:00:51] [PASSED] 0x7D51 (METEORLAKE)
[00:00:51] [PASSED] 0x7DD1 (METEORLAKE)
[00:00:51] [PASSED] 0x7D41 (METEORLAKE)
[00:00:51] [PASSED] 0x7D67 (METEORLAKE)
[00:00:51] [PASSED] 0xB640 (METEORLAKE)
[00:00:51] [PASSED] 0x56A0 (DG2)
[00:00:51] [PASSED] 0x56A1 (DG2)
[00:00:51] [PASSED] 0x56A2 (DG2)
[00:00:51] [PASSED] 0x56BE (DG2)
[00:00:51] [PASSED] 0x56BF (DG2)
[00:00:51] [PASSED] 0x5690 (DG2)
[00:00:51] [PASSED] 0x5691 (DG2)
[00:00:51] [PASSED] 0x5692 (DG2)
[00:00:51] [PASSED] 0x56A5 (DG2)
[00:00:51] [PASSED] 0x56A6 (DG2)
[00:00:51] [PASSED] 0x56B0 (DG2)
[00:00:51] [PASSED] 0x56B1 (DG2)
[00:00:51] [PASSED] 0x56BA (DG2)
[00:00:51] [PASSED] 0x56BB (DG2)
[00:00:51] [PASSED] 0x56BC (DG2)
[00:00:51] [PASSED] 0x56BD (DG2)
[00:00:51] [PASSED] 0x5693 (DG2)
[00:00:51] [PASSED] 0x5694 (DG2)
[00:00:51] [PASSED] 0x5695 (DG2)
[00:00:51] [PASSED] 0x56A3 (DG2)
[00:00:51] [PASSED] 0x56A4 (DG2)
[00:00:51] [PASSED] 0x56B2 (DG2)
[00:00:51] [PASSED] 0x56B3 (DG2)
[00:00:51] [PASSED] 0x5696 (DG2)
[00:00:51] [PASSED] 0x5697 (DG2)
[00:00:51] [PASSED] 0xB69 (PVC)
[00:00:51] [PASSED] 0xB6E (PVC)
[00:00:51] [PASSED] 0xBD4 (PVC)
[00:00:51] [PASSED] 0xBD5 (PVC)
[00:00:51] [PASSED] 0xBD6 (PVC)
[00:00:51] [PASSED] 0xBD7 (PVC)
[00:00:51] [PASSED] 0xBD8 (PVC)
[00:00:51] [PASSED] 0xBD9 (PVC)
[00:00:51] [PASSED] 0xBDA (PVC)
[00:00:51] [PASSED] 0xBDB (PVC)
[00:00:51] [PASSED] 0xBE0 (PVC)
[00:00:51] [PASSED] 0xBE1 (PVC)
[00:00:51] [PASSED] 0xBE5 (PVC)
[00:00:51] [PASSED] 0x7D40 (METEORLAKE)
[00:00:51] [PASSED] 0x7D45 (METEORLAKE)
[00:00:51] [PASSED] 0x7D55 (METEORLAKE)
[00:00:51] [PASSED] 0x7D60 (METEORLAKE)
[00:00:51] [PASSED] 0x7DD5 (METEORLAKE)
[00:00:51] [PASSED] 0x6420 (LUNARLAKE)
[00:00:51] [PASSED] 0x64A0 (LUNARLAKE)
[00:00:51] [PASSED] 0x64B0 (LUNARLAKE)
[00:00:51] [PASSED] 0xE202 (BATTLEMAGE)
[00:00:51] [PASSED] 0xE209 (BATTLEMAGE)
[00:00:51] [PASSED] 0xE20B (BATTLEMAGE)
[00:00:51] [PASSED] 0xE20C (BATTLEMAGE)
[00:00:51] [PASSED] 0xE20D (BATTLEMAGE)
[00:00:51] [PASSED] 0xE210 (BATTLEMAGE)
[00:00:51] [PASSED] 0xE211 (BATTLEMAGE)
[00:00:51] [PASSED] 0xE212 (BATTLEMAGE)
[00:00:51] [PASSED] 0xE216 (BATTLEMAGE)
[00:00:51] [PASSED] 0xE220 (BATTLEMAGE)
[00:00:51] [PASSED] 0xE221 (BATTLEMAGE)
[00:00:51] [PASSED] 0xE222 (BATTLEMAGE)
[00:00:51] [PASSED] 0xE223 (BATTLEMAGE)
[00:00:51] [PASSED] 0xB080 (PANTHERLAKE)
[00:00:51] [PASSED] 0xB081 (PANTHERLAKE)
[00:00:51] [PASSED] 0xB082 (PANTHERLAKE)
[00:00:51] [PASSED] 0xB083 (PANTHERLAKE)
[00:00:51] [PASSED] 0xB084 (PANTHERLAKE)
[00:00:51] [PASSED] 0xB085 (PANTHERLAKE)
[00:00:51] [PASSED] 0xB086 (PANTHERLAKE)
[00:00:51] [PASSED] 0xB087 (PANTHERLAKE)
[00:00:51] [PASSED] 0xB08F (PANTHERLAKE)
[00:00:51] [PASSED] 0xB090 (PANTHERLAKE)
[00:00:51] [PASSED] 0xB0A0 (PANTHERLAKE)
[00:00:51] [PASSED] 0xB0B0 (PANTHERLAKE)
[00:00:51] [PASSED] 0xFD80 (PANTHERLAKE)
[00:00:51] [PASSED] 0xFD81 (PANTHERLAKE)
[00:00:51] [PASSED] 0xD740 (NOVALAKE_S)
[00:00:51] [PASSED] 0xD741 (NOVALAKE_S)
[00:00:51] [PASSED] 0xD742 (NOVALAKE_S)
[00:00:51] [PASSED] 0xD743 (NOVALAKE_S)
[00:00:51] [PASSED] 0xD744 (NOVALAKE_S)
[00:00:51] [PASSED] 0xD745 (NOVALAKE_S)
[00:00:51] [PASSED] 0x674C (CRESCENTISLAND)
[00:00:51] [PASSED] 0xD750 (NOVALAKE_P)
[00:00:51] [PASSED] 0xD751 (NOVALAKE_P)
[00:00:51] [PASSED] 0xD752 (NOVALAKE_P)
[00:00:51] [PASSED] 0xD753 (NOVALAKE_P)
[00:00:51] [PASSED] 0xD754 (NOVALAKE_P)
[00:00:51] [PASSED] 0xD755 (NOVALAKE_P)
[00:00:51] [PASSED] 0xD756 (NOVALAKE_P)
[00:00:51] [PASSED] 0xD757 (NOVALAKE_P)
[00:00:51] [PASSED] 0xD75F (NOVALAKE_P)
[00:00:51] =============== [PASSED] check_platform_desc ===============
[00:00:51] ===================== [PASSED] xe_pci ======================
[00:00:51] =================== xe_rtp (2 subtests) ====================
[00:00:51] =============== xe_rtp_process_to_sr_tests  ================
[00:00:51] [PASSED] coalesce-same-reg
[00:00:51] [PASSED] no-match-no-add
[00:00:51] [PASSED] match-or
[00:00:51] [PASSED] match-or-xfail
[00:00:51] [PASSED] no-match-no-add-multiple-rules
[00:00:51] [PASSED] two-regs-two-entries
[00:00:51] [PASSED] clr-one-set-other
[00:00:51] [PASSED] set-field
[00:00:51] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[00:00:51] [PASSED] conflict-not-disjoint
[00:00:51] [PASSED] conflict-reg-type
[00:00:51] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[00:00:51] ================== xe_rtp_process_tests  ===================
[00:00:51] [PASSED] active1
[00:00:51] [PASSED] active2
[00:00:51] [PASSED] active-inactive
[00:00:51] [PASSED] inactive-active
[00:00:51] [PASSED] inactive-1st_or_active-inactive
[00:00:51] [PASSED] inactive-2nd_or_active-inactive
[00:00:51] [PASSED] inactive-last_or_active-inactive
[00:00:51] [PASSED] inactive-no_or_active-inactive
[00:00:51] ============== [PASSED] xe_rtp_process_tests ===============
[00:00:51] ===================== [PASSED] xe_rtp ======================
[00:00:51] ==================== xe_wa (1 subtest) =====================
[00:00:51] ======================== xe_wa_gt  =========================
[00:00:51] [PASSED] TIGERLAKE B0
[00:00:51] [PASSED] DG1 A0
[00:00:51] [PASSED] DG1 B0
[00:00:51] [PASSED] ALDERLAKE_S A0
[00:00:51] [PASSED] ALDERLAKE_S B0
[00:00:51] [PASSED] ALDERLAKE_S C0
[00:00:51] [PASSED] ALDERLAKE_S D0
[00:00:51] [PASSED] ALDERLAKE_P A0
[00:00:51] [PASSED] ALDERLAKE_P B0
[00:00:51] [PASSED] ALDERLAKE_P C0
[00:00:51] [PASSED] ALDERLAKE_S RPLS D0
[00:00:51] [PASSED] ALDERLAKE_P RPLU E0
[00:00:51] [PASSED] DG2 G10 C0
[00:00:51] [PASSED] DG2 G11 B1
[00:00:51] [PASSED] DG2 G12 A1
[00:00:51] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[00:00:51] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[00:00:51] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[00:00:51] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[00:00:51] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[00:00:51] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[00:00:51] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[00:00:51] ==================== [PASSED] xe_wa_gt =====================
[00:00:51] ====================== [PASSED] xe_wa ======================
[00:00:51] ============================================================
[00:00:51] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[00:00:51] Elapsed time: 35.910s total, 4.312s configuring, 30.981s building, 0.591s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[00:00:51] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[00:00:53] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[00:01:17] Starting KUnit Kernel (1/1)...
[00:01:17] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[00:01:18] ============ drm_test_pick_cmdline (2 subtests) ============
[00:01:18] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[00:01:18] =============== drm_test_pick_cmdline_named  ===============
[00:01:18] [PASSED] NTSC
[00:01:18] [PASSED] NTSC-J
[00:01:18] [PASSED] PAL
[00:01:18] [PASSED] PAL-M
[00:01:18] =========== [PASSED] drm_test_pick_cmdline_named ===========
[00:01:18] ============== [PASSED] drm_test_pick_cmdline ==============
[00:01:18] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[00:01:18] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[00:01:18] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[00:01:18] =========== drm_validate_clone_mode (2 subtests) ===========
[00:01:18] ============== drm_test_check_in_clone_mode  ===============
[00:01:18] [PASSED] in_clone_mode
[00:01:18] [PASSED] not_in_clone_mode
[00:01:18] ========== [PASSED] drm_test_check_in_clone_mode ===========
[00:01:18] =============== drm_test_check_valid_clones  ===============
[00:01:18] [PASSED] not_in_clone_mode
[00:01:18] [PASSED] valid_clone
[00:01:18] [PASSED] invalid_clone
[00:01:18] =========== [PASSED] drm_test_check_valid_clones ===========
[00:01:18] ============= [PASSED] drm_validate_clone_mode =============
[00:01:18] ============= drm_validate_modeset (1 subtest) =============
[00:01:18] [PASSED] drm_test_check_connector_changed_modeset
[00:01:18] ============== [PASSED] drm_validate_modeset ===============
[00:01:18] ====== drm_test_bridge_get_current_state (2 subtests) ======
[00:01:18] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[00:01:18] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[00:01:18] ======== [PASSED] drm_test_bridge_get_current_state ========
[00:01:18] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[00:01:18] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[00:01:18] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[00:01:18] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[00:01:18] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[00:01:18] ============== drm_bridge_alloc (2 subtests) ===============
[00:01:18] [PASSED] drm_test_drm_bridge_alloc_basic
[00:01:18] [PASSED] drm_test_drm_bridge_alloc_get_put
[00:01:18] ================ [PASSED] drm_bridge_alloc =================
[00:01:18] ============= drm_cmdline_parser (40 subtests) =============
[00:01:18] [PASSED] drm_test_cmdline_force_d_only
[00:01:18] [PASSED] drm_test_cmdline_force_D_only_dvi
[00:01:18] [PASSED] drm_test_cmdline_force_D_only_hdmi
[00:01:18] [PASSED] drm_test_cmdline_force_D_only_not_digital
[00:01:18] [PASSED] drm_test_cmdline_force_e_only
[00:01:18] [PASSED] drm_test_cmdline_res
[00:01:18] [PASSED] drm_test_cmdline_res_vesa
[00:01:18] [PASSED] drm_test_cmdline_res_vesa_rblank
[00:01:18] [PASSED] drm_test_cmdline_res_rblank
[00:01:18] [PASSED] drm_test_cmdline_res_bpp
[00:01:18] [PASSED] drm_test_cmdline_res_refresh
[00:01:18] [PASSED] drm_test_cmdline_res_bpp_refresh
[00:01:18] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[00:01:18] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[00:01:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[00:01:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[00:01:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[00:01:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[00:01:18] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[00:01:18] [PASSED] drm_test_cmdline_res_margins_force_on
[00:01:18] [PASSED] drm_test_cmdline_res_vesa_margins
[00:01:18] [PASSED] drm_test_cmdline_name
[00:01:18] [PASSED] drm_test_cmdline_name_bpp
[00:01:18] [PASSED] drm_test_cmdline_name_option
[00:01:18] [PASSED] drm_test_cmdline_name_bpp_option
[00:01:18] [PASSED] drm_test_cmdline_rotate_0
[00:01:18] [PASSED] drm_test_cmdline_rotate_90
[00:01:18] [PASSED] drm_test_cmdline_rotate_180
[00:01:18] [PASSED] drm_test_cmdline_rotate_270
[00:01:18] [PASSED] drm_test_cmdline_hmirror
[00:01:18] [PASSED] drm_test_cmdline_vmirror
[00:01:18] [PASSED] drm_test_cmdline_margin_options
[00:01:18] [PASSED] drm_test_cmdline_multiple_options
[00:01:18] [PASSED] drm_test_cmdline_bpp_extra_and_option
[00:01:18] [PASSED] drm_test_cmdline_extra_and_option
[00:01:18] [PASSED] drm_test_cmdline_freestanding_options
[00:01:18] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[00:01:18] [PASSED] drm_test_cmdline_panel_orientation
[00:01:18] ================ drm_test_cmdline_invalid  =================
[00:01:18] [PASSED] margin_only
[00:01:18] [PASSED] interlace_only
[00:01:18] [PASSED] res_missing_x
[00:01:18] [PASSED] res_missing_y
[00:01:18] [PASSED] res_bad_y
[00:01:18] [PASSED] res_missing_y_bpp
[00:01:18] [PASSED] res_bad_bpp
[00:01:18] [PASSED] res_bad_refresh
[00:01:18] [PASSED] res_bpp_refresh_force_on_off
[00:01:18] [PASSED] res_invalid_mode
[00:01:18] [PASSED] res_bpp_wrong_place_mode
[00:01:18] [PASSED] name_bpp_refresh
[00:01:18] [PASSED] name_refresh
[00:01:18] [PASSED] name_refresh_wrong_mode
[00:01:18] [PASSED] name_refresh_invalid_mode
[00:01:18] [PASSED] rotate_multiple
[00:01:18] [PASSED] rotate_invalid_val
[00:01:18] [PASSED] rotate_truncated
[00:01:18] [PASSED] invalid_option
[00:01:18] [PASSED] invalid_tv_option
[00:01:18] [PASSED] truncated_tv_option
[00:01:18] ============ [PASSED] drm_test_cmdline_invalid =============
[00:01:18] =============== drm_test_cmdline_tv_options  ===============
[00:01:18] [PASSED] NTSC
[00:01:18] [PASSED] NTSC_443
[00:01:18] [PASSED] NTSC_J
[00:01:18] [PASSED] PAL
[00:01:18] [PASSED] PAL_M
[00:01:18] [PASSED] PAL_N
[00:01:18] [PASSED] SECAM
[00:01:18] [PASSED] MONO_525
[00:01:18] [PASSED] MONO_625
[00:01:18] =========== [PASSED] drm_test_cmdline_tv_options ===========
[00:01:18] =============== [PASSED] drm_cmdline_parser ================
[00:01:18] ========== drmm_connector_hdmi_init (20 subtests) ==========
[00:01:18] [PASSED] drm_test_connector_hdmi_init_valid
[00:01:18] [PASSED] drm_test_connector_hdmi_init_bpc_8
[00:01:18] [PASSED] drm_test_connector_hdmi_init_bpc_10
[00:01:18] [PASSED] drm_test_connector_hdmi_init_bpc_12
[00:01:18] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[00:01:18] [PASSED] drm_test_connector_hdmi_init_bpc_null
[00:01:18] [PASSED] drm_test_connector_hdmi_init_formats_empty
[00:01:18] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[00:01:18] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[00:01:18] [PASSED] supported_formats=0x9 yuv420_allowed=1
[00:01:18] [PASSED] supported_formats=0x9 yuv420_allowed=0
[00:01:18] [PASSED] supported_formats=0x5 yuv420_allowed=1
[00:01:18] [PASSED] supported_formats=0x5 yuv420_allowed=0
[00:01:18] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[00:01:18] [PASSED] drm_test_connector_hdmi_init_null_ddc
[00:01:18] [PASSED] drm_test_connector_hdmi_init_null_product
[00:01:18] [PASSED] drm_test_connector_hdmi_init_null_vendor
[00:01:18] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[00:01:18] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[00:01:18] [PASSED] drm_test_connector_hdmi_init_product_valid
[00:01:18] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[00:01:18] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[00:01:18] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[00:01:18] ========= drm_test_connector_hdmi_init_type_valid  =========
[00:01:18] [PASSED] HDMI-A
[00:01:18] [PASSED] HDMI-B
[00:01:18] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[00:01:18] ======== drm_test_connector_hdmi_init_type_invalid  ========
[00:01:18] [PASSED] Unknown
[00:01:18] [PASSED] VGA
[00:01:18] [PASSED] DVI-I
[00:01:18] [PASSED] DVI-D
[00:01:18] [PASSED] DVI-A
[00:01:18] [PASSED] Composite
[00:01:18] [PASSED] SVIDEO
[00:01:18] [PASSED] LVDS
[00:01:18] [PASSED] Component
[00:01:18] [PASSED] DIN
[00:01:18] [PASSED] DP
[00:01:18] [PASSED] TV
[00:01:18] [PASSED] eDP
[00:01:18] [PASSED] Virtual
[00:01:18] [PASSED] DSI
[00:01:18] [PASSED] DPI
[00:01:18] [PASSED] Writeback
[00:01:18] [PASSED] SPI
[00:01:18] [PASSED] USB
[00:01:18] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[00:01:18] ============ [PASSED] drmm_connector_hdmi_init =============
[00:01:18] ============= drmm_connector_init (3 subtests) =============
[00:01:18] [PASSED] drm_test_drmm_connector_init
[00:01:18] [PASSED] drm_test_drmm_connector_init_null_ddc
[00:01:18] ========= drm_test_drmm_connector_init_type_valid  =========
[00:01:18] [PASSED] Unknown
[00:01:18] [PASSED] VGA
[00:01:18] [PASSED] DVI-I
[00:01:18] [PASSED] DVI-D
[00:01:18] [PASSED] DVI-A
[00:01:18] [PASSED] Composite
[00:01:18] [PASSED] SVIDEO
[00:01:18] [PASSED] LVDS
[00:01:18] [PASSED] Component
[00:01:18] [PASSED] DIN
[00:01:18] [PASSED] DP
[00:01:18] [PASSED] HDMI-A
[00:01:18] [PASSED] HDMI-B
[00:01:18] [PASSED] TV
[00:01:18] [PASSED] eDP
[00:01:18] [PASSED] Virtual
[00:01:18] [PASSED] DSI
[00:01:18] [PASSED] DPI
[00:01:18] [PASSED] Writeback
[00:01:18] [PASSED] SPI
[00:01:18] [PASSED] USB
[00:01:18] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[00:01:18] =============== [PASSED] drmm_connector_init ===============
[00:01:18] ========= drm_connector_dynamic_init (6 subtests) ==========
[00:01:18] [PASSED] drm_test_drm_connector_dynamic_init
[00:01:18] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[00:01:18] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[00:01:18] [PASSED] drm_test_drm_connector_dynamic_init_properties
[00:01:18] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[00:01:18] [PASSED] Unknown
[00:01:18] [PASSED] VGA
[00:01:18] [PASSED] DVI-I
[00:01:18] [PASSED] DVI-D
[00:01:18] [PASSED] DVI-A
[00:01:18] [PASSED] Composite
[00:01:18] [PASSED] SVIDEO
[00:01:18] [PASSED] LVDS
[00:01:18] [PASSED] Component
[00:01:18] [PASSED] DIN
[00:01:18] [PASSED] DP
[00:01:18] [PASSED] HDMI-A
[00:01:18] [PASSED] HDMI-B
[00:01:18] [PASSED] TV
[00:01:18] [PASSED] eDP
[00:01:18] [PASSED] Virtual
[00:01:18] [PASSED] DSI
[00:01:18] [PASSED] DPI
[00:01:18] [PASSED] Writeback
[00:01:18] [PASSED] SPI
[00:01:18] [PASSED] USB
[00:01:18] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[00:01:18] ======== drm_test_drm_connector_dynamic_init_name  =========
[00:01:18] [PASSED] Unknown
[00:01:18] [PASSED] VGA
[00:01:18] [PASSED] DVI-I
[00:01:18] [PASSED] DVI-D
[00:01:18] [PASSED] DVI-A
[00:01:18] [PASSED] Composite
[00:01:18] [PASSED] SVIDEO
[00:01:18] [PASSED] LVDS
[00:01:18] [PASSED] Component
[00:01:18] [PASSED] DIN
[00:01:18] [PASSED] DP
[00:01:18] [PASSED] HDMI-A
[00:01:18] [PASSED] HDMI-B
[00:01:18] [PASSED] TV
[00:01:18] [PASSED] eDP
[00:01:18] [PASSED] Virtual
[00:01:18] [PASSED] DSI
[00:01:18] [PASSED] DPI
[00:01:18] [PASSED] Writeback
[00:01:18] [PASSED] SPI
[00:01:18] [PASSED] USB
[00:01:18] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[00:01:18] =========== [PASSED] drm_connector_dynamic_init ============
[00:01:18] ==== drm_connector_dynamic_register_early (4 subtests) =====
[00:01:18] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[00:01:18] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[00:01:18] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[00:01:18] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[00:01:18] ====== [PASSED] drm_connector_dynamic_register_early =======
[00:01:18] ======= drm_connector_dynamic_register (7 subtests) ========
[00:01:18] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[00:01:18] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[00:01:18] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[00:01:18] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[00:01:18] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[00:01:18] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[00:01:18] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[00:01:18] ========= [PASSED] drm_connector_dynamic_register ==========
[00:01:18] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[00:01:18] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[00:01:18] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[00:01:18] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[00:01:18] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[00:01:18] ========== drm_test_get_tv_mode_from_name_valid  ===========
[00:01:18] [PASSED] NTSC
[00:01:18] [PASSED] NTSC-443
[00:01:18] [PASSED] NTSC-J
[00:01:18] [PASSED] PAL
[00:01:18] [PASSED] PAL-M
[00:01:18] [PASSED] PAL-N
[00:01:18] [PASSED] SECAM
[00:01:18] [PASSED] Mono
[00:01:18] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[00:01:18] [PASSED] drm_test_get_tv_mode_from_name_truncated
[00:01:18] ============ [PASSED] drm_get_tv_mode_from_name ============
[00:01:18] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[00:01:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[00:01:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[00:01:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[00:01:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[00:01:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[00:01:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[00:01:18] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[00:01:18] [PASSED] VIC 96
[00:01:18] [PASSED] VIC 97
[00:01:18] [PASSED] VIC 101
[00:01:18] [PASSED] VIC 102
[00:01:18] [PASSED] VIC 106
[00:01:18] [PASSED] VIC 107
[00:01:18] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[00:01:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[00:01:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[00:01:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[00:01:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[00:01:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[00:01:18] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[00:01:18] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[00:01:18] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[00:01:18] [PASSED] Automatic
[00:01:18] [PASSED] Full
[00:01:18] [PASSED] Limited 16:235
[00:01:18] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[00:01:18] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[00:01:18] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[00:01:18] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[00:01:18] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[00:01:18] [PASSED] RGB
[00:01:18] [PASSED] YUV 4:2:0
[00:01:18] [PASSED] YUV 4:2:2
[00:01:18] [PASSED] YUV 4:4:4
[00:01:18] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[00:01:18] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[00:01:18] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[00:01:18] ============= drm_damage_helper (21 subtests) ==============
[00:01:18] [PASSED] drm_test_damage_iter_no_damage
[00:01:18] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[00:01:18] [PASSED] drm_test_damage_iter_no_damage_src_moved
[00:01:18] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[00:01:18] [PASSED] drm_test_damage_iter_no_damage_not_visible
[00:01:18] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[00:01:18] [PASSED] drm_test_damage_iter_no_damage_no_fb
[00:01:18] [PASSED] drm_test_damage_iter_simple_damage
[00:01:18] [PASSED] drm_test_damage_iter_single_damage
[00:01:18] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[00:01:18] [PASSED] drm_test_damage_iter_single_damage_outside_src
[00:01:18] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[00:01:18] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[00:01:18] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[00:01:18] [PASSED] drm_test_damage_iter_single_damage_src_moved
[00:01:18] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[00:01:18] [PASSED] drm_test_damage_iter_damage
[00:01:18] [PASSED] drm_test_damage_iter_damage_one_intersect
[00:01:18] [PASSED] drm_test_damage_iter_damage_one_outside
[00:01:18] [PASSED] drm_test_damage_iter_damage_src_moved
[00:01:18] [PASSED] drm_test_damage_iter_damage_not_visible
[00:01:18] ================ [PASSED] drm_damage_helper ================
[00:01:18] ============== drm_dp_mst_helper (3 subtests) ==============
[00:01:18] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[00:01:18] [PASSED] Clock 154000 BPP 30 DSC disabled
[00:01:18] [PASSED] Clock 234000 BPP 30 DSC disabled
[00:01:18] [PASSED] Clock 297000 BPP 24 DSC disabled
[00:01:18] [PASSED] Clock 332880 BPP 24 DSC enabled
[00:01:18] [PASSED] Clock 324540 BPP 24 DSC enabled
[00:01:18] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[00:01:18] ============== drm_test_dp_mst_calc_pbn_div  ===============
[00:01:18] [PASSED] Link rate 2000000 lane count 4
[00:01:18] [PASSED] Link rate 2000000 lane count 2
[00:01:18] [PASSED] Link rate 2000000 lane count 1
[00:01:18] [PASSED] Link rate 1350000 lane count 4
[00:01:18] [PASSED] Link rate 1350000 lane count 2
[00:01:18] [PASSED] Link rate 1350000 lane count 1
[00:01:18] [PASSED] Link rate 1000000 lane count 4
[00:01:18] [PASSED] Link rate 1000000 lane count 2
[00:01:18] [PASSED] Link rate 1000000 lane count 1
[00:01:18] [PASSED] Link rate 810000 lane count 4
[00:01:18] [PASSED] Link rate 810000 lane count 2
[00:01:18] [PASSED] Link rate 810000 lane count 1
[00:01:18] [PASSED] Link rate 540000 lane count 4
[00:01:18] [PASSED] Link rate 540000 lane count 2
[00:01:18] [PASSED] Link rate 540000 lane count 1
[00:01:18] [PASSED] Link rate 270000 lane count 4
[00:01:18] [PASSED] Link rate 270000 lane count 2
[00:01:18] [PASSED] Link rate 270000 lane count 1
[00:01:18] [PASSED] Link rate 162000 lane count 4
[00:01:18] [PASSED] Link rate 162000 lane count 2
[00:01:18] [PASSED] Link rate 162000 lane count 1
[00:01:18] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[00:01:18] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[00:01:18] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[00:01:18] [PASSED] DP_POWER_UP_PHY with port number
[00:01:18] [PASSED] DP_POWER_DOWN_PHY with port number
[00:01:18] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[00:01:18] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[00:01:18] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[00:01:18] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[00:01:18] [PASSED] DP_QUERY_PAYLOAD with port number
[00:01:18] [PASSED] DP_QUERY_PAYLOAD with VCPI
[00:01:18] [PASSED] DP_REMOTE_DPCD_READ with port number
[00:01:18] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[00:01:18] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[00:01:18] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[00:01:18] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[00:01:18] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[00:01:18] [PASSED] DP_REMOTE_I2C_READ with port number
[00:01:18] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[00:01:18] [PASSED] DP_REMOTE_I2C_READ with transactions array
[00:01:18] [PASSED] DP_REMOTE_I2C_WRITE with port number
[00:01:18] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[00:01:18] [PASSED] DP_REMOTE_I2C_WRITE with data array
[00:01:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[00:01:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[00:01:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[00:01:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[00:01:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[00:01:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[00:01:18] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[00:01:18] ================ [PASSED] drm_dp_mst_helper ================
[00:01:18] ================== drm_exec (7 subtests) ===================
[00:01:18] [PASSED] sanitycheck
[00:01:18] [PASSED] test_lock
[00:01:18] [PASSED] test_lock_unlock
[00:01:18] [PASSED] test_duplicates
[00:01:18] [PASSED] test_prepare
[00:01:18] [PASSED] test_prepare_array
[00:01:18] [PASSED] test_multiple_loops
[00:01:18] ==================== [PASSED] drm_exec =====================
[00:01:18] =========== drm_format_helper_test (17 subtests) ===========
[00:01:18] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[00:01:18] [PASSED] single_pixel_source_buffer
[00:01:18] [PASSED] single_pixel_clip_rectangle
[00:01:18] [PASSED] well_known_colors
[00:01:18] [PASSED] destination_pitch
[00:01:18] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[00:01:18] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[00:01:18] [PASSED] single_pixel_source_buffer
[00:01:18] [PASSED] single_pixel_clip_rectangle
[00:01:18] [PASSED] well_known_colors
[00:01:18] [PASSED] destination_pitch
[00:01:18] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[00:01:18] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[00:01:18] [PASSED] single_pixel_source_buffer
[00:01:18] [PASSED] single_pixel_clip_rectangle
[00:01:18] [PASSED] well_known_colors
[00:01:18] [PASSED] destination_pitch
[00:01:18] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[00:01:18] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[00:01:18] [PASSED] single_pixel_source_buffer
[00:01:18] [PASSED] single_pixel_clip_rectangle
[00:01:18] [PASSED] well_known_colors
[00:01:18] [PASSED] destination_pitch
[00:01:18] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[00:01:18] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[00:01:18] [PASSED] single_pixel_source_buffer
[00:01:18] [PASSED] single_pixel_clip_rectangle
[00:01:18] [PASSED] well_known_colors
[00:01:18] [PASSED] destination_pitch
[00:01:18] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[00:01:18] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[00:01:18] [PASSED] single_pixel_source_buffer
[00:01:18] [PASSED] single_pixel_clip_rectangle
[00:01:18] [PASSED] well_known_colors
[00:01:18] [PASSED] destination_pitch
[00:01:18] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[00:01:18] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[00:01:18] [PASSED] single_pixel_source_buffer
[00:01:18] [PASSED] single_pixel_clip_rectangle
[00:01:18] [PASSED] well_known_colors
[00:01:18] [PASSED] destination_pitch
[00:01:18] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[00:01:18] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[00:01:18] [PASSED] single_pixel_source_buffer
[00:01:18] [PASSED] single_pixel_clip_rectangle
[00:01:18] [PASSED] well_known_colors
[00:01:18] [PASSED] destination_pitch
[00:01:18] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[00:01:18] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[00:01:18] [PASSED] single_pixel_source_buffer
[00:01:18] [PASSED] single_pixel_clip_rectangle
[00:01:18] [PASSED] well_known_colors
[00:01:18] [PASSED] destination_pitch
[00:01:18] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[00:01:18] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[00:01:18] [PASSED] single_pixel_source_buffer
[00:01:18] [PASSED] single_pixel_clip_rectangle
[00:01:18] [PASSED] well_known_colors
[00:01:18] [PASSED] destination_pitch
[00:01:18] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[00:01:18] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[00:01:18] [PASSED] single_pixel_source_buffer
[00:01:18] [PASSED] single_pixel_clip_rectangle
[00:01:18] [PASSED] well_known_colors
[00:01:18] [PASSED] destination_pitch
[00:01:18] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[00:01:18] ============== drm_test_fb_xrgb8888_to_mono  ===============
[00:01:18] [PASSED] single_pixel_source_buffer
[00:01:18] [PASSED] single_pixel_clip_rectangle
[00:01:18] [PASSED] well_known_colors
[00:01:18] [PASSED] destination_pitch
[00:01:18] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[00:01:18] ==================== drm_test_fb_swab  =====================
[00:01:18] [PASSED] single_pixel_source_buffer
[00:01:18] [PASSED] single_pixel_clip_rectangle
[00:01:18] [PASSED] well_known_colors
[00:01:18] [PASSED] destination_pitch
[00:01:18] ================ [PASSED] drm_test_fb_swab =================
[00:01:18] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[00:01:18] [PASSED] single_pixel_source_buffer
[00:01:18] [PASSED] single_pixel_clip_rectangle
[00:01:18] [PASSED] well_known_colors
[00:01:18] [PASSED] destination_pitch
[00:01:18] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[00:01:18] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[00:01:18] [PASSED] single_pixel_source_buffer
[00:01:18] [PASSED] single_pixel_clip_rectangle
[00:01:18] [PASSED] well_known_colors
[00:01:18] [PASSED] destination_pitch
[00:01:18] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[00:01:18] ================= drm_test_fb_clip_offset  =================
[00:01:18] [PASSED] pass through
[00:01:18] [PASSED] horizontal offset
[00:01:18] [PASSED] vertical offset
[00:01:18] [PASSED] horizontal and vertical offset
[00:01:18] [PASSED] horizontal offset (custom pitch)
[00:01:18] [PASSED] vertical offset (custom pitch)
[00:01:18] [PASSED] horizontal and vertical offset (custom pitch)
[00:01:18] ============= [PASSED] drm_test_fb_clip_offset =============
[00:01:18] =================== drm_test_fb_memcpy  ====================
[00:01:18] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[00:01:18] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[00:01:18] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[00:01:18] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[00:01:18] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[00:01:18] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[00:01:18] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[00:01:18] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[00:01:18] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[00:01:18] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[00:01:18] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[00:01:18] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[00:01:18] =============== [PASSED] drm_test_fb_memcpy ================
[00:01:18] ============= [PASSED] drm_format_helper_test ==============
[00:01:18] ================= drm_format (18 subtests) =================
[00:01:18] [PASSED] drm_test_format_block_width_invalid
[00:01:18] [PASSED] drm_test_format_block_width_one_plane
[00:01:18] [PASSED] drm_test_format_block_width_two_plane
[00:01:18] [PASSED] drm_test_format_block_width_three_plane
[00:01:18] [PASSED] drm_test_format_block_width_tiled
[00:01:18] [PASSED] drm_test_format_block_height_invalid
[00:01:18] [PASSED] drm_test_format_block_height_one_plane
[00:01:18] [PASSED] drm_test_format_block_height_two_plane
[00:01:18] [PASSED] drm_test_format_block_height_three_plane
[00:01:18] [PASSED] drm_test_format_block_height_tiled
[00:01:18] [PASSED] drm_test_format_min_pitch_invalid
[00:01:18] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[00:01:18] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[00:01:18] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[00:01:18] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[00:01:18] [PASSED] drm_test_format_min_pitch_two_plane
[00:01:18] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[00:01:18] [PASSED] drm_test_format_min_pitch_tiled
[00:01:18] =================== [PASSED] drm_format ====================
[00:01:18] ============== drm_framebuffer (10 subtests) ===============
[00:01:18] ========== drm_test_framebuffer_check_src_coords  ==========
[00:01:18] [PASSED] Success: source fits into fb
[00:01:18] [PASSED] Fail: overflowing fb with x-axis coordinate
[00:01:18] [PASSED] Fail: overflowing fb with y-axis coordinate
[00:01:18] [PASSED] Fail: overflowing fb with source width
[00:01:18] [PASSED] Fail: overflowing fb with source height
[00:01:18] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[00:01:18] [PASSED] drm_test_framebuffer_cleanup
[00:01:18] =============== drm_test_framebuffer_create  ===============
[00:01:18] [PASSED] ABGR8888 normal sizes
[00:01:18] [PASSED] ABGR8888 max sizes
[00:01:18] [PASSED] ABGR8888 pitch greater than min required
[00:01:18] [PASSED] ABGR8888 pitch less than min required
[00:01:18] [PASSED] ABGR8888 Invalid width
[00:01:18] [PASSED] ABGR8888 Invalid buffer handle
[00:01:18] [PASSED] No pixel format
[00:01:18] [PASSED] ABGR8888 Width 0
[00:01:18] [PASSED] ABGR8888 Height 0
[00:01:18] [PASSED] ABGR8888 Out of bound height * pitch combination
[00:01:18] [PASSED] ABGR8888 Large buffer offset
[00:01:18] [PASSED] ABGR8888 Buffer offset for inexistent plane
[00:01:18] [PASSED] ABGR8888 Invalid flag
[00:01:18] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[00:01:18] [PASSED] ABGR8888 Valid buffer modifier
[00:01:18] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[00:01:18] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[00:01:18] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[00:01:18] [PASSED] NV12 Normal sizes
[00:01:18] [PASSED] NV12 Max sizes
[00:01:18] [PASSED] NV12 Invalid pitch
[00:01:18] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[00:01:18] [PASSED] NV12 different  modifier per-plane
[00:01:18] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[00:01:18] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[00:01:18] [PASSED] NV12 Modifier for inexistent plane
[00:01:18] [PASSED] NV12 Handle for inexistent plane
[00:01:18] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[00:01:18] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[00:01:18] [PASSED] YVU420 Normal sizes
[00:01:18] [PASSED] YVU420 Max sizes
[00:01:18] [PASSED] YVU420 Invalid pitch
[00:01:18] [PASSED] YVU420 Different pitches
[00:01:18] [PASSED] YVU420 Different buffer offsets/pitches
[00:01:18] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[00:01:18] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[00:01:18] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[00:01:18] [PASSED] YVU420 Valid modifier
[00:01:18] [PASSED] YVU420 Different modifiers per plane
[00:01:18] [PASSED] YVU420 Modifier for inexistent plane
[00:01:18] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[00:01:18] [PASSED] X0L2 Normal sizes
[00:01:18] [PASSED] X0L2 Max sizes
[00:01:18] [PASSED] X0L2 Invalid pitch
[00:01:18] [PASSED] X0L2 Pitch greater than minimum required
[00:01:18] [PASSED] X0L2 Handle for inexistent plane
[00:01:18] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[00:01:18] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[00:01:18] [PASSED] X0L2 Valid modifier
[00:01:18] [PASSED] X0L2 Modifier for inexistent plane
[00:01:18] =========== [PASSED] drm_test_framebuffer_create ===========
[00:01:18] [PASSED] drm_test_framebuffer_free
[00:01:18] [PASSED] drm_test_framebuffer_init
[00:01:18] [PASSED] drm_test_framebuffer_init_bad_format
[00:01:18] [PASSED] drm_test_framebuffer_init_dev_mismatch
[00:01:18] [PASSED] drm_test_framebuffer_lookup
[00:01:18] [PASSED] drm_test_framebuffer_lookup_inexistent
[00:01:18] [PASSED] drm_test_framebuffer_modifiers_not_supported
[00:01:18] ================= [PASSED] drm_framebuffer =================
[00:01:18] ================ drm_gem_shmem (8 subtests) ================
[00:01:18] [PASSED] drm_gem_shmem_test_obj_create
[00:01:18] [PASSED] drm_gem_shmem_test_obj_create_private
[00:01:18] [PASSED] drm_gem_shmem_test_pin_pages
[00:01:18] [PASSED] drm_gem_shmem_test_vmap
[00:01:18] [PASSED] drm_gem_shmem_test_get_sg_table
[00:01:18] [PASSED] drm_gem_shmem_test_get_pages_sgt
[00:01:18] [PASSED] drm_gem_shmem_test_madvise
[00:01:18] [PASSED] drm_gem_shmem_test_purge
[00:01:18] ================== [PASSED] drm_gem_shmem ==================
[00:01:18] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[00:01:18] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[00:01:18] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[00:01:18] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[00:01:18] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[00:01:18] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[00:01:18] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[00:01:18] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[00:01:18] [PASSED] Automatic
[00:01:18] [PASSED] Full
[00:01:18] [PASSED] Limited 16:235
[00:01:18] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[00:01:18] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[00:01:18] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[00:01:18] [PASSED] drm_test_check_disable_connector
[00:01:18] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[00:01:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[00:01:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[00:01:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[00:01:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[00:01:18] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[00:01:18] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[00:01:18] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[00:01:18] [PASSED] drm_test_check_output_bpc_dvi
[00:01:18] [PASSED] drm_test_check_output_bpc_format_vic_1
[00:01:18] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[00:01:18] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[00:01:18] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[00:01:18] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[00:01:18] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[00:01:18] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[00:01:18] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[00:01:18] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[00:01:18] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[00:01:18] [PASSED] drm_test_check_broadcast_rgb_value
[00:01:18] [PASSED] drm_test_check_bpc_8_value
[00:01:18] [PASSED] drm_test_check_bpc_10_value
[00:01:18] [PASSED] drm_test_check_bpc_12_value
[00:01:18] [PASSED] drm_test_check_format_value
[00:01:18] [PASSED] drm_test_check_tmds_char_value
[00:01:18] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[00:01:18] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[00:01:18] [PASSED] drm_test_check_mode_valid
[00:01:18] [PASSED] drm_test_check_mode_valid_reject
[00:01:18] [PASSED] drm_test_check_mode_valid_reject_rate
[00:01:18] [PASSED] drm_test_check_mode_valid_reject_max_clock
[00:01:18] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[00:01:18] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[00:01:18] [PASSED] drm_test_check_infoframes
[00:01:18] [PASSED] drm_test_check_reject_avi_infoframe
[00:01:18] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[00:01:18] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[00:01:18] [PASSED] drm_test_check_reject_audio_infoframe
[00:01:18] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[00:01:18] ================= drm_managed (2 subtests) =================
[00:01:18] [PASSED] drm_test_managed_release_action
[00:01:18] [PASSED] drm_test_managed_run_action
[00:01:18] =================== [PASSED] drm_managed ===================
[00:01:18] =================== drm_mm (6 subtests) ====================
[00:01:18] [PASSED] drm_test_mm_init
[00:01:18] [PASSED] drm_test_mm_debug
[00:01:18] [PASSED] drm_test_mm_align32
[00:01:18] [PASSED] drm_test_mm_align64
[00:01:18] [PASSED] drm_test_mm_lowest
[00:01:18] [PASSED] drm_test_mm_highest
[00:01:18] ===================== [PASSED] drm_mm ======================
[00:01:18] ============= drm_modes_analog_tv (5 subtests) =============
[00:01:18] [PASSED] drm_test_modes_analog_tv_mono_576i
[00:01:18] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[00:01:18] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[00:01:18] [PASSED] drm_test_modes_analog_tv_pal_576i
[00:01:18] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[00:01:18] =============== [PASSED] drm_modes_analog_tv ===============
[00:01:18] ============== drm_plane_helper (2 subtests) ===============
[00:01:18] =============== drm_test_check_plane_state  ================
[00:01:18] [PASSED] clipping_simple
[00:01:18] [PASSED] clipping_rotate_reflect
[00:01:18] [PASSED] positioning_simple
[00:01:18] [PASSED] upscaling
[00:01:18] [PASSED] downscaling
[00:01:18] [PASSED] rounding1
[00:01:18] [PASSED] rounding2
[00:01:18] [PASSED] rounding3
[00:01:18] [PASSED] rounding4
[00:01:18] =========== [PASSED] drm_test_check_plane_state ============
[00:01:18] =========== drm_test_check_invalid_plane_state  ============
[00:01:18] [PASSED] positioning_invalid
[00:01:18] [PASSED] upscaling_invalid
[00:01:18] [PASSED] downscaling_invalid
[00:01:18] ======= [PASSED] drm_test_check_invalid_plane_state ========
[00:01:18] ================ [PASSED] drm_plane_helper =================
[00:01:18] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[00:01:18] ====== drm_test_connector_helper_tv_get_modes_check  =======
[00:01:18] [PASSED] None
[00:01:18] [PASSED] PAL
[00:01:18] [PASSED] NTSC
[00:01:18] [PASSED] Both, NTSC Default
[00:01:18] [PASSED] Both, PAL Default
[00:01:18] [PASSED] Both, NTSC Default, with PAL on command-line
[00:01:18] [PASSED] Both, PAL Default, with NTSC on command-line
[00:01:18] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[00:01:18] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[00:01:18] ================== drm_rect (9 subtests) ===================
[00:01:18] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[00:01:18] [PASSED] drm_test_rect_clip_scaled_not_clipped
[00:01:18] [PASSED] drm_test_rect_clip_scaled_clipped
[00:01:18] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[00:01:18] ================= drm_test_rect_intersect  =================
[00:01:18] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[00:01:18] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[00:01:18] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[00:01:18] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[00:01:18] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[00:01:18] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[00:01:18] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[00:01:18] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[00:01:18] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[00:01:18] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[00:01:18] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[00:01:18] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[00:01:18] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[00:01:18] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[00:01:18] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[00:01:18] ============= [PASSED] drm_test_rect_intersect =============
[00:01:18] ================ drm_test_rect_calc_hscale  ================
[00:01:18] [PASSED] normal use
[00:01:18] [PASSED] out of max range
[00:01:18] [PASSED] out of min range
[00:01:18] [PASSED] zero dst
[00:01:18] [PASSED] negative src
[00:01:18] [PASSED] negative dst
[00:01:18] ============ [PASSED] drm_test_rect_calc_hscale ============
[00:01:18] ================ drm_test_rect_calc_vscale  ================
[00:01:18] [PASSED] normal use
[00:01:18] [PASSED] out of max range
[00:01:18] [PASSED] out of min range
[00:01:18] [PASSED] zero dst
[00:01:18] [PASSED] negative src
[00:01:18] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[00:01:18] ============ [PASSED] drm_test_rect_calc_vscale ============
[00:01:18] ================== drm_test_rect_rotate  ===================
[00:01:18] [PASSED] reflect-x
[00:01:18] [PASSED] reflect-y
[00:01:18] [PASSED] rotate-0
[00:01:18] [PASSED] rotate-90
[00:01:18] [PASSED] rotate-180
[00:01:18] [PASSED] rotate-270
[00:01:18] ============== [PASSED] drm_test_rect_rotate ===============
[00:01:18] ================ drm_test_rect_rotate_inv  =================
[00:01:18] [PASSED] reflect-x
[00:01:18] [PASSED] reflect-y
[00:01:18] [PASSED] rotate-0
[00:01:18] [PASSED] rotate-90
[00:01:18] [PASSED] rotate-180
[00:01:18] [PASSED] rotate-270
[00:01:18] ============ [PASSED] drm_test_rect_rotate_inv =============
[00:01:18] ==================== [PASSED] drm_rect =====================
[00:01:18] ============ drm_sysfb_modeset_test (1 subtest) ============
[00:01:18] ============ drm_test_sysfb_build_fourcc_list  =============
[00:01:18] [PASSED] no native formats
[00:01:18] [PASSED] XRGB8888 as native format
[00:01:18] [PASSED] remove duplicates
[00:01:18] [PASSED] convert alpha formats
[00:01:18] [PASSED] random formats
[00:01:18] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[00:01:18] ============= [PASSED] drm_sysfb_modeset_test ==============
[00:01:18] ================== drm_fixp (2 subtests) ===================
[00:01:18] [PASSED] drm_test_int2fixp
[00:01:18] [PASSED] drm_test_sm2fixp
[00:01:18] ==================== [PASSED] drm_fixp =====================
[00:01:18] ============================================================
[00:01:18] Testing complete. Ran 621 tests: passed: 621
[00:01:18] Elapsed time: 26.121s total, 1.676s configuring, 24.276s building, 0.133s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[00:01:18] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[00:01:19] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[00:01:29] Starting KUnit Kernel (1/1)...
[00:01:29] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[00:01:29] ================= ttm_device (5 subtests) ==================
[00:01:29] [PASSED] ttm_device_init_basic
[00:01:29] [PASSED] ttm_device_init_multiple
[00:01:29] [PASSED] ttm_device_fini_basic
[00:01:29] [PASSED] ttm_device_init_no_vma_man
[00:01:29] ================== ttm_device_init_pools  ==================
[00:01:29] [PASSED] No DMA allocations, no DMA32 required
[00:01:29] [PASSED] DMA allocations, DMA32 required
[00:01:29] [PASSED] No DMA allocations, DMA32 required
[00:01:29] [PASSED] DMA allocations, no DMA32 required
[00:01:29] ============== [PASSED] ttm_device_init_pools ==============
[00:01:29] =================== [PASSED] ttm_device ====================
[00:01:29] ================== ttm_pool (8 subtests) ===================
[00:01:29] ================== ttm_pool_alloc_basic  ===================
[00:01:29] [PASSED] One page
[00:01:29] [PASSED] More than one page
[00:01:29] [PASSED] Above the allocation limit
[00:01:29] [PASSED] One page, with coherent DMA mappings enabled
[00:01:29] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[00:01:29] ============== [PASSED] ttm_pool_alloc_basic ===============
[00:01:29] ============== ttm_pool_alloc_basic_dma_addr  ==============
[00:01:29] [PASSED] One page
[00:01:29] [PASSED] More than one page
[00:01:29] [PASSED] Above the allocation limit
[00:01:29] [PASSED] One page, with coherent DMA mappings enabled
[00:01:29] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[00:01:29] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[00:01:29] [PASSED] ttm_pool_alloc_order_caching_match
[00:01:29] [PASSED] ttm_pool_alloc_caching_mismatch
[00:01:29] [PASSED] ttm_pool_alloc_order_mismatch
[00:01:29] [PASSED] ttm_pool_free_dma_alloc
[00:01:29] [PASSED] ttm_pool_free_no_dma_alloc
[00:01:29] [PASSED] ttm_pool_fini_basic
[00:01:29] ==================== [PASSED] ttm_pool =====================
[00:01:29] ================ ttm_resource (8 subtests) =================
[00:01:29] ================= ttm_resource_init_basic  =================
[00:01:29] [PASSED] Init resource in TTM_PL_SYSTEM
[00:01:29] [PASSED] Init resource in TTM_PL_VRAM
[00:01:29] [PASSED] Init resource in a private placement
[00:01:29] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[00:01:29] ============= [PASSED] ttm_resource_init_basic =============
[00:01:29] [PASSED] ttm_resource_init_pinned
[00:01:29] [PASSED] ttm_resource_fini_basic
[00:01:29] [PASSED] ttm_resource_manager_init_basic
[00:01:29] [PASSED] ttm_resource_manager_usage_basic
[00:01:29] [PASSED] ttm_resource_manager_set_used_basic
[00:01:29] [PASSED] ttm_sys_man_alloc_basic
[00:01:29] [PASSED] ttm_sys_man_free_basic
[00:01:29] ================== [PASSED] ttm_resource ===================
[00:01:29] =================== ttm_tt (15 subtests) ===================
[00:01:29] ==================== ttm_tt_init_basic  ====================
[00:01:29] [PASSED] Page-aligned size
[00:01:29] [PASSED] Extra pages requested
[00:01:29] ================ [PASSED] ttm_tt_init_basic ================
[00:01:29] [PASSED] ttm_tt_init_misaligned
[00:01:29] [PASSED] ttm_tt_fini_basic
[00:01:29] [PASSED] ttm_tt_fini_sg
[00:01:29] [PASSED] ttm_tt_fini_shmem
[00:01:29] [PASSED] ttm_tt_create_basic
[00:01:29] [PASSED] ttm_tt_create_invalid_bo_type
[00:01:29] [PASSED] ttm_tt_create_ttm_exists
[00:01:29] [PASSED] ttm_tt_create_failed
[00:01:29] [PASSED] ttm_tt_destroy_basic
[00:01:29] [PASSED] ttm_tt_populate_null_ttm
[00:01:29] [PASSED] ttm_tt_populate_populated_ttm
[00:01:29] [PASSED] ttm_tt_unpopulate_basic
[00:01:29] [PASSED] ttm_tt_unpopulate_empty_ttm
[00:01:29] [PASSED] ttm_tt_swapin_basic
[00:01:29] ===================== [PASSED] ttm_tt ======================
[00:01:29] =================== ttm_bo (14 subtests) ===================
[00:01:29] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[00:01:29] [PASSED] Cannot be interrupted and sleeps
[00:01:29] [PASSED] Cannot be interrupted, locks straight away
[00:01:29] [PASSED] Can be interrupted, sleeps
[00:01:29] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[00:01:29] [PASSED] ttm_bo_reserve_locked_no_sleep
[00:01:29] [PASSED] ttm_bo_reserve_no_wait_ticket
[00:01:29] [PASSED] ttm_bo_reserve_double_resv
[00:01:29] [PASSED] ttm_bo_reserve_interrupted
[00:01:29] [PASSED] ttm_bo_reserve_deadlock
[00:01:29] [PASSED] ttm_bo_unreserve_basic
[00:01:29] [PASSED] ttm_bo_unreserve_pinned
[00:01:29] [PASSED] ttm_bo_unreserve_bulk
[00:01:29] [PASSED] ttm_bo_fini_basic
[00:01:29] [PASSED] ttm_bo_fini_shared_resv
[00:01:29] [PASSED] ttm_bo_pin_basic
[00:01:29] [PASSED] ttm_bo_pin_unpin_resource
[00:01:29] [PASSED] ttm_bo_multiple_pin_one_unpin
[00:01:29] ===================== [PASSED] ttm_bo ======================
[00:01:29] ============== ttm_bo_validate (22 subtests) ===============
[00:01:29] ============== ttm_bo_init_reserved_sys_man  ===============
[00:01:29] [PASSED] Buffer object for userspace
[00:01:29] [PASSED] Kernel buffer object
[00:01:29] [PASSED] Shared buffer object
[00:01:29] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[00:01:29] ============== ttm_bo_init_reserved_mock_man  ==============
[00:01:29] [PASSED] Buffer object for userspace
[00:01:29] [PASSED] Kernel buffer object
[00:01:29] [PASSED] Shared buffer object
[00:01:29] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[00:01:29] [PASSED] ttm_bo_init_reserved_resv
[00:01:29] ================== ttm_bo_validate_basic  ==================
[00:01:29] [PASSED] Buffer object for userspace
[00:01:29] [PASSED] Kernel buffer object
[00:01:29] [PASSED] Shared buffer object
[00:01:29] ============== [PASSED] ttm_bo_validate_basic ==============
[00:01:29] [PASSED] ttm_bo_validate_invalid_placement
[00:01:29] ============= ttm_bo_validate_same_placement  ==============
[00:01:29] [PASSED] System manager
[00:01:29] [PASSED] VRAM manager
[00:01:29] ========= [PASSED] ttm_bo_validate_same_placement ==========
[00:01:29] [PASSED] ttm_bo_validate_failed_alloc
[00:01:29] [PASSED] ttm_bo_validate_pinned
[00:01:29] [PASSED] ttm_bo_validate_busy_placement
[00:01:29] ================ ttm_bo_validate_multihop  =================
[00:01:29] [PASSED] Buffer object for userspace
[00:01:29] [PASSED] Kernel buffer object
[00:01:29] [PASSED] Shared buffer object
[00:01:29] ============ [PASSED] ttm_bo_validate_multihop =============
[00:01:29] ========== ttm_bo_validate_no_placement_signaled  ==========
[00:01:29] [PASSED] Buffer object in system domain, no page vector
[00:01:29] [PASSED] Buffer object in system domain with an existing page vector
[00:01:29] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[00:01:29] ======== ttm_bo_validate_no_placement_not_signaled  ========
[00:01:29] [PASSED] Buffer object for userspace
[00:01:29] [PASSED] Kernel buffer object
[00:01:29] [PASSED] Shared buffer object
[00:01:29] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[00:01:29] [PASSED] ttm_bo_validate_move_fence_signaled
[00:01:29] ========= ttm_bo_validate_move_fence_not_signaled  =========
[00:01:29] [PASSED] Waits for GPU
[00:01:29] [PASSED] Tries to lock straight away
[00:01:29] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[00:01:29] [PASSED] ttm_bo_validate_swapout
[00:01:29] [PASSED] ttm_bo_validate_happy_evict
[00:01:29] [PASSED] ttm_bo_validate_all_pinned_evict
[00:01:29] [PASSED] ttm_bo_validate_allowed_only_evict
[00:01:29] [PASSED] ttm_bo_validate_deleted_evict
[00:01:29] [PASSED] ttm_bo_validate_busy_domain_evict
[00:01:29] [PASSED] ttm_bo_validate_evict_gutting
[00:01:29] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[00:01:29] ================= [PASSED] ttm_bo_validate =================
[00:01:29] ============================================================
[00:01:29] Testing complete. Ran 102 tests: passed: 102
[00:01:29] Elapsed time: 11.307s total, 1.684s configuring, 9.407s building, 0.177s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1920 bytes --]

== Series Details ==

Series: drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling
URL   : https://patchwork.freedesktop.org/series/164123/
State : success

== Summary ==

CI Bug Log - changes from xe-4823-247b271f2f09fedf9c4cc85fcc338217fc396a9a_BAT -> xe-pw-164123v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (12 -> 12)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-164123v1_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
    - bat-adlp-7:         [PASS][1] -> [DMESG-WARN][2] ([Intel XE#7483])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4823-247b271f2f09fedf9c4cc85fcc338217fc396a9a/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v1/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html

  
#### Possible fixes ####

  * igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1:
    - bat-adlp-7:         [DMESG-WARN][3] ([Intel XE#7483]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4823-247b271f2f09fedf9c4cc85fcc338217fc396a9a/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v1/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html

  
  [Intel XE#7483]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7483


Build changes
-------------

  * Linux: xe-4823-247b271f2f09fedf9c4cc85fcc338217fc396a9a -> xe-pw-164123v1

  IGT_8836: 8836
  xe-4823-247b271f2f09fedf9c4cc85fcc338217fc396a9a: 247b271f2f09fedf9c4cc85fcc338217fc396a9a
  xe-pw-164123v1: 164123v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v1/index.html

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✗ Xe.CI.FULL: failure for drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling

[Patchwork]

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== Series Details ==

Series: drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling
URL   : https://patchwork.freedesktop.org/series/164123/
State : failure

== Summary ==

CI Bug Log - changes from xe-4823-247b271f2f09fedf9c4cc85fcc338217fc396a9a_FULL -> xe-pw-164123v1_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-164123v1_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-164123v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-164123v1_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@core_getversion@all-cards:
    - shard-bmg:          NOTRUN -> [FAIL][1]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v1/shard-bmg-5/igt@core_getversion@all-cards.html

  
Known issues
------------

  Here are the changes found in xe-pw-164123v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@fbdev@write:
    - shard-bmg:          NOTRUN -> [SKIP][2] ([Intel XE#2134])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v1/shard-bmg-5/igt@fbdev@write.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-lnl:          [PASS][3] -> [FAIL][4] ([Intel XE#301]) +1 other test fail
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4823-247b271f2f09fedf9c4cc85fcc338217fc396a9a/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v1/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@xe_exec_balancer@many-execqueues-cm-virtual-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#6557] / [Intel XE#6703]) +2 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v1/shard-bmg-5/igt@xe_exec_balancer@many-execqueues-cm-virtual-rebind.html

  * igt@xe_exec_basic@many-bindexecqueue-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#6703]) +444 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v1/shard-bmg-5/igt@xe_exec_basic@many-bindexecqueue-rebind.html

  * igt@xe_multigpu_svm@mgpu-coherency-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#6964])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v1/shard-bmg-5/igt@xe_multigpu_svm@mgpu-coherency-prefetch.html

  * igt@xe_peer2peer@write:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#2427] / [Intel XE#6953] / [Intel XE#7326] / [Intel XE#7353])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v1/shard-bmg-5/igt@xe_peer2peer@write.html

  
#### Possible fixes ####

  * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma:
    - shard-lnl:          [FAIL][9] ([Intel XE#5625]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4823-247b271f2f09fedf9c4cc85fcc338217fc396a9a/shard-lnl-5/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v1/shard-lnl-5/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html

  
  [Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
  [Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
  [Intel XE#6557]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6557
  [Intel XE#6703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6703
  [Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#7326]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7326
  [Intel XE#7353]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7353


Build changes
-------------

  * Linux: xe-4823-247b271f2f09fedf9c4cc85fcc338217fc396a9a -> xe-pw-164123v1

  IGT_8836: 8836
  xe-4823-247b271f2f09fedf9c4cc85fcc338217fc396a9a: 247b271f2f09fedf9c4cc85fcc338217fc396a9a
  xe-pw-164123v1: 164123v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164123v1/index.html

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