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* [PATCH] drm/xe/tlb: Init range tilemask err to zero
@ 2026-03-16 16:20 Jonathan Cavitt
  2026-03-16 16:24 ` Thomas Hellström
                   ` (3 more replies)
  0 siblings, 4 replies; 6+ messages in thread
From: Jonathan Cavitt @ 2026-03-16 16:20 UTC (permalink / raw)
  To: intel-xe; +Cc: saurabhg.gupta, alex.zuo, jonathan.cavitt, thomas.hellstrom

Initialize err = 0 in xe_tlb_inval_range_tilemask_submit to prevent a
possible uninitialized value return in the case where the tile_mask
somehow doesn't match any available tile ids.

This targets a static analysis issue.

Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
---
 drivers/gpu/drm/xe/xe_tlb_inval.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
index 10dcd4abb00f..bbd21d393062 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval.c
+++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
@@ -529,7 +529,7 @@ int xe_tlb_inval_range_tilemask_submit(struct xe_device *xe, u32 asid,
 	struct xe_tile *tile;
 	u32 fence_id = 0;
 	u8 id;
-	int err;
+	int err = 0;
 
 	batch->num_fences = 0;
 	if (!tile_mask)
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 6+ messages in thread
end of thread, other threads:[~2026-04-08 16:18 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2026-03-16 16:20 [PATCH] drm/xe/tlb: Init range tilemask err to zero Jonathan Cavitt
2026-03-16 16:24 ` Thomas Hellström
2026-03-16 19:17 ` ✓ CI.KUnit: success for " Patchwork
2026-03-16 19:52 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-17 17:46 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-04-08 16:18   ` Lin, Shuicheng

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