From: "Poosa, Karthik" <karthik.poosa@intel.com>
To: "Nilawar, Badal" <badal.nilawar@intel.com>,
<intel-xe@lists.freedesktop.org>
Cc: <anshuman.gupta@intel.com>, <rodrigo.vivi@intel.com>,
<raag.jadav@intel.com>, <riana.tauro@intel.com>
Subject: Re: [PATCH v2 4/7] drm/xe/hwmon: Read thermal sensors count
Date: Mon, 15 Dec 2025 20:42:23 +0530 [thread overview]
Message-ID: <2a983e61-78aa-4636-8680-00971e5bc38c@intel.com> (raw)
In-Reply-To: <fd96fa00-cb6d-46c3-928e-9a5d5c08122f@intel.com>
On 11-12-2025 22:58, Nilawar, Badal wrote:
>
> On 10-12-2025 11:52, Karthik Poosa wrote:
>> Read number of thermal sensors available.
>>
>> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_hwmon.c | 28 ++++++++++++++++++++++++----
>> 1 file changed, 24 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c
>> b/drivers/gpu/drm/xe/xe_hwmon.c
>> index c4a200cc2c23..e843021d13ec 100644
>> --- a/drivers/gpu/drm/xe/xe_hwmon.c
>> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
>> @@ -99,6 +99,11 @@ enum sensor_attr_power {
>> */
>> #define PL_WRITE_MBX_TIMEOUT_MS (1)
>> +/*
>> + * Number of thermal sensors.
>> + */
>> +#define MAX_THERMAL_SENSORS (11)
>> +
>> /**
>> * struct xe_hwmon_energy_info - to accumulate energy
>> */
>> @@ -126,9 +131,11 @@ struct xe_hwmon_thermal_info {
>> union {
>> /** @limits: temperatures limits */
>> u8 limit[8];
>> - /** @data: limits data dwords */
>> - u32 data[2];
>> + /** @dword: limit dwords */
>> + u32 dword[2];
> Please maintain variable name consistent throughout the series.
>> };
>> + /** @count: no of temperature sensors */
>> + u8 count;
>> };
>> /**
>> @@ -716,18 +723,31 @@ static int
>> xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
>> {
>> struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
>> int ret = 0;
>> + u32 val = 0;
>> if (!hwmon->xe->info.has_mbx_power_limits)
>> return -ENXIO;
>> /* Read thermal info */
>> ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO,
>> READ_THERMAL_LIMITS, 0),
>> - &hwmon->temp.data[0], &hwmon->temp.data[1]);
>> + &hwmon->temp.dword[0], &hwmon->temp.dword[1]);
>> drm_dbg(&hwmon->xe->drm, "thermal info read ret %d, val 0x%x
>> val1 0x%x\n", ret,
>> - hwmon->temp.data[0], hwmon->temp.data[1]);
>> + hwmon->temp.dword[0], hwmon->temp.dword[1]);
>> if (ret)
>> return ret;
>> + /* Read thermal config */
>> + ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO,
>> READ_THERMAL_CONFIG, 0),
>> + &val, NULL);
>> + drm_dbg(&hwmon->xe->drm, "thermal config read ret %d, count
>> %d\n", ret, val);
>> + if (ret)
>> + return ret;
>> +
>> + hwmon->temp.count = val & TEMP_MASK;
>> + if (hwmon->temp.count > MAX_THERMAL_SENSORS)
>
> Why this restriction?
Because we created the structure to hold sensor data of
MAX_THERMAL_SENSORS only.
I think we can increase MAX_THERMAL_SENSORS to 255 as that is max count
supported by thermal mailbox.
>> + drm_warn(&hwmon->xe->drm, "thermal config count %d exceeds
>> supported limit %d\n",
>> + hwmon->temp.count, MAX_THERMAL_SENSORS);
>> +
>> return 0;
> I am seeing patch 5 is exposing avj of hwmon->temp.count sensors, so
> could you please combine patch 4 and 5.
>
> Thanks,
> Badal
>
>> }
next prev parent reply other threads:[~2025-12-15 15:12 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-10 6:22 [PATCH v2 0/7] drm/xe/hwmon: Expose new temperature attributes Karthik Poosa
2025-12-10 6:22 ` [PATCH v2 1/7] drm/xe/hwmon: Read temperature limits using pcode mailbox Karthik Poosa
2025-12-11 11:25 ` Nilawar, Badal
2025-12-10 6:22 ` [PATCH v2 2/7] drm/xe/hwmon: Expose tempX_emergency Karthik Poosa
2025-12-11 11:46 ` Nilawar, Badal
2025-12-10 6:22 ` [PATCH v2 3/7] drm/xe/hwmon: Expose tempX_crit Karthik Poosa
2025-12-10 6:22 ` [PATCH v2 4/7] drm/xe/hwmon: Read thermal sensors count Karthik Poosa
2025-12-11 17:28 ` Nilawar, Badal
2025-12-15 15:12 ` Poosa, Karthik [this message]
2025-12-10 6:22 ` [PATCH v2 5/7] drm/xe/hwmon: Expose memory controller temperature Karthik Poosa
2025-12-11 17:32 ` Nilawar, Badal
2025-12-10 6:23 ` [PATCH v2 6/7] drm/xe/hwmon: Expose GPU pcie temperature Karthik Poosa
2025-12-10 6:23 ` [PATCH v2 7/7] drm/xe/hwmon: Expose individual vram temperature Karthik Poosa
2025-12-11 9:16 ` ✓ CI.KUnit: success for drm/xe/hwmon: Expose new temperature attributes (rev3) Patchwork
2025-12-11 10:17 ` ✓ Xe.CI.BAT: " Patchwork
2025-12-11 19:28 ` ✗ Xe.CI.Full: failure " Patchwork
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