[PATCH v2 13/13] drm/i915/display: Add DC3CO count and residency in dmc debugfs

Dibin Moolakadan Subrahmanian
2026-04-22T16:26:36Z

Expose DC3CO count and residency for xe3lp platforms via debugfs.

Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_dmc.c | 8 +++++++-
drivers/gpu/drm/i915/display/intel_dmc_regs.h | 2 ++
2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index a85e2edcb894..3cd960163d28 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -1650,7 +1650,13 @@ static int intel_dmc_debugfs_status_show(struct seq_file *m, void *unused)
DMC_VERSION_MINOR(dmc->version));

if (DISPLAY_VER(display) >= 12) {
- if (display->platform.dgfx || DISPLAY_VER(display) >= 14) {
+ if (DISPLAY_VER(display) >= 35) {
+ seq_printf(m, "DC3CO count: %d\n",
+ intel_de_read(display, XE3P_DMC_DC3CO_COUNT));
+
+ seq_printf(m, "DC3CO residency: %d\n",
+ intel_de_read(display, DC_STATE_DC3CO_RESIDENCY));
+ } else if (display->platform.dgfx || DISPLAY_VER(display) >= 14) {
dc5_reg = DG1_DMC_DEBUG_DC5_COUNT;
} else {
dc5_reg = TGL_DMC_DEBUG_DC5_COUNT;
diff --git a/drivers/gpu/drm/i915/display/intel_dmc_regs.h b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
index 38e342b45af0..1998549b6318 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
@@ -531,6 +531,8 @@ enum pipedmc_event_id {
#define TGL_DMC_DEBUG3 _MMIO(0x101090)
#define DG1_DMC_DEBUG3 _MMIO(0x13415c)

+#define XE3P_DMC_DC3CO_COUNT _MMIO(0x8f05C)
+
#define DMC_WAKELOCK_CFG _MMIO(0x8F1B0)
#define DMC_WAKELOCK_CFG_ENABLE REG_BIT(31)
#define DMC_WAKELOCK1_CTL _MMIO(0x8F140)
--
2.43.0