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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
Subject: Re: [PATCH 3/5] drm/i915/irq: Extract gen11_gu_misc_irq_postinstall()
Date: Fri, 06 Nov 2026 11:22:22 +0200	[thread overview]
Message-ID: <2d32f51366c0d790a1bbe31c3ca6d30a8e303e4e@intel.com> (raw)
In-Reply-To: <20261105203427.8696-4-ville.syrjala@linux.intel.com>

On Thu, 05 Nov 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Both gen11 and dg1 duplicate the same code to set up the
> GEN11_GU_MISC interrupts. Extract it to a shared helper.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 16 ++++++++++++----
>  1 file changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 12082167face..823d97284d78 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -725,17 +725,26 @@ static void gen8_irq_postinstall(struct drm_i915_private *dev_priv)
>  	gen8_master_intr_enable(intel_uncore_regs(&dev_priv->uncore));
>  }
>  
> +static void gen11_gu_misc_irq_postinstall(struct drm_i915_private *dev_priv)
> +{
> +	struct intel_gt *gt = to_gt(dev_priv);
> +	struct intel_uncore *uncore = gt->uncore;

That's a roundabout path to uncore, but *shrug*.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> +	u32 gu_misc_masked = GEN11_GU_MISC_GSE;
> +
> +	gen2_irq_init(uncore, GEN11_GU_MISC_IRQ_REGS, ~gu_misc_masked, gu_misc_masked);
> +}
> +
>  static void gen11_irq_postinstall(struct drm_i915_private *dev_priv)
>  {
>  	struct intel_display *display = dev_priv->display;
>  	struct intel_gt *gt = to_gt(dev_priv);
>  	struct intel_uncore *uncore = gt->uncore;
> -	u32 gu_misc_masked = GEN11_GU_MISC_GSE;
>  
>  	gen11_gt_irq_postinstall(gt);
> +
>  	intel_display_irq_postinstall(display);
>  
> -	gen2_irq_init(uncore, GEN11_GU_MISC_IRQ_REGS, ~gu_misc_masked, gu_misc_masked);
> +	gen11_gu_misc_irq_postinstall(dev_priv);
>  
>  	gen11_master_intr_enable(intel_uncore_regs(uncore));
>  	intel_uncore_posting_read(&dev_priv->uncore, GEN11_GFX_MSTR_IRQ);
> @@ -745,14 +754,13 @@ static void dg1_irq_postinstall(struct drm_i915_private *dev_priv)
>  {
>  	struct intel_display *display = dev_priv->display;
>  	struct intel_uncore *uncore = &dev_priv->uncore;
> -	u32 gu_misc_masked = GEN11_GU_MISC_GSE;
>  	struct intel_gt *gt;
>  	unsigned int i;
>  
>  	for_each_gt(gt, dev_priv, i)
>  		gen11_gt_irq_postinstall(gt);
>  
> -	gen2_irq_init(uncore, GEN11_GU_MISC_IRQ_REGS, ~gu_misc_masked, gu_misc_masked);
> +	gen11_gu_misc_irq_postinstall(dev_priv);
>  
>  	intel_display_irq_postinstall(display);

-- 
Jani Nikula, Intel

  reply	other threads:[~2026-11-06  9:22 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-05 20:34 [PATCH 0/5] drm/i915/irq: Clean up the GEN11_GU_MISC mess Ville Syrjala
2026-11-05 20:34 ` [PATCH 1/5] drm/i915/irq: Relocate gen11_gu_misc_irq_ack() Ville Syrjala
2026-11-06  9:18   ` Jani Nikula
2026-11-05 20:34 ` [PATCH 2/5] drm/i915/irq: s/gen11_gu_misc_irq_handler()/intel_display_gse_irq_handler()/ Ville Syrjala
2026-11-06  9:20   ` Jani Nikula
2026-11-05 20:34 ` [PATCH 3/5] drm/i915/irq: Extract gen11_gu_misc_irq_postinstall() Ville Syrjala
2026-11-06  9:22   ` Jani Nikula [this message]
2026-11-05 20:34 ` [PATCH 4/5] drm/i915/irq: Keep GSE interrupts masked if display is not present Ville Syrjala
2026-11-06  9:25   ` Jani Nikula
2026-11-06 17:00     ` Ville Syrjälä
2026-11-05 20:34 ` [PATCH 5/5] drm/i915/irq: Reorder GU_MISC vs. display in gen11_irq_postinstall() Ville Syrjala
2026-11-06  9:25   ` Jani Nikula
2026-11-05 20:48 ` ✓ CI.KUnit: success for drm/i915/irq: Clean up the GEN11_GU_MISC mess Patchwork
2026-11-05 21:23 ` ✓ Xe.CI.BAT: " Patchwork
2026-11-06 22:22 ` ✗ Xe.CI.FULL: failure " Patchwork

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