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X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Oct 2025 09:33:09.1691 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: fSqtCFbuyJcZFAfx9CcCU/zFscBb48xDL7hUwMKpNwRN3ALQ3d3onkXpsV4LnsuDHa+s5P8pB+COuRL0xJ+xUQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA2PR11MB4924 X-OriginatorOrg: intel.com X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On 10/23/2025 17:11, Lucas De Marchi wrote: > On Wed, Oct 22, 2025 at 11:28:19AM -0700, Matthew Brost wrote: >> On Tue, Oct 21, 2025 at 10:17:43PM -0700, Lucas De Marchi wrote: >>> From: Lukasz Laguna >>> >>> Trigger MERT's TLB invalidation after LMTT updates ensuring memory >>> translations remain coherent. >>> >>> Signed-off-by: Lukasz Laguna >>> Signed-off-by: Lucas De Marchi >>> --- >>>  drivers/gpu/drm/xe/regs/xe_mert_regs.h     |  3 +++ >>>  drivers/gpu/drm/xe/xe_device_types.h       |  6 ++++++ >>>  drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 19 +++++++++++++++++++ >>>  drivers/gpu/drm/xe/xe_irq.c                |  8 ++++++++ >>>  drivers/gpu/drm/xe/xe_sriov_pf.c           |  3 +++ >>>  5 files changed, 39 insertions(+) >>> >>> diff --git a/drivers/gpu/drm/xe/regs/xe_mert_regs.h >>> b/drivers/gpu/drm/xe/regs/xe_mert_regs.h >>> index 5b7c15e08747e..aef66c04901d2 100644 >>> --- a/drivers/gpu/drm/xe/regs/xe_mert_regs.h >>> +++ b/drivers/gpu/drm/xe/regs/xe_mert_regs.h >>> @@ -10,4 +10,7 @@ >>> >>>  #define MERT_LMEM_CFG                XE_REG(0x1448b0) >>> >>> +#define MERT_TLB_INV_DESC_A            XE_REG(0x14cf7c) >>> +#define   MERT_TLB_INV_DESC_A_VALID        REG_BIT(0) >>> + >>>  #endif /* _XE_MERT_REGS_H_ */ >>> diff --git a/drivers/gpu/drm/xe/xe_device_types.h >>> b/drivers/gpu/drm/xe/xe_device_types.h >>> index fb401809fae5a..6fcd35bee73b5 100644 >>> --- a/drivers/gpu/drm/xe/xe_device_types.h >>> +++ b/drivers/gpu/drm/xe/xe_device_types.h >>> @@ -219,6 +219,12 @@ struct xe_tile { >>> >>>      /** @debugfs: debugfs directory associated with this tile */ >>>      struct dentry *debugfs; >>> + >>> +    /** @mert: MERT-related data */ >>> +    struct { >>> +        /** @mert.tlb_inv_done: completion of TLB invalidation */ >>> +        struct completion tlb_inv_done; >>> +    } mert; >>>  }; >>> >>>  /** >>> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c >>> b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c >>> index c0c0215c07036..ebe81cb21f5ab 100644 >>> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c >>> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c >>> @@ -10,6 +10,7 @@ >>>  #include "abi/guc_klvs_abi.h" >>> >>>  #include "regs/xe_guc_regs.h" >>> +#include "regs/xe_mert_regs.h" >>> >>>  #include "xe_bo.h" >>>  #include "xe_device.h" >>> @@ -31,6 +32,7 @@ >>>  #include "xe_lmtt.h" >>>  #include "xe_map.h" >>>  #include "xe_migrate.h" >>> +#include "xe_mmio.h" >>>  #include "xe_sriov.h" >>>  #include "xe_ttm_vram_mgr.h" >>>  #include "xe_vram_types.h" >>> @@ -1346,6 +1348,20 @@ static int pf_distribute_config_lmem(struct >>> xe_gt *gt, unsigned int vfid, u64 si >>>      return 0; >>>  } >>> >>> +static void invalidate_mert_lmtt(struct xe_device *xe) >>> +{ >>> +    const long timeout = HZ / 4; >>> +    struct xe_tile *tile = xe_device_get_root_tile(xe); >>> + >>> +    xe_assert(xe, xe_device_has_mert(xe)); >>> + >> >> It is not obvious how upper layers which call this function get >> exclusive access to what appears to be a per device resource. > > this is a static function that will only be called by the function > below... I think the lockdep should rather be added in that entrypoint? > >> >> Is xe_sriov_pf_master_mutex held here? If so, I'd add a lockdep assert >> so this is self documenting on how exclusion is achieved and to prevent >> misuse. If not, you probably need a lock here. > xe_sriov_pf_master_mutex is held here, but there can still be a race between reinit_completion() and complete(). I'll prepare a new locking approach. Thanks, Lukasz > yep, but another question below for Lukasz or you... > >> >> Matt >> >>> + reinit_completion(&tile->mert.tlb_inv_done); > > is that the right thing here? Is xe_sriov_pf_master_mutex preventing 2 > waiters? > > Lucas De Marchi > >>> +    xe_mmio_write32(&tile->mmio, MERT_TLB_INV_DESC_A, >>> MERT_TLB_INV_DESC_A_VALID); >>> + >>> +    if (!wait_for_completion_timeout(&tile->mert.tlb_inv_done, >>> timeout)) >>> +        drm_err(&xe->drm, "MERT TLB invalidation timeout\n"); >>> +} >>> + >>>  static void pf_force_lmtt_invalidate(struct xe_device *xe) >>>  { >>>      struct xe_lmtt *lmtt; >>> @@ -1359,6 +1375,9 @@ static void pf_force_lmtt_invalidate(struct >>> xe_device *xe) >>>          lmtt = &tile->sriov.pf.lmtt; >>>          xe_lmtt_invalidate_hw(lmtt); >>>      } >>> + >>> +    if (xe_device_has_mert(xe)) >>> +        invalidate_mert_lmtt(xe); >>>  } >>> >>>  static void pf_reset_vf_lmtt(struct xe_device *xe, unsigned int vfid) >>> diff --git a/drivers/gpu/drm/xe/xe_irq.c b/drivers/gpu/drm/xe/xe_irq.c >>> index 011b5eb66102f..82bf0d3995dfe 100644 >>> --- a/drivers/gpu/drm/xe/xe_irq.c >>> +++ b/drivers/gpu/drm/xe/xe_irq.c >>> @@ -12,6 +12,7 @@ >>>  #include "display/xe_display.h" >>>  #include "regs/xe_guc_regs.h" >>>  #include "regs/xe_irq_regs.h" >>> +#include "regs/xe_mert_regs.h" >>>  #include "xe_device.h" >>>  #include "xe_drv.h" >>>  #include "xe_gsc_proxy.h" >>> @@ -468,8 +469,15 @@ static void dg1_intr_enable(struct xe_device >>> *xe, bool stall) >>> >>>  static void mert_irq_handler(struct xe_device *xe, u32 master_ctl) >>>  { >>> +    struct xe_tile *tile = xe_device_get_root_tile(xe); >>> +    u32 reg_val; >>> + >>>      if (!(master_ctl & SOC_H2DMEMINT_IRQ)) >>>          return; >>> + >>> +    reg_val = xe_mmio_read32(&tile->mmio, MERT_TLB_INV_DESC_A); >>> +    if (!(reg_val & MERT_TLB_INV_DESC_A_VALID)) >>> +        complete(&tile->mert.tlb_inv_done); >>>  } >>> >>>  /* >>> diff --git a/drivers/gpu/drm/xe/xe_sriov_pf.c >>> b/drivers/gpu/drm/xe/xe_sriov_pf.c >>> index bc1ab9ee31d92..b40701d75dacb 100644 >>> --- a/drivers/gpu/drm/xe/xe_sriov_pf.c >>> +++ b/drivers/gpu/drm/xe/xe_sriov_pf.c >>> @@ -88,6 +88,7 @@ bool xe_sriov_pf_readiness(struct xe_device *xe) >>>   */ >>>  int xe_sriov_pf_init_early(struct xe_device *xe) >>>  { >>> +    struct xe_tile *root_tile = xe_device_get_root_tile(xe); >>>      int err; >>> >>>      xe_assert(xe, IS_SRIOV_PF(xe)); >>> @@ -103,6 +104,8 @@ int xe_sriov_pf_init_early(struct xe_device *xe) >>> >>>      xe_sriov_pf_service_init(xe); >>> >>> +    init_completion(&root_tile->mert.tlb_inv_done); >>> + >>>      return 0; >>>  } >>> >>> >>> -- >>> 2.51.0 >>>